packages/hal/arm/mx51/karo/v1_0/include/karo_tx51.h

   1 #ifndef CYGONCE_KARO_TX51_H
   2 #define CYGONCE_KARO_TX51_H
   3
   4 //=============================================================================
   5 //
   6 //      Platform specific support (register layout, etc)
   7 //
   8 //=============================================================================
   9 //####ECOSGPLCOPYRIGHTBEGIN####
  10 // -------------------------------------------
  11 // This file is part of eCos, the Embedded Configurable Operating System.
  12 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
  13 //
  14 // eCos is free software; you can redistribute it and/or modify it under
  15 // the terms of the GNU General Public License as published by the Free
  16 // Software Foundation; either version 2 or (at your option) any later version.
  17 //
  18 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
  19 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
  20 // FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  21 // for more details.
  22 //
  23 // You should have received a copy of the GNU General Public License along
  24 // with eCos; if not, write to the Free Software Foundation, Inc.,
  25 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  26 //
  27 // As a special exception, if other files instantiate templates or use macros
  28 // or inline functions from this file, or you compile this file and link it
  29 // with other works to produce a work based on this file, this file does not
  30 // by itself cause the resulting work to be covered by the GNU General Public
  31 // License. However the source code for this file must still be made available
  32 // in accordance with section (3) of the GNU General Public License.
  33 //
  34 // This exception does not invalidate any other reasons why a work based on
  35 // this file might be covered by the GNU General Public License.
  36 //
  37 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
  38 // at http://sources.redhat.com/ecos/ecos-license/
  39 // -------------------------------------------
  40 //####ECOSGPLCOPYRIGHTEND####
  41 //===========================================================================
  42
  43 #include <cyg/hal/hal_soc.h>    // Hardware definitions
  44
  45 #include CYGHWR_MEMORY_LAYOUT_H
  46
  47 #define SZ_1K                                           0x00000400
  48 #define SZ_2K                                           0x00000800
  49 #define SZ_4K                                           0x00001000
  50 #define SZ_8K                                           0x00002000
  51 #define SZ_16K                                          0x00004000
  52 #define SZ_32K                                          0x00008000
  53 #define SZ_64K                                          0x00010000
  54 #define SZ_128K                                         0x00020000
  55 #define SZ_256K                                         0x00040000
  56 #define SZ_512K                                         0x00080000
  57 #define SZ_1M                                           0x00100000
  58 #define SZ_2M                                           0x00200000
  59 #define SZ_4M                                           0x00400000
  60 #define SZ_8M                                           0x00800000
  61 #define SZ_16M                                          0x01000000
  62 #define SZ_32M                                          0x02000000
  63 #define SZ_64M                                          0x04000000
  64 #define SZ_128M                                         0x08000000
  65 #define SZ_256M                                         0x10000000
  66 #define SZ_512M                                         0x20000000
  67 #define SZ_1G                                           0x40000000
  68
  69 #define GPIO_DR                                         0x00
  70 #define GPIO_GDIR                                       0x04
  71 #define GPIO_PSR                                        0x08
  72
  73 #define STK5_LED_MASK                           (1 << 10)
  74 #define STK5_LED_REG_ADDR                       (GPIO4_BASE_ADDR + GPIO_DR)
  75
  76 #define LED_MAX_NUM                                     1
  77
  78 #define SOC_FEC_MAC_BASE                        (IIM_BASE_ADDR + 0xc24)
  79
  80 #define TX51_SDRAM_SIZE                         SDRAM_SIZE
  81
  82 #define LED_IS_ON(n) ({                                                 \
  83         CYG_WORD32 __val;                                                       \
  84         HAL_READ_UINT32(STK5_LED_REG_ADDR, __val);      \
  85         __val & STK5_LED_MASK;                                          \
  86 })
  87
  88 #define TURN_LED_ON(n)                                                  \
  89         CYG_MACRO_START                                                         \
  90         CYG_WORD32 __val;                                                       \
  91         HAL_READ_UINT32(STK5_LED_REG_ADDR, __val);      \
  92         __val |= STK5_LED_MASK;                                         \
  93         HAL_WRITE_UINT32(STK5_LED_REG_ADDR, __val);     \
  94         CYG_MACRO_END
  95
  96 #define TURN_LED_OFF(n)                                                 \
  97         CYG_MACRO_START                                                         \
  98         CYG_WORD32 __val;                                                       \
  99         HAL_READ_UINT32(STK5_LED_REG_ADDR, __val);      \
 100         __val &= ~STK5_LED_MASK;                                        \
 101         HAL_WRITE_UINT32(STK5_LED_REG_ADDR, __val);     \
 102         CYG_MACRO_END
 103
 104 #define BOARD_DEBUG_LED(n)                                              \
 105         CYG_MACRO_START                                                         \
 106         if (n >= 0 && n < LED_MAX_NUM) {                        \
 107                 if (LED_IS_ON(n))                                               \
 108                         TURN_LED_OFF(n);                                        \
 109                 else                                                                    \
 110                         TURN_LED_ON(n);                                         \
 111         }                                                                                       \
 112         CYG_MACRO_END
 113
 114 #define BLINK_LED(l, n)                                                 \
 115         CYG_MACRO_START                                                         \
 116         int _i;                                                                         \
 117         for (_i = 0; _i < (n); _i++) {                          \
 118                 BOARD_DEBUG_LED(l);                                             \
 119                 HAL_DELAY_US(200000);                                   \
 120                 BOARD_DEBUG_LED(l);                                             \
 121                 HAL_DELAY_US(300000);                                   \
 122         }                                                                                       \
 123         HAL_DELAY_US(1000000);                                          \
 124         CYG_MACRO_END
 125
 126 #if !defined(__ASSEMBLER__)
 127 void mxc_ipu_iomux_config(void);
 128
 129 enum {
 130         BOARD_TYPE_TX51KARO,
 131 };
 132
 133 #define gpio_tst_bit(grp, gpio)         _gpio_tst_bit(grp, gpio, __FUNCTION__, __LINE__)
 134 static inline int _gpio_tst_bit(int grp, int gpio, const char *func, int line)
 135 {
 136         if (grp < 1 || grp > 3) {
 137                 return 0;
 138         }
 139         if (gpio < 0 || gpio > 31) {
 140                 return 0;
 141         }
 142         unsigned long val = readl(GPIO1_BASE_ADDR + ((grp - 1) << 14) + GPIO_PSR);
 143         return !!(val & (1 << gpio));
 144 }
 145
 146 #include <cyg/infra/diag.h>
 147 static inline void gpio_set_bit(int grp, int gpio)
 148 {
 149         unsigned long val;
 150
 151         if (grp < 1 || grp > 4) {
 152                 return;
 153         }
 154         if (gpio < 0 || gpio > 31) {
 155                 return;
 156         }
 157         val = readl(GPIO1_BASE_ADDR + ((grp - 1) << 14) + GPIO_DR);
 158         writel(val | (1 << gpio), GPIO1_BASE_ADDR + ((grp - 1) << 14) + GPIO_DR);
 159         val = readl(GPIO1_BASE_ADDR + ((grp - 1) << 14) + GPIO_GDIR);
 160         writel(val | (1 << gpio), GPIO1_BASE_ADDR + ((grp - 1) << 14) + GPIO_GDIR);
 161 }
 162
 163 static inline void gpio_clr_bit(int grp, int gpio)
 164 {
 165         unsigned long val;
 166
 167         if (grp < 1 || grp > 4) {
 168                 return;
 169         }
 170         if (gpio < 0 || gpio > 31) {
 171                 return;
 172         }
 173         val = readl(GPIO1_BASE_ADDR + ((grp - 1) << 14) + GPIO_DR);
 174         writel(val & ~(1 << gpio), GPIO1_BASE_ADDR + ((grp - 1) << 14) + GPIO_DR);
 175         val = readl(GPIO1_BASE_ADDR + ((grp - 1) << 14) + GPIO_GDIR);
 176         writel(val | (1 << gpio), GPIO1_BASE_ADDR + ((grp - 1) << 14) + GPIO_GDIR);
 177 }
 178 #endif /* __ASSEMBLER__ */
 179
 180 #endif /* CYGONCE_KARO_TX51_H */