1 #ifndef CYGONCE_HAL_BOARD_PLATFORM_PLF_MMAP_H
2 #define CYGONCE_HAL_BOARD_PLATFORM_PLF_MMAP_H
3 //=============================================================================
7 // Platform specific memory map support
9 //=============================================================================
10 //####ECOSGPLCOPYRIGHTBEGIN####
11 // -------------------------------------------
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13 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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40 // -------------------------------------------
41 //####ECOSGPLCOPYRIGHTEND####
42 //===========================================================================
44 #include <cyg/hal/hal_misc.h>
45 #include CYGHWR_MEMORY_LAYOUT_H
47 // Get the pagesize for a particular virtual address:
49 // This does not depend on the vaddr.
50 #define HAL_MM_PAGESIZE(vaddr, pagesize) CYG_MACRO_START \
54 // Get the physical address from a virtual address:
56 #define HAL_VIRT_TO_PHYS_ADDRESS(vaddr, paddr) \
58 (paddr) = hal_virt_to_phy(vaddr); \
61 #define HAL_VIRT_TO_PHYS_ADDRESS(vaddr, paddr) \
63 cyg_uint32 _v_ = (cyg_uint32)(vaddr); \
64 if ( _v_ < 128 * SZ_1M ) /* SDRAM */ \
65 _v_ += SDRAM_BASE_ADDR; \
66 else /* Rest of it */ \
73 * translate the virtual address of ram space to physical address
74 * It is dependent on the implementation of hal_mmu_init
76 #ifndef RAM_BANK0_SIZE
77 #warning using SDRAM_SIZE for RAM_BANK0_SIZE
78 #define RAM_BANK0_SIZE SDRAM_SIZE
81 static unsigned long __inline__ hal_virt_to_phy(unsigned long virt)
85 a0000000 -> 90000000 + (SDRAM_SIZE / 2)
87 if (((virt & 0xF0000000) == CSD0_BASE_ADDR) ||
88 ((virt & 0xF0000000) == UNCACHED_RAM_BASE_VIRT)) {
91 if (virt < SDRAM_SIZE) {
92 return virt | (virt < RAM_BANK0_SIZE ? CSD0_BASE_ADDR : CSD1_BASE_ADDR);
94 if ((virt & 0xF0000000) == UNCACHED_RAM_BASE_VIRT) {
95 if (virt >= RAM_BANK0_SIZE) {
96 virt = virt - CSD0_BASE_ADDR + CSD1_BASE_ADDR - RAM_BANK0_SIZE;
103 * remap the physical address of ram space to uncacheable virtual address space
104 * It is dependent on the implementation of hal_mmu_init
106 static unsigned long __inline__ hal_ioremap_nocache(unsigned long phy)
108 /* (CSD0_BASE_ADDR + SZ_128M) .. (CSD0_BASE_ADDR + SZ_256M - 1) is
109 uncacheable memory space which is mapped to SDRAM */
110 if ((phy & 0xF0000000) == CSD0_BASE_ADDR) {
111 phy = (phy - CSD0_BASE_ADDR) | UNCACHED_RAM_BASE_VIRT;
113 if ((phy & 0xF0000000) == CSD1_BASE_ADDR) {
114 phy = (phy - CSD1_BASE_ADDR + CSD0_BASE_ADDR + RAM_BANK0_SIZE) | UNCACHED_RAM_BASE_VIRT;
119 #endif // CYGONCE_HAL_BOARD_PLATFORM_PLF_MMAP_H