packages/hal/arm/mx53/var/v2_0/include/hal_var_ints.h

   1 #ifndef CYGONCE_HAL_VAR_INTS_H
   2 #define CYGONCE_HAL_VAR_INTS_H
   3 //==========================================================================
   4 //
   5 //      hal_var_ints.h
   6 //
   7 //      HAL Interrupt and clock support
   8 //
   9 //==========================================================================
  10 //####ECOSGPLCOPYRIGHTBEGIN####
  11 // -------------------------------------------
  12 // This file is part of eCos, the Embedded Configurable Operating System.
  13 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
  14 //
  15 // eCos is free software; you can redistribute it and/or modify it under
  16 // the terms of the GNU General Public License as published by the Free
  17 // Software Foundation; either version 2 or (at your option) any later version.
  18 //
  19 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
  20 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
  21 // FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  22 // for more details.
  23 //
  24 // You should have received a copy of the GNU General Public License along
  25 // with eCos; if not, write to the Free Software Foundation, Inc.,
  26 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  27 //
  28 // As a special exception, if other files instantiate templates or use macros
  29 // or inline functions from this file, or you compile this file and link it
  30 // with other works to produce a work based on this file, this file does not
  31 // by itself cause the resulting work to be covered by the GNU General Public
  32 // License. However the source code for this file must still be made available
  33 // in accordance with section (3) of the GNU General Public License.
  34 //
  35 // This exception does not invalidate any other reasons why a work based on
  36 // this file might be covered by the GNU General Public License.
  37 //
  38 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
  39 // at http://sources.redhat.com/ecos/ecos-license/
  40 // -------------------------------------------
  41 //####ECOSGPLCOPYRIGHTEND####
  42 //==========================================================================
  43
  44 #include <cyg/hal/hal_soc.h>             // registers
  45
  46 #define CYGNUM_HAL_INTERRUPT_GPIO0       0
  47 #define CYGNUM_HAL_INTERRUPT_GPIO1       1
  48 #define CYGNUM_HAL_INTERRUPT_GPIO2       2
  49 #define CYGNUM_HAL_INTERRUPT_GPIO3       3
  50 #define CYGNUM_HAL_INTERRUPT_GPIO4       4
  51 #define CYGNUM_HAL_INTERRUPT_GPIO5       5
  52 #define CYGNUM_HAL_INTERRUPT_GPIO6       6
  53 #define CYGNUM_HAL_INTERRUPT_GPIO7       7
  54 #define CYGNUM_HAL_INTERRUPT_GPIO8       8
  55 #define CYGNUM_HAL_INTERRUPT_GPIO9       9
  56 #define CYGNUM_HAL_INTERRUPT_GPIO10      10
  57 #define CYGNUM_HAL_INTERRUPT_GPIO        11      // Don't use directly!
  58 #define CYGNUM_HAL_INTERRUPT_LCD         12
  59 #define CYGNUM_HAL_INTERRUPT_UDC         13
  60 #define CYGNUM_HAL_INTERRUPT_UART1       15
  61 #define CYGNUM_HAL_INTERRUPT_UART2       16
  62 #define CYGNUM_HAL_INTERRUPT_UART3       17
  63 #define CYGNUM_HAL_INTERRUPT_UART4       17
  64 #define CYGNUM_HAL_INTERRUPT_MCP         18
  65 #define CYGNUM_HAL_INTERRUPT_SSP         19
  66 #define CYGNUM_HAL_INTERRUPT_TIMER0      26
  67 #define CYGNUM_HAL_INTERRUPT_TIMER1      27
  68 #define CYGNUM_HAL_INTERRUPT_TIMER2      28
  69 #define CYGNUM_HAL_INTERRUPT_TIMER3      29
  70 #define CYGNUM_HAL_INTERRUPT_HZ          30
  71 #define CYGNUM_HAL_INTERRUPT_ALARM       31
  72
  73 // GPIO bits 31..11 can generate interrupts as well, but they all
  74 // end up clumped into interrupt signal #11.  Using the symbols
  75 // below allow for detection of these separately.
  76
  77 #define CYGNUM_HAL_INTERRUPT_GPIO11      (32 + 11)
  78 #define CYGNUM_HAL_INTERRUPT_GPIO12      (32 + 12)
  79 #define CYGNUM_HAL_INTERRUPT_GPIO13      (32 + 13)
  80 #define CYGNUM_HAL_INTERRUPT_GPIO14      (32 + 14)
  81 #define CYGNUM_HAL_INTERRUPT_GPIO15      (32 + 15)
  82 #define CYGNUM_HAL_INTERRUPT_GPIO16      (32 + 16)
  83 #define CYGNUM_HAL_INTERRUPT_GPIO17      (32 + 17)
  84 #define CYGNUM_HAL_INTERRUPT_GPIO18      (32 + 18)
  85 #define CYGNUM_HAL_INTERRUPT_GPIO19      (32 + 19)
  86 #define CYGNUM_HAL_INTERRUPT_GPIO20      (32 + 20)
  87 #define CYGNUM_HAL_INTERRUPT_GPIO21      (32 + 21)
  88 #define CYGNUM_HAL_INTERRUPT_GPIO22      (32 + 22)
  89 #define CYGNUM_HAL_INTERRUPT_GPIO23      (32 + 23)
  90 #define CYGNUM_HAL_INTERRUPT_GPIO24      (32 + 24)
  91 #define CYGNUM_HAL_INTERRUPT_GPIO25      (32 + 25)
  92 #define CYGNUM_HAL_INTERRUPT_GPIO26      (32 + 26)
  93 #define CYGNUM_HAL_INTERRUPT_GPIO27      (32 + 27)
  94
  95 #define CYGNUM_HAL_INTERRUPT_NONE        -1
  96
  97 #define CYGNUM_HAL_ISR_MIN                        0
  98 #define CYGNUM_HAL_ISR_MAX                       (27 + 32)
  99
 100 #define CYGNUM_HAL_ISR_COUNT             (CYGNUM_HAL_ISR_MAX + 1)
 101
 102 // The vector used by the Real time clock
 103 #define CYGNUM_HAL_INTERRUPT_RTC         CYGNUM_HAL_INTERRUPT_TIMER0
 104
 105 // The vector used by the Ethernet
 106 #define CYGNUM_HAL_INTERRUPT_ETH         CYGNUM_HAL_INTERRUPT_GPIO0
 107
 108 #define MX53_GPIO_NR(grp, pin)          ((grp) << 5 | (pin))
 109
 110 #define MX53_GPIO_ADDR(__bank) ({                                               \
 111         CYG_ADDRESS __addr;                                                                     \
 112         switch (__bank) {                                                                       \
 113         case 1:                                                                                         \
 114                 __addr = GPIO1_BASE_ADDR;                                               \
 115                 break;                                                                                  \
 116         case 2:                                                                                         \
 117                 __addr = GPIO2_BASE_ADDR;                                               \
 118                 break;                                                                                  \
 119         case 3:                                                                                         \
 120                 __addr = GPIO3_BASE_ADDR;                                               \
 121                 break;                                                                                  \
 122         case 4:                                                                                         \
 123                 __addr = GPIO4_BASE_ADDR;                                               \
 124                 break;                                                                                  \
 125         case 5:                                                                                         \
 126                 __addr = GPIO5_BASE_ADDR;                                               \
 127                 break;                                                                                  \
 128         case 6:                                                                                         \
 129                 __addr = GPIO6_BASE_ADDR;                                               \
 130                 break;                                                                                  \
 131         case 7:                                                                                         \
 132                 __addr = GPIO7_BASE_ADDR;                                               \
 133                 break;                                                                                  \
 134         default:                                                                                        \
 135                 __addr = (CYG_ADDRESS)0;                                                \
 136         }                                                                                                       \
 137         __addr;                                                                                         \
 138 })
 139
 140 #define gpio_direction_input(__gpio_nr)                                                                 \
 141         CYG_MACRO_START                                                                                                         \
 142         CYG_ADDRESS addr = MX53_GPIO_ADDR((__gpio_nr) / GPIO_NUM_PIN);          \
 143         CYG_WORD32 val;                                                                                                         \
 144                                                                                                                                                 \
 145         if (addr == 0)                                                                                                          \
 146                 return;                                                                                                                 \
 147                                                                                                                                                 \
 148         HAL_READ_UINT32(addr + GPIO_GDIR, val);                                                         \
 149         HAL_WRITE_UINT32(addr + GPIO_GDIR, val | (1 << ((__gpio_nr) % GPIO_NUM_PIN))); \
 150         CYG_MACRO_END
 151
 152 #define gpio_set_value(__gpio_nr, __value)                                                      \
 153         CYG_MACRO_START                                                                                                 \
 154         CYG_ADDRESS addr = MX53_GPIO_ADDR((__gpio_nr) / GPIO_NUM_PIN);  \
 155         CYG_WORD32 val;                                                                                                 \
 156                                                                                                                                         \
 157         if (addr == 0)                                                                                                  \
 158                 return;                                                                                                         \
 159                                                                                                                                         \
 160         HAL_READ_UINT32(addr + GPIO_DR, val);                                                   \
 161         if (__value)                                                                                                    \
 162                 val |= 1 << ((__gpio_nr) % GPIO_NUM_PIN);                                       \
 163         else                                                                                                                    \
 164                 val &= ~(1 << ((__gpio_nr) % GPIO_NUM_PIN));                            \
 165         HAL_WRITE_UINT32(addr + GPIO_DR, val);                                                  \
 166         CYG_MACRO_END
 167
 168 #define gpio_direction_output(__gpio_nr, __value)                                       \
 169         CYG_MACRO_START                                                                                                 \
 170         CYG_ADDRESS addr = MX53_GPIO_ADDR((__gpio_nr) / GPIO_NUM_PIN);  \
 171         int __gpio = (__gpio_nr) % GPIO_NUM_PIN;                                                \
 172         CYG_WORD32 val;                                                                                                 \
 173                                                                                                                                         \
 174         if (addr == 0)                                                                                                  \
 175                 return;                                                                                                         \
 176                                                                                                                                         \
 177         if ((__value) >= 0) {                                                                                   \
 178                 HAL_READ_UINT32(addr + GPIO_DR, val);                                           \
 179                 if (__value)                                                                                            \
 180                         val |= 1 << __gpio;                                                                             \
 181                 else                                                                                                            \
 182                         val &= ~(1 << __gpio);                                                                  \
 183                 HAL_WRITE_UINT32(addr + GPIO_DR, val);                                          \
 184         }                                                                                                                               \
 185         HAL_READ_UINT32(addr + GPIO_GDIR, val);                                                 \
 186         HAL_WRITE_UINT32(addr + GPIO_GDIR, val | (1 << __gpio));                \
 187         CYG_MACRO_END
 188
 189 #define gpio_get_value(__gpio_nr) ({                                                             \
 190         CYG_ADDRESS __addr = MX53_GPIO_ADDR((__gpio_nr) / GPIO_NUM_PIN); \
 191         CYG_WORD32 __val;                                                                                                \
 192                                                                                                                                          \
 193         if (__addr == 0)                                                                                                 \
 194                 return;                                                                                                          \
 195                                                                                                                                          \
 196         HAL_READ_UINT32(__addr + GPIO_PSR, __val);                                               \
 197         !!(__val & (1 << ((__gpio_nr) % GPIO_NUM_PIN)));                                 \
 198         })
 199
 200 // method for reading clock interrupt latency
 201 #ifdef CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY
 202 externC void hal_clock_latency(cyg_uint32 *);
 203 # define HAL_CLOCK_LATENCY(_pvalue_) \
 204                  hal_clock_latency((cyg_uint32 *)(_pvalue_))
 205 #endif
 206
 207 //----------------------------------------------------------------------------
 208 // Reset.
 209 #define HAL_PLATFORM_RESET()                                                                                    \
 210                 CYG_MACRO_START                                                                                                 \
 211                                 writel(readl(NFC_FLASH_CONFIG3_REG) & ~0x73, NFC_FLASH_CONFIG3_REG); \
 212                 *(volatile unsigned short *)WDOG_BASE_ADDR &= ~(1 << 4);                \
 213                                 /* hang here forever if reset fails */                                  \
 214                                 while (1){}                                                                                             \
 215                 CYG_MACRO_END
 216
 217 // Fallback (never really used)
 218 #define HAL_PLATFORM_RESET_ENTRY 0x00000000
 219
 220 #endif // CYGONCE_HAL_VAR_INTS_H