packages/hal/coldfire/arch/v2_0/include/hal_io.h

   1 #ifndef CYGONCE_HAL_HAL_IO_H
   2 #define CYGONCE_HAL_HAL_IO_H
   3
   4 //=============================================================================
   5 //
   6 //      hal_io.h
   7 //
   8 //      HAL device IO register support
   9 //
  10 //=============================================================================
  11 //####ECOSGPLCOPYRIGHTBEGIN####
  12 // -------------------------------------------
  13 // This file is part of eCos, the Embedded Configurable Operating System.
  14 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
  15 // Copyright (C) 2006 eCosCentric Ltd.
  16 //
  17 // eCos is free software; you can redistribute it and/or modify it under
  18 // the terms of the GNU General Public License as published by the Free
  19 // Software Foundation; either version 2 or (at your option) any later version.
  20 //
  21 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
  22 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
  23 // FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  24 // for more details.
  25 //
  26 // You should have received a copy of the GNU General Public License along
  27 // with eCos; if not, write to the Free Software Foundation, Inc.,
  28 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  29 //
  30 // As a special exception, if other files instantiate templates or use macros
  31 // or inline functions from this file, or you compile this file and link it
  32 // with other works to produce a work based on this file, this file does not
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  34 // License. However the source code for this file must still be made available
  35 // in accordance with section (3) of the GNU General Public License.
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  38 // this file might be covered by the GNU General Public License.
  39 // -------------------------------------------
  40 //####ECOSGPLCOPYRIGHTEND####
  41 //=============================================================================
  42 //#####DESCRIPTIONBEGIN####
  43 //
  44 // Author(s):     Enrico Piria
  45 // Contributors:  Wade Jensen
  46 // Date:          2005-25-06
  47 // Purpose:       Provide ColdFire-specific IO register definitions.
  48 // Usage:         #include <cyg/hal/hal_io.h>
  49 //
  50 //####DESCRIPTIONEND####
  51 //========================================================================
  52
  53 #include <cyg/infra/cyg_type.h>
  54
  55 // ---------------------------------------------------------------------------
  56 // IO Register address.
  57 // This type is for recording the address of an IO register.
  58
  59 typedef volatile CYG_ADDRWORD HAL_IO_REGISTER;
  60
  61 // ---------------------------------------------------------------------------
  62 // BYTE Register access.
  63 // Individual and vectorized access to 8 bit registers.
  64
  65 #define HAL_READ_UINT8( _register_, _value_ )           \
  66     CYG_MACRO_START                                     \
  67     ((_value_) = *((volatile CYG_BYTE *)(_register_))); \
  68     CYG_MACRO_END
  69
  70 #define HAL_WRITE_UINT8( _register_, _value_ )          \
  71     CYG_MACRO_START                                     \
  72     (*((volatile CYG_BYTE *)(_register_)) = (_value_)); \
  73     CYG_MACRO_END
  74
  75 #define HAL_READ_UINT8_VECTOR( _register_, _buf_, _count_, _step_ )     \
  76     CYG_MACRO_START                                                     \
  77     cyg_count32 _i_,_j_;                                                \
  78     for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) {   \
  79         (_buf_)[_i_] = ((volatile CYG_BYTE *)(_register_))[_j_];        \
  80     }                                                                   \
  81     CYG_MACRO_END
  82
  83 #define HAL_WRITE_UINT8_VECTOR( _register_, _buf_, _count_, _step_ )    \
  84     CYG_MACRO_START                                                     \
  85     cyg_count32 _i_,_j_;                                                \
  86     for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) {   \
  87         ((volatile CYG_BYTE *)(_register_))[_j_] = (_buf_)[_i_];        \
  88     }                                                                   \
  89     CYG_MACRO_END
  90
  91
  92 // ---------------------------------------------------------------------------
  93 // 16 bit access.
  94 // Individual and vectorized access to 16 bit registers.
  95
  96 #define HAL_READ_UINT16( _register_, _value_ )                  \
  97     CYG_MACRO_START                                             \
  98     ((_value_) = *((volatile CYG_WORD16 *)(_register_)));       \
  99     CYG_MACRO_END
 100
 101 #define HAL_WRITE_UINT16( _register_, _value_ )                 \
 102     CYG_MACRO_START                                             \
 103     (*((volatile CYG_WORD16 *)(_register_)) = (_value_));       \
 104     CYG_MACRO_END
 105
 106 #define HAL_READ_UINT16_VECTOR( _register_, _buf_, _count_, _step_ )    \
 107     CYG_MACRO_START                                                     \
 108     cyg_count32 _i_,_j_;                                                \
 109     for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) {   \
 110         (_buf_)[_i_] = ((volatile CYG_WORD16 *)(_register_))[_j_];      \
 111     }                                                                   \
 112     CYG_MACRO_END
 113
 114 #define HAL_WRITE_UINT16_VECTOR( _register_, _buf_, _count_, _step_ )   \
 115     CYG_MACRO_START                                                     \
 116     cyg_count32 _i_,_j_;                                                \
 117     for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) {   \
 118         ((volatile CYG_WORD16 *)(_register_))[_j_] = (_buf_)[_i_];      \
 119     }                                                                   \
 120     CYG_MACRO_END
 121
 122 // ---------------------------------------------------------------------------
 123 // 32 bit access.
 124 // Individual and vectorized access to 32 bit registers.
 125
 126 #define HAL_READ_UINT32( _register_, _value_ )                  \
 127     CYG_MACRO_START                                             \
 128     ((_value_) = *((volatile CYG_WORD32 *)(_register_)));       \
 129     CYG_MACRO_END
 130
 131 #define HAL_WRITE_UINT32( _register_, _value_ )                 \
 132     CYG_MACRO_START                                             \
 133     (*((volatile CYG_WORD32 *)(_register_)) = (_value_));       \
 134     CYG_MACRO_END
 135
 136 #define HAL_READ_UINT32_VECTOR( _register_, _buf_, _count_, _step_ )    \
 137     CYG_MACRO_START                                                     \
 138     cyg_count32 _i_,_j_;                                                \
 139     for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) {   \
 140         (_buf_)[_i_] = ((volatile CYG_WORD32 *)(_register_))[_j_];      \
 141     }                                                                   \
 142     CYG_MACRO_END
 143
 144 #define HAL_WRITE_UINT32_VECTOR( _register_, _buf_, _count_, _step_ )   \
 145     CYG_MACRO_START                                                     \
 146     cyg_count32 _i_,_j_;                                                \
 147     for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) {   \
 148         ((volatile CYG_WORD32 *)(_register_))[_j_] = (_buf_)[_i_];      \
 149     }                                                                   \
 150     CYG_MACRO_END
 151
 152 // ---------------------------------------------------------------------------
 153 // End of hal_io.h
 154 #endif // ifndef CYGONCE_HAL_HAL_IO_H