RedBoot for Starter-Kit V (STK5) Ka-Ro Electronics GmbH =========================================================== v1.5.5 (2012-09-25) Changes: TX27: - workaround for MPLL restart problem in i.MX27 date code 1230 and newer (see /Documentation/TX27PCN2012-09.pdf). - wait after enabling wdt clock in HAL_PLATFORM_RESET() to prevent possible hang in 'reset' command. - fix trampoline code change for archs that use the default CYGARC_HAL_MMU_OFF macro. v1.5.4 (2012-09-03) Fixup messed up source code from previous release v1.5.3 (2012-02-15) Changes: all modules: - fixed the trampoline code in redboot_linux_exec.c TX53: - fixed phys <-> virt address calculations - added support for 2 memory banks (1GiB) - fixed ATAG_MEM construction for banked memory - fixed MMU mappings v1.5.2 (2011-12-23) Changes: TX51: - add support for Toshiba NAND flash - implement workaround for ENGcm12051 (DPLL: Meta-stability Issue) TX53: - fix CCGR0 settings to enable JTAG interface v1.5.1 (2011-11-16) Changes: Fix FEC driver handling of 10BaseT link v1.5.0 (2010-06-16) Changes: Added support for TX53 v1.4.9 (2010-11-19) Changes: TX25: Added support for redundant WinCE image load v1.4.8 (2010-10-29) Changes: TX25: Added support for splash screen, enabled with: fconfig bootsplash_enable true LCD parameters: Name Default Value Description lcd_bpp: 16 LCD color depth (only 16bpp for now) lcd_buffer_addr: -2113929216 LCD frame buffer address (hex: 0x82000000) lcd_clk_period: 33333 Pixel clock period (in ps) lcd_clk_polarity: false Pixel clock polarity active low lcd_panel_width: 640 LCD panel width (in pixels) lcd_panel_height: 480 LCD panel height (in pixels) lcd_hsync_polarity: true HSYNC polarity active low lcd_hsync_width: 64 HSYNC pulse width (in pixels): 1 .. 64 lcd_margin_left: 96 Left margin (in pixels): 1 .. 256 lcd_margin_right: 80 Right margin (in pixels): 1 .. 256 lcd_margin_top: 46 Top margin (in scan lines): 0 .. 255 lcd_margin_bottom: 39 Bottom margin (in scan lines): 0 .. 255 lcd_vsync_polarity: true VSYNC polarity active low lcd_vsync_width: 3 VSYNC pulse width (in scan lines): 0 .. 63 Image data is loaded from the flash partition named 'logo' and can be stored either as a binary dump or in Windows .bmp format with 24bpp. Renamed config/TX25-40x0.ecc to config/TX25-40x1.ecc to be in sync with the module name v1.4.7 (2010-06-02) Changes: TX51: Added support for TX51-80x2 and TX51-80x1 (SDRAM clock selectable via cdl) v1.4.6 (2010-03-04) Changes: TX27: Fixed SDRAM timing according to application note from Micron. TX51: Fixed display of reset reason. Corrected DEBUG LED settings all modules: Disabled FIS CRC check to facilitate update of the Linux partition from within Linux (see RedBoot/README) v1.4.5 (2010-01-21) Changes: Added support for TX51-80x0 v1.4.4 (2009-09-15) Changes: Corrected SDRAM timing setup for TX25 that was accidentally broken in the previous release v1.4.3 (2009-08-19) Changes: switched to unified source tree for TX25,TX27,TX37 fixing some issues with bad block handling on TX27 v1.4.2 (2009-04-29) Changes: Corrected the SDRAM initialisation for TX27-4021 (128MiB SDRAM) module. v1.4.1 (2009-04-24) Changes: Fixed a bug that lead to writing the RedBoot config partition on every startup which would lead to excessive wearout of the flash. The patch ecos-tx27-update.patch should be applied before compiling RedBoot from source. v1.4 (2009-03-20) Changes: + 'RedBoot config' partition merged with 'FIS Directory' into one erase block + improved bad block handling + Flash partitioning changed due to the above NOTE: The Linux kernel expects the RedBoot partition table at a fixed block in flash determined by a configuration option. Thus the new RedBoot version will only work with the new Linux kernel. + MAC address stored in processor internal fuse array + new command: 'nand bad' to manually update the BBT