# ==================================================================== #####ECOSGPLCOPYRIGHTBEGIN#### ## ------------------------------------------- ## This file is part of eCos, the Embedded Configurable Operating System. ## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. ## ## eCos is free software; you can redistribute it and/or modify it under ## the terms of the GNU General Public License as published by the Free ## Software Foundation; either version 2 or (at your option) any later version. ## ## eCos is distributed in the hope that it will be useful, but WITHOUT ANY ## WARRANTY; without even the implied warranty of MERCHANTABILITY or ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ## for more details. ## ## You should have received a copy of the GNU General Public License along ## with eCos; if not, write to the Free Software Foundation, Inc., ## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ## ## As a special exception, if other files instantiate templates or use macros ## or inline functions from this file, or you compile this file and link it ## with other works to produce a work based on this file, this file does not ## by itself cause the resulting work to be covered by the GNU General Public ## License. However the source code for this file must still be made available ## in accordance with section (3) of the GNU General Public License. ## ## This exception does not invalidate any other reasons why a work based on ## this file might be covered by the GNU General Public License. ## ## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. ## at http://sources.redhat.com/ecos/ecos-license/ ## ------------------------------------------- #####ECOSGPLCOPYRIGHTEND#### # ==================================================================== ######DESCRIPTIONBEGIN#### # # Author(s): gthomas # Original data: gthomas # Contributors: # Date: 2000-05-08 # #####DESCRIPTIONEND#### # # ==================================================================== cdl_package CYGPKG_HAL_ARM_MX37 { display "Freescale SoC architecture" parent CYGPKG_HAL_ARM hardware include_dir cyg/hal define_header hal_arm_soc.h description " This HAL variant package provides generic support for the Freescale SoC. It is also necessary to select a specific target platform HAL package." implements CYGINT_HAL_ARM_ARCH_ARM9 implements CYGINT_HAL_VIRTUAL_VECTOR_COMM_BAUD_SUPPORT # Let the architectural HAL see this variant's interrupts file - # the SoC has no variation between targets here. define_proc { puts $::cdl_header "#define CYGBLD_HAL_VAR_INTS_H " puts $::cdl_system_header "#define CYGBLD_HAL_ARM_VAR_IO_H" puts $::cdl_header "#define CYGPRI_KERNEL_TESTS_DHRYSTONE_PASSES 1000000" } compile soc_diag.c soc_misc.c compile -library=libextras.a cmds.c cdl_option CYGHWR_HAL_ARM_SOC_PROCESSOR_CLOCK { display "Processor clock rate" active_if { CYG_HAL_STARTUP == "ROM" } flavor data legal_values 150000 200000 default_value { CYGHWR_HAL_ARM_SOC_PROCESSOR_CLOCK_OVERRIDE_DEFAULT ? CYGHWR_HAL_ARM_SOC_PROCESSOR_CLOCK_OVERRIDE_DEFAULT : 150000} description " The processor can run at various frequencies. These values are expressed in KHz. Note that there are several steppings of the rate to run at different maximum frequencies. Check the specs to make sure that your particular processor can run at the rate you select here." } # Real-time clock/counter specifics cdl_component CYGNUM_HAL_RTC_CONSTANTS { display "Real-time clock constants" flavor none no_define cdl_option CYGNUM_HAL_RTC_NUMERATOR { display "Real-time clock numerator" flavor data calculated 1000000000 } cdl_option CYGNUM_HAL_RTC_DENOMINATOR { display "Real-time clock denominator" flavor data default_value 100 description " This option selects the heartbeat rate for the real-time clock. The rate is specified in ticks per second. Change this value with caution - too high and your system will become saturated just handling clock interrupts, too low and some operations such as thread scheduling may become sluggish." } cdl_option CYGNUM_HAL_RTC_PERIOD { display "Real-time clock period" flavor data calculated (3686400/CYGNUM_HAL_RTC_DENOMINATOR) ;# Clock for OS Timer is 3.6864MHz } } # Control over hardware layout. cdl_interface CYGHWR_HAL_ARM_SOC_UART1 { display "UART1 available as diagnostic/debug channel" description " The chip has multiple serial channels which may be used for different things on different platforms. This interface allows a platform to indicate that the specified serial port can be used as a diagnostic and/or debug channel." } cdl_interface CYGHWR_HAL_ARM_SOC_UART2 { display "UART2 available as diagnostic/debug channel" description " The chip has multiple serial channels which may be used for different things on different platforms. This interface allows a platform to indicate that the specified serial port can be used as a diagnostic and/or debug channel." } cdl_interface CYGHWR_HAL_ARM_SOC_UART3 { display "UART3 available as diagnostic/debug channel" description " The chip has multiple serial channels which may be used for different things on different platforms. This interface allows a platform to indicate that the specified serial port can be used as a diagnostic and/or debug channel." } cdl_interface CYGHWR_HAL_ARM_SOC_UART4 { display "UART4 available as diagnostic/debug channel" description " The chip has multiple serial channels which may be used for different things on different platforms. This interface allows a platform to indicate that the specified serial port can be used as a diagnostic and/or debug channel." } cdl_interface CYGHWR_HAL_ARM_SOC_UART5 { display "UART5 available as diagnostic/debug channel" description " The chip has multiple serial channels which may be used for different things on different platforms. This interface allows a platform to indicate that the specified serial port can be used as a diagnostic and/or debug channel." } }