TX51 Release 2011-07-27

[karo-tx-redboot.git] / config / TX51-80x0.ecc

diff --git a/config/TX51-80x0.ecc b/config/TX51-80x0.ecc
index bb5b40cd35758505eeb34af9415c49ff3e22621e..8ea46ed180c5ff3f1fe7ec3798c9e10107467b15 100644 (file)
--- a/config/TX51-80x0.ecc
+++ b/config/TX51-80x0.ecc
@@ -794,24 +794,6 @@ cdl_option CYGPKG_DEVS_ETH_FEC_CFLAGS_ADD {
 };
 
 # <
-# MXC FEC MII Gasket for RMII mode
-# This option enables the use of the MII Gasket for
-# RMII mode found in i.MX25 and i.MX53 processors.
-#
-cdl_option CYGOPT_HAL_ARM_MXC_FEC_MIIGSK {
-    # This option is not active
-    # ActiveIf constraint: CYGPKG_HAL_ARM_MX25 || CYGPKG_HAL_ARM_MX53
-    #     CYGPKG_HAL_ARM_MX25 (unknown) == 0
-    #     CYGPKG_HAL_ARM_MX53 (unknown) == 0
-    #   --> 0
-
-    # Flavor: bool
-    # No user value, uncomment the following line to provide one.
-    # user_value 1
-    # value_source default
-    # Default value: 1
-};
-
 # <
 # Ethernet transceiver (PHY) support
 # API for ethernet PHY devices
@@ -3457,7 +3439,7 @@ cdl_option CYGNUM_HAL_ARM_TX51_SDRAM_SIZE {
 };
 
 # SDRAM clock
-# This option specifies the SDRAM clock im MHz of the TX51 module.
+# This option specifies the SDRAM clock in MHz of the TX51 module.
 #
 cdl_option CYGNUM_HAL_ARM_TX51_SDRAM_CLK {
     # Flavor: data
@@ -3468,6 +3450,18 @@ cdl_option CYGNUM_HAL_ARM_TX51_SDRAM_CLK {
     # Legal values:  166 200 
 };
 
+# CPU clock
+# This option specifies the CPU clock in MHz of the TX51 module.
+#
+cdl_option CYGNUM_HAL_ARM_TX51_CPU_CLK {
+    # Flavor: data
+    # No user value, uncomment the following line to provide one.
+    # user_value 800
+    # value_source default
+    # Default value: 800
+    # Legal values:  600 800 
+};
+
 # Enable low level debugging with LED
 # This option enables low level debugging by blink codes
 # of the LED on STK5.