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+NAME="RT-MN10300-STDEVAL1">Board: Matsushita STDEVAL1 Board</H1
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+CLASS="LITERALLAYOUT"
+> Board: Matsushita STDEVAL1 Board
+
+CPU : MN103002A 60MHz
+
+eCOS Kernel Timings
+Note: all times are in microseconds (.000001) unless otherwise stated
+
+Reading the hardware clock takes 18 'ticks' overhead
+... this value will be factored out of all other measurements
+Clock interrupt took 13.73 microseconds (205 raw clock ticks)
+
+Testing parameters:
+ Clock samples: 32
+ Threads: 24
+ Thread switches: 128
+ Mutexes: 32
+ Mailboxes: 32
+ Semaphores: 32
+ Scheduler operations: 128
+ Counters: 32
+ Alarms: 32
+
+
+ Confidence
+ Ave Min Max Var Ave Min Function
+ ====== ====== ====== ====== ========== ========
+ 14.36 11.53 23.53 1.81 54% 33% Create thread
+ 2.64 2.53 5.07 0.20 95% 95% Yield thread [all suspended]
+ 2.25 1.93 4.80 0.31 45% 83% Suspend [suspended] thread
+ 2.19 2.00 4.93 0.28 91% 91% Resume thread
+ 3.42 3.00 8.40 0.47 95% 87% Set priority
+ 0.31 0.13 1.20 0.19 79% 58% Get priority
+ 8.26 7.40 18.80 0.93 95% 87% Kill [suspended] thread
+ 2.58 2.47 5.13 0.21 95% 95% Yield [no other] thread
+ 5.07 4.53 8.67 0.44 62% 50% Resume [suspended low prio] thread
+ 2.27 2.07 4.53 0.23 87% 87% Resume [runnable low prio] thread
+ 4.76 4.07 9.40 0.65 66% 75% Suspend [runnable] thread
+ 2.63 2.53 4.73 0.18 95% 95% Yield [only low prio] thread
+ 2.09 1.87 4.27 0.27 91% 79% Suspend [runnable->not runnable]
+ 10.79 10.00 18.20 0.81 95% 79% Kill [runnable] thread
+ 20.30 18.40 28.80 1.42 79% 54% Resume [high priority] thread
+ 5.53 5.47 12.13 0.11 98% 97% Thread switch
+
+ 0.28 0.27 2.20 0.03 97% 97% Scheduler lock
+ 1.14 1.13 2.00 0.01 99% 99% Scheduler unlock [0 threads]
+ 1.14 1.13 2.40 0.02 99% 99% Scheduler unlock [1 suspended]
+ 1.16 1.13 3.33 0.06 95% 95% Scheduler unlock [many suspended]
+ 1.23 1.20 3.13 0.05 95% 95% Scheduler unlock [many low prio]
+
+ 1.29 1.00 4.20 0.25 65% 50% Init mutex
+ 2.65 2.47 5.27 0.23 93% 87% Lock [unlocked] mutex
+ 3.26 3.07 6.80 0.28 93% 87% Unlock [locked] mutex
+ 2.48 2.33 5.07 0.21 90% 87% Trylock [unlocked] mutex
+ 2.20 2.07 4.67 0.21 93% 87% Trylock [locked] mutex
+ 0.23 0.20 1.00 0.05 96% 93% Destroy mutex
+ 25.11 24.73 27.53 0.21 65% 31% Unlock/Lock mutex
+
+ 2.49 2.00 5.73 0.32 81% 37% Create mbox
+ 0.11 0.00 1.60 0.15 84% 81% Peek [empty] mbox
+ 3.01 2.60 9.47 0.52 96% 78% Put [first] mbox
+ 0.10 0.00 1.67 0.15 87% 81% Peek [1 msg] mbox
+ 3.09 2.60 8.33 0.50 93% 75% Put [second] mbox
+ 0.06 0.00 1.13 0.08 96% 87% Peek [2 msgs] mbox
+ 3.10 2.80 7.93 0.40 93% 84% Get [first] mbox
+ 3.13 2.80 7.53 0.43 90% 78% Get [second] mbox
+ 2.99 2.60 8.53 0.52 93% 75% Tryput [first] mbox
+ 2.65 2.33 6.80 0.42 90% 78% Peek item [non-empty] mbox
+ 3.05 2.73 7.60 0.42 93% 78% Tryget [non-empty] mbox
+ 3.16 2.93 6.27 0.31 84% 84% Peek item [empty] mbox
+ 2.48 2.27 5.73 0.30 84% 84% Tryget [empty] mbox
+ 0.23 0.13 2.07 0.14 96% 87% Waiting to get mbox
+ 0.22 0.13 1.93 0.13 96% 75% Waiting to put mbox
+ 3.08 2.80 7.93 0.42 84% 84% Delete mbox
+ 16.01 15.53 19.00 0.52 78% 59% Put/Get mbox
+
+ 0.85 0.67 3.27 0.19 96% 50% Init semaphore
+ 2.00 1.93 3.87 0.12 96% 90% Post [0] semaphore
+ 2.05 2.00 3.47 0.09 96% 96% Wait [1] semaphore
+ 1.85 1.80 3.47 0.10 96% 96% Trywait [0] semaphore
+ 1.82 1.80 2.53 0.04 96% 96% Trywait [1] semaphore
+ 0.36 0.33 1.33 0.06 96% 96% Peek semaphore
+ 0.38 0.33 1.87 0.09 96% 96% Destroy semaphore
+ 12.38 12.20 16.27 0.30 93% 87% Post/Wait semaphore
+
+ 1.18 0.73 4.07 0.24 78% 18% Create counter
+ 0.20 0.13 1.40 0.11 87% 87% Get counter value
+ 0.24 0.20 1.40 0.08 93% 93% Set counter value
+ 3.17 3.13 4.20 0.07 93% 93% Tick counter
+ 0.44 0.40 1.73 0.08 96% 96% Delete counter
+
+ 2.24 1.67 5.13 0.47 68% 65% Create alarm
+ 3.86 3.40 9.67 0.51 90% 78% Initialize alarm
+ 0.15 0.07 1.60 0.12 96% 68% Disable alarm
+ 3.76 3.47 7.67 0.35 93% 75% Enable alarm
+ 0.57 0.47 2.73 0.16 96% 84% Delete alarm
+ 3.64 3.60 4.73 0.07 96% 96% Tick counter [1 alarm]
+ 21.72 21.67 23.27 0.10 96% 96% Tick counter [many alarms]
+ 6.13 6.07 8.07 0.12 96% 96% Tick & fire counter [1 alarm]
+ 101.40 99.53 132.73 2.75 93% 93% Tick & fire counters [>1 together]
+ 24.21 24.13 26.40 0.14 96% 96% Tick & fire counters [>1 separately]
+ 11.74 11.60 22.67 0.26 98% 98% Alarm latency [0 threads]
+ 14.58 11.73 24.93 1.59 54% 28% Alarm latency [2 threads]
+ 18.18 15.20 41.07 1.96 60% 43% Alarm latency [many threads]
+
+ 3.06 2.13 10.33 0.00 Clock/interrupt latency
+
+Timing complete - 23480 ms total
+
+PASS:<Basic timing OK>
+EXIT:<done>
+
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