if (!gpio_tst_bit(2, 14)) {
diag_printf("**Failed to release PHY reset\n");
}
- HAL_DELAY_US(400);
+ /*
+ * Due to an RC-filter in the PHY RESET line, a minimum
+ * delay of 535us is required to let the RESET line rise
+ * above the logic high threshold of the PHY input pin.
+ */
+ HAL_DELAY_US(550);
/* configure all FEC pins to their required functions */
for (i = 0; i < NUM_ELEMS(tx51_fec_gpio_data); i++) {