*b_v = FLASH_Block_Erase;
*b_v = FLASH_Confirm;
- timeout = 50000000;
+ timeout = CYGNUM_DEVS_FLASH_INTEL_28FXXX_TIMEOUT ;
while(((stat = *b_v) & FLASH_Status_Ready) != FLASH_Status_Ready) {
if (--timeout == 0) break;
}
volatile flash_data_t* data_p = (flash_data_t*) data;
int res = FLASH_ERR_OK;
-
+
// Base address of device(s) being programmed.
ROM = FLASH_P2V((unsigned long)addr & flash_dev_info->base_mask);
BA = FLASH_P2V((unsigned long)addr & ~(flash_dev_info->block_size - 1));
wc = (wc + 1) & ~0x1;
- timeout = 50000000;
+ timeout = CYGNUM_DEVS_FLASH_INTEL_28FXXX_TIMEOUT;
do {
*addr_v = FLASH_Write_Buffer_M18;
if (--timeout == 0) {
// confirm
*addr_p = FLASH_Confirm;
- timeout = 50000000;
+ timeout = CYGNUM_DEVS_FLASH_INTEL_28FXXX_TIMEOUT;
while(((stat = *addr_p) & FLASH_Status_Ready) != FLASH_Status_Ready) {
if (--timeout == 0) {
res = FLASH_ERR_DRV_TIMEOUT;
if (wc > len) wc = len;
len -= wc;
wc = wc / ((CYGNUM_FLASH_WIDTH/8)*CYGNUM_FLASH_INTERLEAVE); // Word count
- timeout = 50000000;
+ timeout = CYGNUM_DEVS_FLASH_INTEL_28FXXX_TIMEOUT;
*BA = FLASH_Write_Buffer;
while(((stat = BA[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) {
*BA = FLASH_Confirm;
*BA = FLASH_Read_Status;
- timeout = 50000000;
+ timeout = CYGNUM_DEVS_FLASH_INTEL_28FXXX_TIMEOUT;
while(((stat = BA[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) {
if (--timeout == 0) {
res = FLASH_ERR_DRV_TIMEOUT;
while (len > 0) {
addr_v = FLASH_P2V(addr_p++);
- *addr_v = FLASH_Program;
+ *addr_v = FLASH_Program;
*addr_v = *data_p;
- timeout = 50000000;
+ timeout = CYGNUM_DEVS_FLASH_INTEL_28FXXX_TIMEOUT;
while(((stat = *addr_v) & FLASH_Status_Ready) != FLASH_Status_Ready) {
if (--timeout == 0) {
res = FLASH_ERR_DRV_TIMEOUT;
volatile flash_data_t *ROM;
int res = FLASH_ERR_OK;
flash_data_t state;
- int timeout = 5000000;
+ int timeout = CYGNUM_DEVS_FLASH_INTEL_28FXXX_TIMEOUT;
volatile flash_data_t* b_p = (flash_data_t*) block;
volatile flash_data_t *b_v;
cyg_bool bootblock;
}
CYGHWR_FLASH_WRITE_ENABLE();
-
+
while (len > 0) {
b_v = FLASH_P2V(b_p);
#ifdef CYGPKG_HAL_ARM_MXC30031ADS
volatile flash_data_t *ROM;
int res = FLASH_ERR_OK;
flash_data_t state;
- int timeout = 5000000;
+ int timeout = CYGNUM_DEVS_FLASH_INTEL_28FXXX_TIMEOUT;
volatile flash_data_t* b_p = (flash_data_t*) block;
volatile flash_data_t *b_v;
// Clears all lock bits
ROM[0] = FLASH_Clear_Lock;
ROM[0] = FLASH_Clear_Lock_Confirm; // Confirmation
- timeout = 5000000;
+ timeout = CYGNUM_DEVS_FLASH_INTEL_28FXXX_TIMEOUT;
while(((state = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) {
if (--timeout == 0) break;
}
if (is_locked[i]) {
*b_v = FLASH_Set_Lock;
*b_v = FLASH_Set_Lock_Confirm; // Confirmation
- timeout = 5000000;
+ timeout = CYGNUM_DEVS_FLASH_INTEL_28FXXX_TIMEOUT;
while(((state = ROM[0]) & FLASH_Status_Ready)
!= FLASH_Status_Ready) {
if (--timeout == 0){
// Clears all lock bits
ROM[0] = FLASH_Clear_Locks;
ROM[0] = FLASH_Clear_Locks_Confirm; // Confirmation
- timeout = 5000000;
+ timeout = CYGNUM_DEVS_FLASH_INTEL_28FXXX_TIMEOUT;
while(((stat = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) {
if (--timeout == 0) break;
}
if (is_locked[i]) {
*bpv = FLASH_Set_Lock;
*bpv = FLASH_Set_Lock_Confirm; // Confirmation
- timeout = 5000000;
+ timeout = CYGNUM_DEVS_FLASH_INTEL_28FXXX_TIMEOUT;
while(((stat = ROM[0]) & FLASH_Status_Ready) != FLASH_Status_Ready) {
if (--timeout == 0) break;
}