+2008-07-12 Andrew Lunn <andrew.lunn@ascom.ch>
+
+ * src/hal_diag_dcc.{ch}
+ * src/hal_diag.c
+ * src/hal_diag_dbg.c
+ * cdl/hal_arm_at91.cdl: Add support for DCC, ie the Debug
+ Communications Channel, which is part of JTAG core of AT91 and
+ most ARM processors. JTAG devices often make this available via a
+ TCP port which can be accessed via telnet. NOTE: Only output to
+ DCC has been tested via diag_printf. Code exists for input, but it
+ has not been tested.
+
+2007-03-05 Andrew Lunn <andrew.lunn@ascom.ch>
+
+ * include/var_io.h: Fix a few typos pointed out by
+ Igor B. Poretsky.
+
+2007-02-13 John Eigelaar <jeigelaar@mweb.co.za>
+
+ * include/var_io.h: Fixed up the EMAC definitions to work
+ with the brand new EMAC driver
+
+2007-02-01 Andrew Lunn <andrew.lunn@ascom.ch>
+
+ * include/var_io.h: Added PWM registers.
+
+2007-01-25 Andrew Lunn <andrew.lunn@ascom.ch>
+
+ * include/var_io.h (AT91_PITC_VALUE_MASK): New - mask to access
+ the PITC value which is a 20 bit number.
+ * src/timer_pit.c: Change all hard coded mask for the period,
+ some of which were wrong, to use AT91_PITC_VALUE_MASK.
+ When initializing the PIT, remember to decrement the period first.
+ Bugs found by Jim Seymour.
+
+2006-09-08 John Eigelaar <jeigelaar@mweb.co.za>
+
+ * include/var_io.h: Added definition for SPI MODFDIS bit
+
+2006-08-31 Oyvind Harboe <oyvind.harboe@zylin.com>
+
+ * src/at91_misc.c: Now also resets external circuitry via
+ AT91_WD_OMR_EXTEN
+
+2006-06-01 John Eigelaar <jeigelaar@mweb.co.za>
+
+ * include/var_io.h: Added SPI PDC register definitions
+
+2006-05-20 John Eigelaar <jeigelaar@mweb.co.za>
+
+ * include/var_io.h: AT91SAM7X pin definitions
+ * include/hal_platform_int.h: AT91SAM7X interrupts
+ * include/plf_io.h: AT91SAM7X device addresses.
+
+2006-05-20 Andrew Lunn <andrew.lunn@ascom.ch>
+
+ * cdl/hal_arm_at91sam7s.cdl: Rename to AT91SAM7 and add support
+ for AT91SAM7X, based on code from John Eigelaar.
+ * include/var_io.h: add CAN, TWI and ADC registers.
+
+2006-05-17 Andrew Lunn <andrew.lunn@ascom.ch>
+
+ * include/var_io.h: Add macros to manipulate the PIO controllers.
+
+2006-05-10 Andrew Lunn <andrew.lunn@ascom.ch>
+
+ * include/var_io.h: Added the Ethernet MAC registers.
+
+2006-04-26 John Eigelaar <jeigelaar@mweb.co.za>
+
+ * include/var_io.h: Fix typo's in the USB register definitions
+ and add definitions for the S2C controller.
+
+2006-03-10 Oliver Munz <munz@speag.ch>
+
+ * src/timer_pit.c: fix hal_delay_us(). hal_clock_read for
+ initializing the PIT if needed. Change hal_clock_reset() to allow
+ setting of a new period. This is required when the timer is
+ started by hal_delay_us() or hal_clock_read() before
+ hal_clock_initialize().
+
+2006-03-23 Andrew Lunn <andrew.lunn@ascom.ch>
+
+ * src/timer_pit.c (hal_delay_us): Start the PIT if it is not
+ running when hal_delay_us is called. This happens when the kernel
+ is not used. Problem found by Oliver Munz.
+
+2006-03-10 Oliver Munz <munz@speag.ch>
+
+ * src/hal_diag.c (cyg_hal_plf_serial_isr): Change the #ifdefs to
+ cleanly match the CDL.
+
+2006-02-28 Andrew Lunn <andrew.lunn@ascom.ch>
+ Oliver Munz <munz@speag.ch>
+
+ * include/var_io.h (AT91_US_PTCR_RXTDIS): Add bit fields for the
+ USART DMA control register.
+
+2006-02-25 Andrew Lunn <andrew.lunn@ascom.ch>
+
+ * include/var_io.h: Added the USB device registers.
+
+2006-02-19 Andrew Lunn <andrew.lunn@ascom.ch>
+ Oliver Munz <munz@speag.ch>
+
+ * cdl/hal_arm_at9a.cdl: Add the AT91SAM7S variant and control
+ for new timer and debug usart code.
+ * include/var_io.h: Register definitions for AT91SAM7S
+ * include/var_arch.h: Idle action for AT91SAM7S
+ * src/at91_misc.c (hal_hardware_init): Call HAL_PLF_HARDWARE_INIT
+ for any platform specific initialization
+ * src/at91_misc.c (hal_at91_reset_cpu): Use the reset controller
+ if it exists.
+ * src/at91_misc.c (hal_IRQ_handler): Decode interrupts from
+ the system controller if it exists.
+ * src/timer_tc.c (NEW) eCos timer using the Timer Counter
+ * src/timer_pit.c (NEW) eCos timer using Periodic Interval Timer
+ * src/hal_diag_dbg.c (NEW) Debug output via debug UART.
+ * src/hal_diag.h: Indicate hal_at91_reset_cpu() is a C function
+ otherwise we have problems with the watchdog driver which is C++.
2005-05-30 Ezequiel Conde <ezeq@cc.isel.ipl.pt>