TX51 pre-release

[karo-tx-redboot.git] / packages / hal / arm / mx25 / karo / v1_0 / src / tx25_misc.c

diff --git a/packages/hal/arm/mx25/karo/v1_0/src/tx25_misc.c b/packages/hal/arm/mx25/karo/v1_0/src/tx25_misc.c
index 013788198e97f88e667c710eb6dbf3a7fb860f74..21ca7665814cf1f4f5d00861f43516813f6d19b3 100644 (file)
--- a/packages/hal/arm/mx25/karo/v1_0/src/tx25_misc.c
+++ b/packages/hal/arm/mx25/karo/v1_0/src/tx25_misc.c
@@ -107,10 +107,10 @@ static void dump_reg(unsigned long addr)
 #endif
 
 #define SD_SZ          (RAM_BANK0_SIZE >> 20)
 #endif
 
 #define SD_SZ          (RAM_BANK0_SIZE >> 20)

-#define SD_B0          0x800
-#define SD_B1          (0x800 + SD_SZ)
-#define SD_B2          (0x880 + SD_SZ)

 #ifdef RAM_BANK1_SIZE
 #ifdef RAM_BANK1_SIZE

+#define SD_B0          0x800
+#define SD_B1          (SD_B0 + SD_SZ)
+#define SD_B2          (SD_B0 + 0x80 + SD_SZ)

 #define SD_HI          (0x900 + ((RAM_BANK1_SIZE >> 20) - 1))
 #endif
 
 #define SD_HI          (0x900 + ((RAM_BANK1_SIZE >> 20) - 1))
 #endif
 


@@ -140,8 +140,8 @@ void hal_mmu_init(void)
        /*                      xxx00000 */
        X_ARM_MMU_SECTION(0x000, 0xF00, 0x001, ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* Boot Rom */
        X_ARM_MMU_SECTION(0x43f, 0x43f, 0x3c1, ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* Internal Registers */
        /*                      xxx00000 */
        X_ARM_MMU_SECTION(0x000, 0xF00, 0x001, ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* Boot Rom */
        X_ARM_MMU_SECTION(0x43f, 0x43f, 0x3c1, ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* Internal Registers */

-       X_ARM_MMU_SECTION(0x800, 0x000, SD_SZ, ARM_CACHEABLE,   ARM_BUFFERABLE,   ARM_ACCESS_PERM_RW_RW); /* SDRAM */
-       X_ARM_MMU_SECTION(0x800, 0x800, SD_SZ, ARM_CACHEABLE,   ARM_BUFFERABLE,   ARM_ACCESS_PERM_RW_RW); /* SDRAM */
+       X_ARM_MMU_SECTION(0x800, 0x000, SD_SZ, ARM_UNCACHEABLE,   ARM_BUFFERABLE,   ARM_ACCESS_PERM_RW_RW); /* SDRAM */
+       X_ARM_MMU_SECTION(0x800, 0x800, SD_SZ, ARM_UNCACHEABLE,   ARM_BUFFERABLE,   ARM_ACCESS_PERM_RW_RW); /* SDRAM */

        X_ARM_MMU_SECTION(0x800, 0x880, SD_SZ, ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* SDRAM */
 #ifdef RAM_BANK1_SIZE
        X_ARM_MMU_SECTION(0x900, SD_SZ, SD_SZ, ARM_CACHEABLE,   ARM_BUFFERABLE,   ARM_ACCESS_PERM_RW_RW); /* SDRAM */
        X_ARM_MMU_SECTION(0x800, 0x880, SD_SZ, ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* SDRAM */
 #ifdef RAM_BANK1_SIZE
        X_ARM_MMU_SECTION(0x900, SD_SZ, SD_SZ, ARM_CACHEABLE,   ARM_BUFFERABLE,   ARM_ACCESS_PERM_RW_RW); /* SDRAM */


@@ -172,7 +172,7 @@ static void fec_gpio_init(void)
 {
        /* GPIOs to set up for TX25/Starterkit-5:
           Function       GPIO  Dir  act.  FCT
 {
        /* GPIOs to set up for TX25/Starterkit-5:
           Function       GPIO  Dir  act.  FCT

-                                     Lvl   
+                                 Lvl

           FEC_RESET      PB30  OUT  LOW   GPIO
           FEC_ENABLE     PB27  OUT  HIGH  GPIO
           OSCM26_ENABLE  PB22  OUT  HIGH  GPIO
           FEC_RESET      PB30  OUT  LOW   GPIO
           FEC_ENABLE     PB27  OUT  HIGH  GPIO
           OSCM26_ENABLE  PB22  OUT  HIGH  GPIO


@@ -233,7 +233,7 @@ static void fec_gpio_init(void)
        writel(0, IOMUXC_BASE_ADDR + 0x01D4);
        writel(0x40, IOMUXC_BASE_ADDR + 0x03CC);
 
        writel(0, IOMUXC_BASE_ADDR + 0x01D4);
        writel(0x40, IOMUXC_BASE_ADDR + 0x03CC);
 

-       /* 
+       /*

         * Set up the FEC_RESET_B and FEC_ENABLE GPIO pins.
         * Assert FEC_RESET_B, then power up the PHY by asserting
         * FEC_ENABLE, at the same time lifting FEC_RESET_B.
         * Set up the FEC_RESET_B and FEC_ENABLE GPIO pins.
         * Assert FEC_RESET_B, then power up the PHY by asserting
         * FEC_ENABLE, at the same time lifting FEC_RESET_B.


@@ -305,7 +305,7 @@ int tx25_mac_addr_program(unsigned char mac_addr[ETHER_ADDR_LEN])
 
                if ((fuse | mac_addr[i]) != mac_addr[i]) {
                        diag_printf("MAC address fuse cannot be programmed: fuse[%d]=0x%02x -> 0x%02x\n",
 
                if ((fuse | mac_addr[i]) != mac_addr[i]) {
                        diag_printf("MAC address fuse cannot be programmed: fuse[%d]=0x%02x -> 0x%02x\n",

-                                   i, fuse, mac_addr[i]);
+                                               i, fuse, mac_addr[i]);

                        return -1;
                }
                if (fuse != mac_addr[i]) {
                        return -1;
                }
                if (fuse != mac_addr[i]) {


@@ -331,7 +331,7 @@ int tx25_mac_addr_program(unsigned char mac_addr[ETHER_ADDR_LEN])
                        }
                        if (fuse_blow(0, i + ((SOC_MAC_ADDR_BASE & 0xff) >> 2), bit)) {
                                diag_printf("Failed to blow fuse bank 0 row %d bit %d\n",
                        }
                        if (fuse_blow(0, i + ((SOC_MAC_ADDR_BASE & 0xff) >> 2), bit)) {
                                diag_printf("Failed to blow fuse bank 0 row %d bit %d\n",

-                                           i, bit);
+                                                       i, bit);

                                ret = -1;
                                goto out;
                        }
                                ret = -1;
                                goto out;
                        }