#endif
#include CYGBLD_HAL_PLATFORM_H
#include <cyg/hal/plf_mmap.h>
-#include <cyg/hal/karo_tx25.h> // Platform specific hardware definitions
+#include CYGBLD_HAL_PLF_DEFS_H // Platform specific hardware definitions
#define LCDC_BASE 0x53fbc000
unsigned long left;
unsigned long right;
/* control signal polarities */
- bool pixclk_pol;
+ bool pix_pol;
+ bool clk_pol;
bool hsync_pol;
bool vsync_pol;
} LCDDIM;
ok = get_var("lcd_buffer_addr", &ldim->frame_buffer, CONFIG_INT);
ok &= get_var("lcd_clk_period", &ldim->pixclk, CONFIG_INT);
- ok &= get_var("lcd_clk_polarity", &ldim->pixclk_pol, CONFIG_BOOL);
+ ok &= get_var("lcd_clk_polarity", &ldim->clk_pol, CONFIG_BOOL);
+ ok &= get_var("lcd_pix_polarity", &ldim->pix_pol, CONFIG_BOOL);
ok &= get_var("lcd_panel_width", &ldim->width, CONFIG_INT);
ok &= get_var("lcd_panel_height", &ldim->height, CONFIG_INT);
pcr |= PCR_TFT | PCR_COLOR | PCR_SCLK_SEL |
(ldim->vsync_pol * PCR_FLMPOL) |
(ldim->hsync_pol * PCR_LPPOL) |
- (ldim->pixclk_pol * PCR_PIXPOL);
+ (ldim->pix_pol * PCR_PIXPOL) |
+ (ldim->clk_pol * PCR_CLKPOL);
switch (ldim->bpp) {
case 18:
33333
);
+RedBoot_config_option("Pixel polarity active low",
+ lcd_pix_polarity,
+ "bootsplash_enable", true,
+ CONFIG_BOOL,
+ false
+ );
+
RedBoot_config_option("Pixel clock polarity active low",
lcd_clk_polarity,
"bootsplash_enable", true,