unified MX27, MX25, MX37 trees

[karo-tx-redboot.git] / packages / hal / arm / mx31 / var / v2_0 / include / hal_cache.h

diff --git a/packages/hal/arm/mx31/var/v2_0/include/hal_cache.h b/packages/hal/arm/mx31/var/v2_0/include/hal_cache.h
index 26ba24073fc0693e47ff98116d1df5fe58738ade..2e5798735d151b2c36df916dfc6124a11a2ee164 100644 (file)
--- a/packages/hal/arm/mx31/var/v2_0/include/hal_cache.h
+++ b/packages/hal/arm/mx31/var/v2_0/include/hal_cache.h
@@ -233,109 +233,45 @@ CYG_MACRO_END
 
 // Query the state of the L2 cache
 #define HAL_L2CACHE_IS_ENABLED(_state_)                         \
-CYG_MACRO_START                                                 \
-    _state_ = (*(unsigned long *)(0x30000100)) & 0x1;           \
-CYG_MACRO_END
+    (_state_ = readl(L2CC_BASE_ADDR + L2_CACHE_CTL_REG) & 1)
 
 #ifdef L2CC_ENABLED
 
-#define HAL_ENABLE_L2()                         \
-CYG_MACRO_START                                 \
-    asm volatile (                              \
-        "ldr r0, =0x30000100;"                  \
-        "ldr r1, [r0];"                         \
-        "orr r1, r1, #0x1;"                     \
-        "str r1, [r0];"                         \
-        :                                       \
-        :                                       \
-        : "r0", "r1" /* Clobber list */         \
-        );                                      \
-CYG_MACRO_END
-
-#define HAL_DISABLE_L2()                        \
-CYG_MACRO_START                                 \
-    asm volatile (                              \
-        "ldr r0, =0x30000000;"                  \
-        "ldr r1, [r0, #0x100];"                 \
-        "bic r1, r1, #0x1;"                     \
-        "str r1, [r0, #0x100];"                 \
-        :                                       \
-        :                                       \
-        : "r0", "r1" /* Clobber list */         \
-        );                                      \
-CYG_MACRO_END
+#define HAL_ENABLE_L2()                             \
+{                                                   \
+    writel(1, L2CC_BASE_ADDR + L2_CACHE_CTL_REG);   \
+}
 
-#define HAL_SYNC_L2()                           \
-CYG_MACRO_START                                 \
-    asm volatile (                              \
-        "ldr r0, =0x30000000;"                  \
-        "ldr r1, [r0, #0x100];"                 \
-        "mov r2, r1;"                           \
-        "tst r1, #0x1;"                         \
-        "beq 1f;"                               \
-        "bic r1, r1, #0x1;"                     \
-        "str r1, [r0, #0x100];"                 \
-    "1: "                                       \
-        "ldr r2, =0x0;"                         \
-        "str r2, [r0, #0x730];"                 \
-        "str r2, [r0, #0x100];"                 \
-        :                                       \
-        :                                       \
-        : "r0", "r1", "r2" /* Clobber list */   \
-        );                                      \
-CYG_MACRO_END
+#define HAL_DISABLE_L2()                            \
+{                                                   \
+    writel(0, L2CC_BASE_ADDR + L2_CACHE_CTL_REG);   \
+}
 
-#define HAL_INVALIDATE_L2()                     \
-CYG_MACRO_START                                 \
-    asm volatile (                              \
-        "ldr r0, =0x30000000;"                  \
-        "ldr r1, [r0, #0x100];"                 \
-        "mov r2, r1;"                           \
-        "tst r1, #0x1;"                         \
-        "beq 1f;"                               \
-        "bic r1, r1, #0x1;"                     \
-        "str r1, [r0, #0x100];"                 \
-    "1: "                                       \
-        "ldr r1, =0x0;"                         \
-        "str r1, [r0, #0x730];"                 \
-        "ldr r1, =0xFF;"                        \
-        "str r1, [r0, #0x77C];"                 \
-    "2: "                                       \
-        "ldr r1, [r0, #0x77C];"                 \
-        "cmp r1, #0x0;"                         \
-        "bne 2b;"                               \
-        "str r2, [r0, #0x100];"                 \
-        :                                       \
-        :                                       \
-        : "r0", "r1" /* Clobber list */         \
-        );                                      \
-CYG_MACRO_END
+#define HAL_SYNC_L2()                                                           \
+{                                                                               \
+    if ((readl(L2CC_BASE_ADDR + L2_CACHE_CTL_REG) & 1) != 0) {                  \
+        writel(0, L2CC_BASE_ADDR + L2_CACHE_SYNC_REG);                          \
+        while ((readl(L2CC_BASE_ADDR + L2_CACHE_SYNC_REG) & 1) == 1);           \
+    }                                                                           \
+}
 
-#define HAL_CLEAN_INVALIDATE_L2()               \
-CYG_MACRO_START                                 \
-    asm volatile (                              \
-        "ldr r0, =0x30000000;"                  \
-        "ldr r1, [r0, #0x100];"                 \
-        "mov r2, r1;"                           \
-        "tst r1, #0x1;"                         \
-        "beq 1f;"                               \
-        "bic r1, r1, #0x1;"                     \
-        "str r1, [r0, #0x100];"                 \
-    "1: "                                       \
-        "ldr r2, =0x0;"                         \
-        "str r2, [r0, #0x730];"                 \
-        "ldr r2, =0xFF;"                        \
-        "str r2, [r0, #0x7FC];"                 \
-    "2: "                                       \
-        "ldr r2, [r0, #0x7FC];"                 \
-        "cmp r2, #0x0;"                         \
-        "bne 2b;"                               \
-        "str r2, [r0, #0x100];"                 \
-        :                                       \
-        :                                       \
-        : "r0", "r1" /* Clobber list */         \
-        );                                      \
-CYG_MACRO_END
+#define HAL_INVALIDATE_L2()                                                     \
+{                                                                               \
+    if ((readl(L2CC_BASE_ADDR + L2_CACHE_CTL_REG) & 1) != 0) {                  \
+        writel(0xFF, L2CC_BASE_ADDR + L2_CACHE_INV_WAY_REG);                    \
+        while ((readl(L2CC_BASE_ADDR + L2_CACHE_INV_WAY_REG) & 0xFF) != 0);    \
+        HAL_SYNC_L2();                                                          \
+    }                                                                           \
+}
+                                                                                \
+#define HAL_CLEAN_INVALIDATE_L2()                                               \
+{                                                                               \
+    if ((readl(L2CC_BASE_ADDR + L2_CACHE_CTL_REG) & 1) != 0) {                  \
+        writel(0xFF, L2CC_BASE_ADDR + L2_CACHE_CLEAN_INV_WAY_REG);              \
+        while ((readl(L2CC_BASE_ADDR + L2_CACHE_CLEAN_INV_WAY_REG) & 0xFF) != 0);\
+        HAL_SYNC_L2();                                                          \
+    }                                                                           \
+}
 
 #else //L2CC_ENABLED
 
@@ -365,7 +301,8 @@ CYG_MACRO_END
 
 #define HAL_DCACHE_SYNC() {             \
         HAL_DCACHE_SYNC_L1();           \
-        HAL_SYNC_L2();                  \
+        /* don't just call HAL_SYNC_L2() */ \
+        HAL_CLEAN_INVALIDATE_L2();      \
 }
 
 #define HAL_ICACHE_INVALIDATE_ALL() {   \