]> git.kernelconcepts.de Git - karo-tx-redboot.git/blobdiff - packages/hal/arm/mx51/var/v2_0/src/soc_misc.c
Bugfix Release STK5 2010-10-04
[karo-tx-redboot.git] / packages / hal / arm / mx51 / var / v2_0 / src / soc_misc.c
index ccf039f987d349df5d8d4282e28d1d00d87cf376..723810bf29b41b90d546b039ed1f7c1a7242d050 100644 (file)
@@ -77,8 +77,6 @@ int _mxc_fis;
 unsigned int system_rev = CHIP_REV_1_0;
 static int find_correct_chip;
 
-static int _reset_reason;
-
 #define SBMR_BT_MEM_CTL_SHIFT          0
 #define SBMR_BT_MEM_CTL_MASK           (3 << SBMR_BT_MEM_CTL_SHIFT)
 #define SBMR_BT_MEM_CTL(r)                     (((r) & SBMR_BT_MEM_CTL_MASK) >> SBMR_BT_MEM_CTL_SHIFT)
@@ -211,8 +209,6 @@ void hal_hardware_init(void)
        _mxc_fis = FROM_NAND_FLASH;
 #endif
 
-       _reset_reason = readl(SRC_BASE_ADDR + 0x8);
-
        find_correct_chip = ver;
 
        if (ver != CHIP_VERSION_NONE) {
@@ -580,7 +576,9 @@ unsigned int mxc_nfc_soc_setup(unsigned int pg_sz, unsigned int io_sz,
 
 static void show_sys_info(void)
 {
-       unsigned int sbmr = readl(SRC_BASE_ADDR + 0x4);
+       cyg_uint32 sbmr = readl(SRC_BASE_ADDR + 0x4);
+       cyg_uint32 srsr = readl(SRC_BASE_ADDR + 0x8);
+       const char *dlm = "";
 
        if (find_correct_chip == CHIP_VERSION_UNKNOWN) {
                diag_printf("Unrecognized chip version: 0x%08x!!!\n", read_system_rev());
@@ -590,19 +588,49 @@ static void show_sys_info(void)
        }
 
        diag_printf("Reset reason: ");
-       switch (_reset_reason) {
-       case 0x09:
-               diag_printf("User reset\n");
-               break;
-       case 0x01:
-               diag_printf("Power-on reset\n");
-               break;
-       case 0x10:
-       case 0x11:
-               diag_printf("WDOG reset\n");
-               break;
-       default:
-               diag_printf("Unknown: 0x%08x\n", _reset_reason);
+
+       if (srsr & (1 << 0)) {
+               diag_printf("%sPOWER_ON", dlm);
+               dlm = " | ";
+       }
+       if (srsr & (1 << 2)) {
+               diag_printf("%sCSU", dlm);
+               dlm = " | ";
+       }
+       if (srsr & (1 << 3)) {
+               diag_printf("%sUSER", dlm);
+               dlm = " | ";
+       }
+       if (srsr & (1 << 4)) {
+               CYG_WORD16 wrsr;
+
+               HAL_READ_UINT16(WDOG_BASE_ADDR + 4, wrsr);
+               if (wrsr & (1 << 0)) {
+                       diag_printf("%sSOFT", dlm);
+                       dlm = " | ";
+               }
+               if (wrsr & (1 << 1)) {
+                       diag_printf("%sWATCHDOG", dlm);
+                       dlm = " | ";
+               }
+       }
+       if (srsr & (1 << 5)) {
+               diag_printf("%sJTAG_HW", dlm);
+               dlm = " | ";
+       }
+       if (srsr & (1 << 6)) {
+               diag_printf("%sJTAG_SW", dlm);
+               dlm = " | ";
+       }
+       if (srsr & (1 << 16)) {
+               diag_printf("%sWARM BOOT", dlm);
+               dlm = " | ";
+       }
+
+       if (*dlm == '\0') {
+               diag_printf("UNKNOWN: %08x\n", srsr);
+       } else {
+               diag_printf(" RESET\n");
        }
 
        if (_mxc_fis == MMC_FLASH_BOOT) {
@@ -615,7 +643,6 @@ static void show_sys_info(void)
                diag_printf("Use \"factive [MMC|SPI|NAND]\" to choose fis/fconfig storage\n");
        }
 
-       diag_printf("SBMR = 0x%08x\n", readl(SRC_BASE_ADDR + 0x4));
        diag_printf("Boot switch: ");
        if ((SBMR_BMOD(sbmr)) == 0) {
                diag_printf("INTERNAL (GPIO)\n");