]> git.kernelconcepts.de Git - karo-tx-redboot.git/blobdiff - packages/hal/arm/mx53/var/v2_0/include/hal_soc.h
RedBoot Release TX53-v3 2012-02-08
[karo-tx-redboot.git] / packages / hal / arm / mx53 / var / v2_0 / include / hal_soc.h
index 94ac0c1ed22eb15b5a9eaaa244de44a86452975f..88d508bfd36ad7e3bb0e707b25f8ea53183d80c1 100644 (file)
@@ -56,7 +56,8 @@
 
 extern char HAL_PLATFORM_EXTRA[40];
 externC void plf_hardware_init(void);
-extern void increase_core_voltage(bool i);
+
+extern int adjust_core_voltage(unsigned int);
 
 #define REG8(a)                                (*(volatile unsigned char *)(a))
 #define REG16(a)                       (*(volatile unsigned short *)(a))
@@ -218,9 +219,6 @@ extern void increase_core_voltage(bool i);
 #define WEIM_BASE_ADDR                         (AIPS2_BASE_ADDR + 0x000DA000)
 #define NFC_IP_BASE                                    (AIPS2_BASE_ADDR + 0x000DB000)
 #define EMI_BASE_ADDR                          (AIPS2_BASE_ADDR + 0x000DBF00)
-//#define MIPI_HSC_BASE_ADDR                   (AIPS2_BASE_ADDR + 0x000DC000)
-//#define ATA_BASE_ADDR                                (AIPS2_BASE_ADDR + 0x000E0000)
-//#define SIM_BASE_ADDR                                (AIPS2_BASE_ADDR + 0x000E4000)
 #define SSI3_BASE_ADDR                         (AIPS2_BASE_ADDR + 0x000E8000)
 #define FEC_BASE_ADDR                          (AIPS2_BASE_ADDR + 0x000EC000)
 #define SOC_FEC_BASE                           FEC_BASE_ADDR
@@ -326,14 +324,12 @@ extern void increase_core_voltage(bool i);
 #define ESDCTL_ESDCFG0                         0x04
 #define ESDCTL_ESDCTL1                         0x08
 #define ESDCTL_ESDCFG1                         0x0C
-#define ESDCTL_ESDMISC                         0x10
-#define ESDCTL_ESDSCR                          0x14
-#define ESDCTL_ESDCDLY1                                0x20
-#define ESDCTL_ESDCDLY2                                0x24
-#define ESDCTL_ESDCDLY3                                0x28
-#define ESDCTL_ESDCDLY4                                0x2C
-#define ESDCTL_ESDCDLY5                                0x30
-#define ESDCTL_ESDCDLYGD                       0x34
+#define ESDCTL_ESDMISC                         0x18
+#define ESDCTL_ESDSCR                          0x1c
+#define ESDCTL_ESDMRR                          0x34
+#define ESDCTL_WLGCR                           0x48
+#define ESDCTL_RDDLHWCTL                       0xa0
+#define ESDCTL_WRDLHWCTL                       0xa4
 
 /* DPLL */
 #define PLL_DP_CTL                                     0x00
@@ -617,8 +613,6 @@ extern unsigned int get_peri_clock(enum peri_clocks clk);
 
 typedef unsigned int nfc_setup_func_t(unsigned int, unsigned int, unsigned int, unsigned int);
 
-extern void increase_core_voltage(bool);
-
 #endif //#if !defined(__ASSEMBLER__)
 
 #endif /* __HAL_SOC_H__ */