X-Git-Url: https://git.kernelconcepts.de/?p=karo-tx-redboot.git;a=blobdiff_plain;f=packages%2Fdevs%2Fflash%2Famd%2Fam29xxxxx%2Fv2_0%2Finclude%2Fflash_am29xxxxx_parts.inl;h=6c8c1cb62ecbe816319fb784f09f22b0583832fc;hp=abf9e6e7bd5db686f715de48c35fc8c84aad51d8;hb=7a4ea0a4d67744fd3f6b5f207d857005fc707b46;hpb=29ac1edaf5f12d706179ec87816ee1506ba4c9a1 diff --git a/packages/devs/flash/amd/am29xxxxx/v2_0/include/flash_am29xxxxx_parts.inl b/packages/devs/flash/amd/am29xxxxx/v2_0/include/flash_am29xxxxx_parts.inl index abf9e6e7..6c8c1cb6 100644 --- a/packages/devs/flash/amd/am29xxxxx/v2_0/include/flash_am29xxxxx_parts.inl +++ b/packages/devs/flash/amd/am29xxxxx/v2_0/include/flash_am29xxxxx_parts.inl @@ -597,6 +597,32 @@ bufsiz : 16 }, #endif +#ifdef CYGHWR_DEVS_FLASH_AMD_MX29LV128 + { // MX29LV128M-T + long_device_id: true, + device_id : FLASHWORD(0x227e), + device_id2 : FLASHWORD(0x2211), + device_id3 : FLASHWORD(0x2201), + block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE, + block_count: 256, + device_size: 0x1000000 * CYGNUM_FLASH_INTERLEAVE, + base_mask : ~(0x1000000 * CYGNUM_FLASH_INTERLEAVE - 1), + bootblock : true, + bootblocks : { 0xff0000 * CYGNUM_FLASH_INTERLEAVE, + 0x002000 * CYGNUM_FLASH_INTERLEAVE, + 0x002000 * CYGNUM_FLASH_INTERLEAVE, + 0x002000 * CYGNUM_FLASH_INTERLEAVE, + 0x002000 * CYGNUM_FLASH_INTERLEAVE, + 0x002000 * CYGNUM_FLASH_INTERLEAVE, + 0x002000 * CYGNUM_FLASH_INTERLEAVE, + 0x002000 * CYGNUM_FLASH_INTERLEAVE, + 0x002000 * CYGNUM_FLASH_INTERLEAVE, + _LAST_BOOTBLOCK + }, + banked : false, + bufsiz : 16 + }, +#endif #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV160 { // MBM29LV160-T | AM29LV160-T device_id : FLASHWORD(0x22c4), @@ -741,6 +767,42 @@ bufsiz : 1 }, #endif +#ifdef CYGHWR_DEVS_FLASH_ST_M29W320D + { // M29W320DT + device_id : FLASHWORD(0x22ca), + block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE, + block_count: 64, + device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE, + base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1), + bootblock : true, + bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE, // offset + 0x008000 * CYGNUM_FLASH_INTERLEAVE, // size 1 + 0x002000 * CYGNUM_FLASH_INTERLEAVE, // size 2 + 0x002000 * CYGNUM_FLASH_INTERLEAVE, // size 3 + 0x004000 * CYGNUM_FLASH_INTERLEAVE, // size 4 + _LAST_BOOTBLOCK + }, + banked : false, + bufsiz : 1 + }, + { // M29W320DB + device_id : FLASHWORD(0x22cb), + block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE, + block_count: 64, + device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE, + base_mask : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1), + bootblock : true, + bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE, // offset + 0x004000 * CYGNUM_FLASH_INTERLEAVE, // size 1 + 0x002000 * CYGNUM_FLASH_INTERLEAVE, // size 2 + 0x002000 * CYGNUM_FLASH_INTERLEAVE, // size 3 + 0x008000 * CYGNUM_FLASH_INTERLEAVE, // size 4 + _LAST_BOOTBLOCK + }, + banked : false, + bufsiz : 1 + }, +#endif #ifdef CYGHWR_DEVS_FLASH_AMD_AM29LV320D { // AM29LV320DT device_id : FLASHWORD(0x22F6), @@ -1250,6 +1312,55 @@ bufsiz : 1 }, #endif + +#ifdef CYGHWR_DEVS_FLASH_AMD_S29GL512N + { // AMD/SPANSION S29GL512N + long_device_id: true, + device_id : FLASHWORD(0x227e), + device_id2 : FLASHWORD(0x2223), + device_id3 : FLASHWORD(0x2201), + block_size : 0x20000 * CYGNUM_FLASH_INTERLEAVE, + block_count: 512, + device_size: 0x4000000 * CYGNUM_FLASH_INTERLEAVE, + base_mask : ~(0x4000000 * CYGNUM_FLASH_INTERLEAVE - 1), + bootblock : false, + banked : false, + bufsiz : 16 + }, +#endif + +#ifdef CYGHWR_DEVS_FLASH_AMD_S29GL256N + { // AMD/SPANSION S29GL256N + long_device_id: true, + device_id : FLASHWORD(0x227e), + device_id2 : FLASHWORD(0x2222), + device_id3 : FLASHWORD(0x2201), + block_size : 0x20000 * CYGNUM_FLASH_INTERLEAVE, + block_count: 256, + device_size: 0x2000000 * CYGNUM_FLASH_INTERLEAVE, + base_mask : ~(0x2000000 * CYGNUM_FLASH_INTERLEAVE - 1), + bootblock : false, + banked : false, + bufsiz : 16 + }, +#endif + +#ifdef CYGHWR_DEVS_FLASH_AMD_S29GL128N + { // AMD/SPANSION S29GL128N + long_device_id: true, + device_id : FLASHWORD(0x227e), + device_id2 : FLASHWORD(0x2221), + device_id3 : FLASHWORD(0x2201), + block_size : 0x20000 * CYGNUM_FLASH_INTERLEAVE, + block_count: 128, + device_size: 0x1000000 * CYGNUM_FLASH_INTERLEAVE, + base_mask : ~(0x1000000 * CYGNUM_FLASH_INTERLEAVE - 1), + bootblock : false, + banked : false, + bufsiz : 16 + }, +#endif + #ifdef CYGHWR_DEVS_FLASH_AMD_S29GL064M { // AMD/SPANSION S29GL064M long_device_id: true, @@ -1337,6 +1448,22 @@ }, #endif +#ifdef CYGHWR_DEVS_FLASH_AMD_S29GL128M + { // AMD/SPANSION S29GL128M + long_device_id: true, + device_id : FLASHWORD(0x227e), + device_id2 : FLASHWORD(0x2212), + device_id3 : FLASHWORD(0x2200), + block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE, + block_count: 256, + device_size: 0x1000000 * CYGNUM_FLASH_INTERLEAVE, + base_mask : ~(0x1000000 * CYGNUM_FLASH_INTERLEAVE - 1), + bootblock : false, + banked : false, + bufsiz : 16, + }, +#endif + #endif // 16 bit devices -#endif // CYGONCE_DEVS_FLASH_AMD_AM29XXXXX_PARTS_INL +#endif // CYGONCE_DEVS_FLASH_AMD_AM29XXXXX_PARTS_INL \ No newline at end of file