X-Git-Url: https://git.kernelconcepts.de/?p=karo-tx-redboot.git;a=blobdiff_plain;f=packages%2Fhal%2Fsynth%2Farch%2Fv2_0%2Fsrc%2Fsynth_entry.c;h=04f76ed7b94207a7bc16f0ca5054da60b2bf5aba;hp=923bb0fb625af6e89f0cfc1ae0b8f4c4fec8447a;hb=7a4ea0a4d67744fd3f6b5f207d857005fc707b46;hpb=29ac1edaf5f12d706179ec87816ee1506ba4c9a1 diff --git a/packages/hal/synth/arch/v2_0/src/synth_entry.c b/packages/hal/synth/arch/v2_0/src/synth_entry.c index 923bb0fb..04f76ed7 100644 --- a/packages/hal/synth/arch/v2_0/src/synth_entry.c +++ b/packages/hal/synth/arch/v2_0/src/synth_entry.c @@ -8,7 +8,7 @@ //####ECOSGPLCOPYRIGHTBEGIN#### // ------------------------------------------- // This file is part of eCos, the Embedded Configurable Operating System. -// Copyright (C) 2002 Bart Veer +// Copyright (C) 2002, 2005 Bart Veer // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. // // eCos is free software; you can redistribute it and/or modify it under @@ -54,6 +54,7 @@ #include #include #include +#include #include #include #include @@ -105,29 +106,16 @@ externC void synth_hardware_init2(void); void _linux_entry( void ) { - void* new_top = (void*) 0; - // "Initialize various cpu status registers, including disabling interrupts." // That is a no-op for the synthetic target, in particular interrupts are // already disabled. - // "Set up any CPU memory controller to access ROM, RAM, and I/O devices - // correctly". - // - // This involves using the brk() system call to allocate the RAM used - // for the heaps. There are no variables mapped there so the system - // will not have done this for us. Note that the implementation of - // brk() (mm/mmap.c) differs from the documentation - the return - // value is the new brk value, not an error code. - new_top = (void*) (CYGMEM_REGION_ram + CYGMEM_REGION_ram_SIZE); - if (new_top != cyg_hal_sys_brk(new_top)) { - CYG_FAIL("Failed to initialize memory"); - cyg_hal_sys_exit(1); - } - - // Again a no-op for the synthetic target. All memory is readily - // accessible. Arguably the auxiliary should be started up here, but - // instead that is left to platform initialization. + // "Set up any CPU memory controller to access ROM, RAM, and I/O + // devices correctly". The ROM and RAM are set up via the linker + // script and taken care of automatically during loading. There + // are no memory-mapped devices. Arguably the auxiliary should be + // started up here, but instead that is left to platform + // initialization. // "Enable the cache". Effectively the synthetic target has no cache, // anything provided by the hardware is not readily accessible. @@ -211,5 +199,23 @@ dl_iterate_phdr(void* arg1, void* arg2) } #endif +#if (__GNUC__ >= 4) +// First noticed with gcc 4.1.1. There is now code to detect stack +// smashing. +void __attribute__ ((noreturn)) +__stack_chk_fail_local(void) +{ + CYG_FAIL("Stack smashing detected, aborting"); + diag_printf("Application error: stack smashing detected.\n"); + cyg_hal_sys_exit(1); + for (;;); +} +// Another symbol which indicates a similar problem occurred. +void __stack_chk_fail(void) +{ + __stack_chk_fail_local(); +} +#endif + //----------------------------------------------------------------------------- // End of entry.c