changed memory timing to 3 clocks CAS latency and 9 clocks tRC (as originally calculated)
authorlothar <lothar>
Tue, 21 Jul 2009 10:55:41 +0000 (10:55 +0000)
committerlothar <lothar>
Tue, 21 Jul 2009 10:55:41 +0000 (10:55 +0000)
commit962ad69bfe490b0da6ddf78a096d3cf7c8cb1049
tree06bcbf8673a835caead1f4bd8353eeb7bfb5e110
parent9de9d39b630ad85d97cb8355109360301998239f
changed memory timing to 3 clocks CAS latency and 9 clocks tRC (as originally calculated)
switched off Full Page Mode
packages/hal/arm/mx25/karo/v1_0/include/hal_platform_setup.h