arm: mx53: karo: select core voltage according to frequency range rather than single...
authorLothar Waßmann <LW@KARO-electronics.de>
Fri, 4 Apr 2014 11:34:49 +0000 (13:34 +0200)
committerLothar Waßmann <LW@KARO-electronics.de>
Fri, 4 Apr 2014 11:34:49 +0000 (13:34 +0200)
packages/hal/arm/mx53/karo/v1_0/include/hal_platform_setup.h
packages/hal/arm/mx53/karo/v1_0/src/tx53_misc.c

index de331e0..fed8b8d 100644 (file)
 
 #define SDRAM_CLK                      400
 
-#define DEBUG_LED_BIT          20
-#define LED_GPIO_BASE          GPIO2_BASE_ADDR
-#define LED_MUX_OFFSET         0x174
-#define LED_MUX_MODE           0x11
+#define DEBUG_LED_BIT                  20
+#define LED_GPIO_BASE                  GPIO2_BASE_ADDR
+#define LED_MUX_OFFSET                 0x174
+#define LED_MUX_MODE                   0x11
 
 #ifdef CYGOPT_HAL_ARM_TX53_DEBUG
 #define LED_ON                         bl      led_on
@@ -480,7 +480,7 @@ GPU Memory                       0xF8020000 0xF805FFFF
        .endif
        .endm
 
-#define MXC_DCD_ITEM(addr, val)                mxc_dcd_item    addr, val
+#define MXC_DCD_ITEM(addr, val)                mxc_dcd_item    (addr), (val)
 
 #define MXC_DCD_CMD_SZ_BYTE            1
 #define MXC_DCD_CMD_SZ_SHORT           2
@@ -656,8 +656,8 @@ CK_MAX      tCKSRE, NS_TO_CK(10), 5, 0, 7
        .iflt   tWR - 7
        .set    mr0_val, (((1 - DLL_DISABLE) << 8) /* DLL Reset */ |    \
                        (SLOW_PD << 12) /* PD exit: 0: fast 1: slow */ |\
-                       ((tWR + 1 - 4) << 9) |                          \
-                       ((((tCL + 3) - 4) & 0x7) << 4) |                \
+                       ((tWR + 1 - 4) << 9) |                          \
+                       ((((tCL + 3) - 4) & 0x7) << 4) |                \
                        ((((tCL + 3) - 4) & 0x8) >> 1))
        .else
        .set    mr0_val, ((1 << 8) /* DLL Reset */ |                    \
@@ -677,7 +677,7 @@ CK_MAX      tCKSRE, NS_TO_CK(10), 5, 0, 7
                                         (Rtt_WR << 9) /* dynamic ODT */ |      \
                                         (0 << 7) /* SRT: Ext. temp. (mutually exclusive with ASR!) */ | \
                                         (1 << 6) | /* ASR: Automatic Self Refresh */\
-                                        (((tCWL + 2) - 5) << 3) |              \
+                                        (((tCWL + 2) - 5) << 3) |              \
                                        0)
 #define mr3_val                                0
 
index c3e537f..7b88f2c 100644 (file)
@@ -733,26 +733,16 @@ int adjust_core_voltage(unsigned int clock)
        int volt;
        int retries = 0;
 
-       switch (clock) {
-       case 1200:
-               volt = CORE_VOLTAGE_1200;
-               break;
-
-       case 1000:
-               volt = CORE_VOLTAGE_1000;
-               break;
-
-       case 800:
-               volt = CORE_VOLTAGE_800;
-               break;
-
-       default:
-               if (clock > 1200) {
-                       diag_printf("No core voltage assigned for %u MHz core clock\n",
-                                               clock);
-                       return -EINVAL;
-               }
+       if (clock <= 800) {
                volt = CORE_VOLTAGE_800;
+       } else if (clock <= 1000) {
+               volt = CORE_VOLTAGE_1000;
+       } else if (clock <= 1200) {
+               volt = CORE_VOLTAGE_1200;
+       } else {
+               diag_printf("No core voltage assigned for %u MHz core clock\n",
+                       clock);
+               return -EINVAL;
        }
 
        ret = pmic_reg_read(0x23);