karo: tx53: fix DDR_SEL value
authorLothar Waßmann <LW@KARO-electronics.de>
Thu, 14 Aug 2014 12:52:22 +0000 (14:52 +0200)
committerLothar Waßmann <LW@KARO-electronics.de>
Thu, 14 Aug 2014 12:52:22 +0000 (14:52 +0200)
The current value is inappropriate for DDR3.
When adding support for the HW rev. 3 of the TX53 module that has DDR3
instead of DDR2 memory, the values for both memory type were
erroneously swapped, so that after removing DDR2 support lateron, the
wrong value was kept.

packages/hal/arm/mx53/karo/v1_0/include/hal_platform_setup.h

index 5785c81..34be254 100644 (file)
@@ -820,7 +820,7 @@ dcd_hdr:
 #endif
        MXC_DCD_ITEM(0x53fd4018, 0x00016154)    /* CBCMR */
 
-#define DDR_SEL_VAL    2
+#define DDR_SEL_VAL    0
 #define DSE_VAL                5
 #define ODT_VAL                2