From 991357cee5b6e631fd70adb139ee5b28ff42e34d Mon Sep 17 00:00:00 2001
From: Oliver Wendt <ow@karo-electronics.de>
Date: Wed, 4 Sep 2013 15:36:49 +0200
Subject: [PATCH] Fixup messed up source code from previous release

---
 ReleaseNotes.txt                              |  3 ++
 .../karo/v1_0/include/hal_platform_setup.h    | 44 ++++++++-----------
 .../hal/arm/mx53/karo/v1_0/include/plf_io.h   |  8 ++++
 3 files changed, 30 insertions(+), 25 deletions(-)

diff --git a/ReleaseNotes.txt b/ReleaseNotes.txt
index e41df39d..cb6b0637 100755
--- a/ReleaseNotes.txt
+++ b/ReleaseNotes.txt
@@ -2,6 +2,9 @@
   Ka-Ro Electronics GmbH
 
   ===========================================================
+ v1.5.4 (2012-09-03)
+  Fixup messed up source code from previous release
+
  v1.5.3 (2012-02-15)
   Changes:
     all modules:
diff --git a/packages/hal/arm/mx53/karo/v1_0/include/hal_platform_setup.h b/packages/hal/arm/mx53/karo/v1_0/include/hal_platform_setup.h
index 82b08d4a..738b3fe6 100644
--- a/packages/hal/arm/mx53/karo/v1_0/include/hal_platform_setup.h
+++ b/packages/hal/arm/mx53/karo/v1_0/include/hal_platform_setup.h
@@ -80,6 +80,14 @@
 
 #define PLATFORM_PREAMBLE flash_header
 
+#ifdef RAM_BANK1_SIZE
+#define REDBOOT_RAM_START	(RAM_BANK1_BASE + RAM_BANK1_SIZE - REDBOOT_OFFSET)
+#else
+#define REDBOOT_RAM_START	(RAM_BANK0_BASE + RAM_BANK0_SIZE - REDBOOT_OFFSET)
+#endif
+
+#define redboot_v2p(v)	((v) - __text_start + REDBOOT_RAM_START)
+
 // This macro represents the initial startup code for the platform
 	.macro	_platform_setup1
 KARO_TX53_SETUP_START:
@@ -143,16 +151,16 @@ init_clock_start:
 	init_clock
 	LED_BLINK #1
 
-Normal_Boot_Continue:
 /*
  * Note:
  *	IOMUX/PBC setup is done in C function plf_hardware_init() for simplicity
  */
 STACK_Setup:
 	@ Set up a stack [for calling C code]
-	ldr	r1, =__startup_stack
-	ldr	r2, =RAM_BANK0_BASE
-	orr	sp, r1, r2
+	/* stack is always in the first memory bank, so there is no
+	 * need to fixup the address
+	 */
+	ldr	sp, .__startup_stack
 
 	@ Create MMU tables
 
@@ -167,7 +175,11 @@ STACK_Setup:
 	mcr	MMU_CP, 0, r1, c10, c2, 0 // Write Primary Region Remap Register
 
 	@ Enable MMU
-	adr	r2, 10f
+	adr	r2, mmu_switched
+#ifdef RAM_BANK1_SIZE
+	ldr	r1, =(__text_start - REDBOOT_RAM_START)
+	sub	r2, r2, r1
+#endif
 	mrc	MMU_CP, 0, r1, MMU_Control, c0
 	orr	r1, r1, #7			@ enable MMU bit
 	orr	r1, r1, #0x800			@ enable z bit
@@ -182,7 +194,7 @@ STACK_Setup:
 	mov	pc, r2				@ Change address spaces
 	.ltorg
 	.align	5
-10:
+mmu_switched:
 	LED_BLINK #4
 	.endm	@ _platform_setup1
 
@@ -498,7 +510,7 @@ _KARO_CECFG_END:
 #define ESDOR_CLK_PERIOD_ns		(1000000000 / CKIL_FREQ_Hz / 2)	/* base clock for ESDOR values */
 
 /* DDR3 SDRAM */
-#if SDRAM_SIZE > SZ_512M
+#if SDRAM_SIZE > RAM_BANK0_SIZE
 #define BANK_ADDR_BITS			2
 #else
 #define BANK_ADDR_BITS			1
@@ -635,14 +647,6 @@ fcb_start:
 	.word	0	/* Bad Block marker offset in spare area */
 fcb_end:
 
-#if BANK_ADDR_BITS > 1
-#define REDBOOT_RAM_START	(RAM_BANK1_BASE + RAM_BANK1_SIZE - REDBOOT_OFFSET)
-#else
-#define REDBOOT_RAM_START	(RAM_BANK0_BASE + RAM_BANK0_SIZE - REDBOOT_OFFSET)
-#endif
-
-#define redboot_v2p(v)	((v) - __text_start + REDBOOT_RAM_START)
-
 	.org	0x400
 ivt_header:
 	.word	CPU_2_BE_32((0xd1 << 24) | (32 << 8) | 0x40)
@@ -878,16 +882,6 @@ dcd_end:
 	.endif
 	.endm
 
-MXC_REDBOOT_ROM_START:	.long	SDRAM_BASE_ADDR + SDRAM_SIZE - REDBOOT_OFFSET
-
-#if SDRAM_CLK > 333
-CCM_CBCDR_VAL1:		.word	0x02888944
-CCM_CBCDR_VAL2:		.word	0x00888944
-#else
-CCM_CBCDR_VAL1:		.word	0x02888644
-CCM_CBCDR_VAL2:		.word	0x00888644
-#endif
-
 W_CSCMR1_VAL:		.word	0xa6a2a020
 W_CSCDR1_VAL:		.word	0x00080b18
 W_DP_OP_1000:		.word	DP_OP_1000
diff --git a/packages/hal/arm/mx53/karo/v1_0/include/plf_io.h b/packages/hal/arm/mx53/karo/v1_0/include/plf_io.h
index 4453514e..7505819a 100644
--- a/packages/hal/arm/mx53/karo/v1_0/include/plf_io.h
+++ b/packages/hal/arm/mx53/karo/v1_0/include/plf_io.h
@@ -45,6 +45,14 @@
 #include CYGBLD_HAL_PLF_DEFS_H
 #include <cyg/hal/hal_soc.h>
 
+#define __ul(x)			((unsigned long)(x))
+#define CYGARC_PHYSICAL_ADDRESS(x) ((__ul(x) < SDRAM_SIZE) ?			\
+	(__ul(x) + ((__ul(x) < RAM_BANK0_SIZE) ? \
+	RAM_BANK0_BASE : RAM_BANK1_BASE - RAM_BANK0_SIZE)) :	\
+	((__ul(x) >= RAM_BANK0_BASE) && (__ul(x) < RAM_BANK0_BASE + SDRAM_SIZE)) ? \
+	(((__ul(x) < RAM_BANK0_BASE + RAM_BANK0_SIZE)) ? \
+	__ul(x) : __ul(x) - RAM_BANK0_BASE + RAM_BANK1_BASE - RAM_BANK0_SIZE) : ~0)
+
 #ifdef RAM_BANK1_SIZE
 #define CYGHWR_REDBOOT_LINUX_ATAG_MEM(_p_)							\
 	CYG_MACRO_START													\
-- 
2.39.2