2 # (C) Copyright 2000 - 2013
3 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 # SPDX-License-Identifier: GPL-2.0+
11 This directory contains the source code for U-Boot, a boot loader for
12 Embedded boards based on PowerPC, ARM, MIPS and several other
13 processors, which can be installed in a boot ROM and used to
14 initialize and test the hardware or to download and run application
17 The development of U-Boot is closely related to Linux: some parts of
18 the source code originate in the Linux source tree, we have some
19 header files in common, and special provision has been made to
20 support booting of Linux images.
22 Some attention has been paid to make this software easily
23 configurable and extendable. For instance, all monitor commands are
24 implemented with the same call interface, so that it's very easy to
25 add new commands. Also, instead of permanently adding rarely used
26 code (for instance hardware test utilities) to the monitor, you can
27 load and run it dynamically.
33 In general, all boards for which a configuration option exists in the
34 Makefile have been tested to some extent and can be considered
35 "working". In fact, many of them are used in production systems.
37 In case of problems see the CHANGELOG and CREDITS files to find out
38 who contributed the specific port. The boards.cfg file lists board
41 Note: There is no CHANGELOG file in the actual U-Boot source tree;
42 it can be created dynamically from the Git log using:
50 In case you have questions about, problems with or contributions for
51 U-Boot you should send a message to the U-Boot mailing list at
52 <u-boot@lists.denx.de>. There is also an archive of previous traffic
53 on the mailing list - please search the archive before asking FAQ's.
54 Please see http://lists.denx.de/pipermail/u-boot and
55 http://dir.gmane.org/gmane.comp.boot-loaders.u-boot
58 Where to get source code:
59 =========================
61 The U-Boot source code is maintained in the git repository at
62 git://www.denx.de/git/u-boot.git ; you can browse it online at
63 http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=summary
65 The "snapshot" links on this page allow you to download tarballs of
66 any version you might be interested in. Official releases are also
67 available for FTP download from the ftp://ftp.denx.de/pub/u-boot/
70 Pre-built (and tested) images are available from
71 ftp://ftp.denx.de/pub/u-boot/images/
77 - start from 8xxrom sources
78 - create PPCBoot project (http://sourceforge.net/projects/ppcboot)
80 - make it easier to add custom boards
81 - make it possible to add other [PowerPC] CPUs
82 - extend functions, especially:
83 * Provide extended interface to Linux boot loader
86 * PCMCIA / CompactFlash / ATA disk / SCSI ... boot
87 - create ARMBoot project (http://sourceforge.net/projects/armboot)
88 - add other CPU families (starting with ARM)
89 - create U-Boot project (http://sourceforge.net/projects/u-boot)
90 - current project page: see http://www.denx.de/wiki/U-Boot
96 The "official" name of this project is "Das U-Boot". The spelling
97 "U-Boot" shall be used in all written text (documentation, comments
98 in source files etc.). Example:
100 This is the README file for the U-Boot project.
102 File names etc. shall be based on the string "u-boot". Examples:
104 include/asm-ppc/u-boot.h
106 #include <asm/u-boot.h>
108 Variable names, preprocessor constants etc. shall be either based on
109 the string "u_boot" or on "U_BOOT". Example:
111 U_BOOT_VERSION u_boot_logo
112 IH_OS_U_BOOT u_boot_hush_start
118 Starting with the release in October 2008, the names of the releases
119 were changed from numerical release numbers without deeper meaning
120 into a time stamp based numbering. Regular releases are identified by
121 names consisting of the calendar year and month of the release date.
122 Additional fields (if present) indicate release candidates or bug fix
123 releases in "stable" maintenance trees.
126 U-Boot v2009.11 - Release November 2009
127 U-Boot v2009.11.1 - Release 1 in version November 2009 stable tree
128 U-Boot v2010.09-rc1 - Release candiate 1 for September 2010 release
134 /arch Architecture specific files
135 /arc Files generic to ARC architecture
136 /cpu CPU specific files
137 /arc700 Files specific to ARC 700 CPUs
138 /lib Architecture specific library files
139 /arm Files generic to ARM architecture
140 /cpu CPU specific files
141 /arm720t Files specific to ARM 720 CPUs
142 /arm920t Files specific to ARM 920 CPUs
143 /at91 Files specific to Atmel AT91RM9200 CPU
144 /imx Files specific to Freescale MC9328 i.MX CPUs
145 /s3c24x0 Files specific to Samsung S3C24X0 CPUs
146 /arm926ejs Files specific to ARM 926 CPUs
147 /arm1136 Files specific to ARM 1136 CPUs
148 /pxa Files specific to Intel XScale PXA CPUs
149 /sa1100 Files specific to Intel StrongARM SA1100 CPUs
150 /lib Architecture specific library files
151 /avr32 Files generic to AVR32 architecture
152 /cpu CPU specific files
153 /lib Architecture specific library files
154 /blackfin Files generic to Analog Devices Blackfin architecture
155 /cpu CPU specific files
156 /lib Architecture specific library files
157 /m68k Files generic to m68k architecture
158 /cpu CPU specific files
159 /mcf52x2 Files specific to Freescale ColdFire MCF52x2 CPUs
160 /mcf5227x Files specific to Freescale ColdFire MCF5227x CPUs
161 /mcf532x Files specific to Freescale ColdFire MCF5329 CPUs
162 /mcf5445x Files specific to Freescale ColdFire MCF5445x CPUs
163 /mcf547x_8x Files specific to Freescale ColdFire MCF547x_8x CPUs
164 /lib Architecture specific library files
165 /microblaze Files generic to microblaze architecture
166 /cpu CPU specific files
167 /lib Architecture specific library files
168 /mips Files generic to MIPS architecture
169 /cpu CPU specific files
170 /mips32 Files specific to MIPS32 CPUs
171 /mips64 Files specific to MIPS64 CPUs
172 /lib Architecture specific library files
173 /nds32 Files generic to NDS32 architecture
174 /cpu CPU specific files
175 /n1213 Files specific to Andes Technology N1213 CPUs
176 /lib Architecture specific library files
177 /nios2 Files generic to Altera NIOS2 architecture
178 /cpu CPU specific files
179 /lib Architecture specific library files
180 /openrisc Files generic to OpenRISC architecture
181 /cpu CPU specific files
182 /lib Architecture specific library files
183 /powerpc Files generic to PowerPC architecture
184 /cpu CPU specific files
185 /74xx_7xx Files specific to Freescale MPC74xx and 7xx CPUs
186 /mpc5xx Files specific to Freescale MPC5xx CPUs
187 /mpc5xxx Files specific to Freescale MPC5xxx CPUs
188 /mpc8xx Files specific to Freescale MPC8xx CPUs
189 /mpc824x Files specific to Freescale MPC824x CPUs
190 /mpc8260 Files specific to Freescale MPC8260 CPUs
191 /mpc85xx Files specific to Freescale MPC85xx CPUs
192 /ppc4xx Files specific to AMCC PowerPC 4xx CPUs
193 /lib Architecture specific library files
194 /sh Files generic to SH architecture
195 /cpu CPU specific files
196 /sh2 Files specific to sh2 CPUs
197 /sh3 Files specific to sh3 CPUs
198 /sh4 Files specific to sh4 CPUs
199 /lib Architecture specific library files
200 /sparc Files generic to SPARC architecture
201 /cpu CPU specific files
202 /leon2 Files specific to Gaisler LEON2 SPARC CPU
203 /leon3 Files specific to Gaisler LEON3 SPARC CPU
204 /lib Architecture specific library files
205 /x86 Files generic to x86 architecture
206 /cpu CPU specific files
207 /lib Architecture specific library files
208 /api Machine/arch independent API for external apps
209 /board Board dependent files
210 /common Misc architecture independent functions
211 /disk Code for disk drive partition handling
212 /doc Documentation (don't expect too much)
213 /drivers Commonly used device drivers
214 /dts Contains Makefile for building internal U-Boot fdt.
215 /examples Example code for standalone applications, etc.
216 /fs Filesystem code (cramfs, ext2, jffs2, etc.)
217 /include Header Files
218 /lib Files generic to all architectures
219 /libfdt Library files to support flattened device trees
220 /lzma Library files to support LZMA decompression
221 /lzo Library files to support LZO decompression
223 /post Power On Self Test
224 /spl Secondary Program Loader framework
225 /tools Tools to build S-Record or U-Boot images, etc.
227 Software Configuration:
228 =======================
230 Configuration is usually done using C preprocessor defines; the
231 rationale behind that is to avoid dead code whenever possible.
233 There are two classes of configuration variables:
235 * Configuration _OPTIONS_:
236 These are selectable by the user and have names beginning with
239 * Configuration _SETTINGS_:
240 These depend on the hardware etc. and should not be meddled with if
241 you don't know what you're doing; they have names beginning with
244 Later we will add a configuration tool - probably similar to or even
245 identical to what's used for the Linux kernel. Right now, we have to
246 do the configuration by hand, which means creating some symbolic
247 links and editing some configuration files. We use the TQM8xxL boards
251 Selection of Processor Architecture and Board Type:
252 ---------------------------------------------------
254 For all supported boards there are ready-to-use default
255 configurations available; just type "make <board_name>_defconfig".
257 Example: For a TQM823L module type:
260 make TQM823L_defconfig
262 For the Cogent platform, you need to specify the CPU type as well;
263 e.g. "make cogent_mpc8xx_defconfig". And also configure the cogent
264 directory according to the instructions in cogent/README.
270 U-Boot can be built natively to run on a Linux host using the 'sandbox'
271 board. This allows feature development which is not board- or architecture-
272 specific to be undertaken on a native platform. The sandbox is also used to
273 run some of U-Boot's tests.
275 See board/sandbox/sandbox/README.sandbox for more details.
278 Configuration Options:
279 ----------------------
281 Configuration depends on the combination of board and CPU type; all
282 such information is kept in a configuration file
283 "include/configs/<board_name>.h".
285 Example: For a TQM823L module, all configuration settings are in
286 "include/configs/TQM823L.h".
289 Many of the options are named exactly as the corresponding Linux
290 kernel configuration options. The intention is to make it easier to
291 build a config tool - later.
294 The following options need to be configured:
296 - CPU Type: Define exactly one, e.g. CONFIG_MPC85XX.
298 - Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS.
300 - CPU Daughterboard Type: (if CONFIG_ATSTK1000 is defined)
301 Define exactly one, e.g. CONFIG_ATSTK1002
303 - CPU Module Type: (if CONFIG_COGENT is defined)
304 Define exactly one of
306 --- FIXME --- not tested yet:
307 CONFIG_CMA286_60, CONFIG_CMA286_21, CONFIG_CMA286_60P,
308 CONFIG_CMA287_23, CONFIG_CMA287_50
310 - Motherboard Type: (if CONFIG_COGENT is defined)
311 Define exactly one of
312 CONFIG_CMA101, CONFIG_CMA102
314 - Motherboard I/O Modules: (if CONFIG_COGENT is defined)
315 Define one or more of
318 - Motherboard Options: (if CONFIG_CMA101 or CONFIG_CMA102 are defined)
319 Define one or more of
320 CONFIG_LCD_HEARTBEAT - update a character position on
321 the LCD display every second with
324 - Marvell Family Member
325 CONFIG_SYS_MVFS - define it if you want to enable
326 multiple fs option at one time
327 for marvell soc family
329 - MPC824X Family Member (if CONFIG_MPC824X is defined)
330 Define exactly one of
331 CONFIG_MPC8240, CONFIG_MPC8245
333 - 8xx CPU Options: (if using an MPC8xx CPU)
334 CONFIG_8xx_GCLK_FREQ - deprecated: CPU clock if
335 get_gclk_freq() cannot work
336 e.g. if there is no 32KHz
337 reference PIT/RTC clock
338 CONFIG_8xx_OSCLK - PLL input clock (either EXTCLK
341 - 859/866/885 CPU options: (if using a MPC859 or MPC866 or MPC885 CPU):
342 CONFIG_SYS_8xx_CPUCLK_MIN
343 CONFIG_SYS_8xx_CPUCLK_MAX
344 CONFIG_8xx_CPUCLK_DEFAULT
345 See doc/README.MPC866
347 CONFIG_SYS_MEASURE_CPUCLK
349 Define this to measure the actual CPU clock instead
350 of relying on the correctness of the configured
351 values. Mostly useful for board bringup to make sure
352 the PLL is locked at the intended frequency. Note
353 that this requires a (stable) reference clock (32 kHz
354 RTC clock or CONFIG_SYS_8XX_XIN)
356 CONFIG_SYS_DELAYED_ICACHE
358 Define this option if you want to enable the
359 ICache only when Code runs from RAM.
364 Specifies that the core is a 64-bit PowerPC implementation (implements
365 the "64" category of the Power ISA). This is necessary for ePAPR
366 compliance, among other possible reasons.
368 CONFIG_SYS_FSL_TBCLK_DIV
370 Defines the core time base clock divider ratio compared to the
371 system clock. On most PQ3 devices this is 8, on newer QorIQ
372 devices it can be 16 or 32. The ratio varies from SoC to Soc.
374 CONFIG_SYS_FSL_PCIE_COMPAT
376 Defines the string to utilize when trying to match PCIe device
377 tree nodes for the given platform.
379 CONFIG_SYS_PPC_E500_DEBUG_TLB
381 Enables a temporary TLB entry to be used during boot to work
382 around limitations in e500v1 and e500v2 external debugger
383 support. This reduces the portions of the boot code where
384 breakpoints and single stepping do not work. The value of this
385 symbol should be set to the TLB1 entry to be used for this
388 CONFIG_SYS_FSL_ERRATUM_A004510
390 Enables a workaround for erratum A004510. If set,
391 then CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV and
392 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY must be set.
394 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV
395 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 (optional)
397 Defines one or two SoC revisions (low 8 bits of SVR)
398 for which the A004510 workaround should be applied.
400 The rest of SVR is either not relevant to the decision
401 of whether the erratum is present (e.g. p2040 versus
402 p2041) or is implied by the build target, which controls
403 whether CONFIG_SYS_FSL_ERRATUM_A004510 is set.
405 See Freescale App Note 4493 for more information about
408 CONFIG_A003399_NOR_WORKAROUND
409 Enables a workaround for IFC erratum A003399. It is only
410 requred during NOR boot.
412 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
414 This is the value to write into CCSR offset 0x18600
415 according to the A004510 workaround.
417 CONFIG_SYS_FSL_DSP_DDR_ADDR
418 This value denotes start offset of DDR memory which is
419 connected exclusively to the DSP cores.
421 CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
422 This value denotes start offset of M2 memory
423 which is directly connected to the DSP core.
425 CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
426 This value denotes start offset of M3 memory which is directly
427 connected to the DSP core.
429 CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
430 This value denotes start offset of DSP CCSR space.
432 CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
433 Single Source Clock is clocking mode present in some of FSL SoC's.
434 In this mode, a single differential clock is used to supply
435 clocks to the sysclock, ddrclock and usbclock.
437 CONFIG_SYS_CPC_REINIT_F
438 This CONFIG is defined when the CPC is configured as SRAM at the
439 time of U-boot entry and is required to be re-initialized.
442 Inidcates this SoC supports deep sleep feature. If deep sleep is
443 supported, core will start to execute uboot when wakes up.
445 - Generic CPU options:
446 CONFIG_SYS_GENERIC_GLOBAL_DATA
447 Defines global data is initialized in generic board board_init_f().
448 If this macro is defined, global data is created and cleared in
449 generic board board_init_f(). Without this macro, architecture/board
450 should initialize global data before calling board_init_f().
452 CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
454 Defines the endianess of the CPU. Implementation of those
455 values is arch specific.
458 Freescale DDR driver in use. This type of DDR controller is
459 found in mpc83xx, mpc85xx, mpc86xx as well as some ARM core
462 CONFIG_SYS_FSL_DDR_ADDR
463 Freescale DDR memory-mapped register base.
465 CONFIG_SYS_FSL_DDR_EMU
466 Specify emulator support for DDR. Some DDR features such as
467 deskew training are not available.
469 CONFIG_SYS_FSL_DDRC_GEN1
470 Freescale DDR1 controller.
472 CONFIG_SYS_FSL_DDRC_GEN2
473 Freescale DDR2 controller.
475 CONFIG_SYS_FSL_DDRC_GEN3
476 Freescale DDR3 controller.
478 CONFIG_SYS_FSL_DDRC_GEN4
479 Freescale DDR4 controller.
481 CONFIG_SYS_FSL_DDRC_ARM_GEN3
482 Freescale DDR3 controller for ARM-based SoCs.
485 Board config to use DDR1. It can be enabled for SoCs with
486 Freescale DDR1 or DDR2 controllers, depending on the board
490 Board config to use DDR2. It can be eanbeld for SoCs with
491 Freescale DDR2 or DDR3 controllers, depending on the board
495 Board config to use DDR3. It can be enabled for SoCs with
496 Freescale DDR3 or DDR3L controllers.
499 Board config to use DDR3L. It can be enabled for SoCs with
503 Board config to use DDR4. It can be enabled for SoCs with
506 CONFIG_SYS_FSL_IFC_BE
507 Defines the IFC controller register space as Big Endian
509 CONFIG_SYS_FSL_IFC_LE
510 Defines the IFC controller register space as Little Endian
512 CONFIG_SYS_FSL_PBL_PBI
513 It enables addition of RCW (Power on reset configuration) in built image.
514 Please refer doc/README.pblimage for more details
516 CONFIG_SYS_FSL_PBL_RCW
517 It adds PBI(pre-boot instructions) commands in u-boot build image.
518 PBI commands can be used to configure SoC before it starts the execution.
519 Please refer doc/README.pblimage for more details
522 It adds a target to create boot binary having SPL binary in PBI format
523 concatenated with u-boot binary.
525 CONFIG_SYS_FSL_DDR_BE
526 Defines the DDR controller register space as Big Endian
528 CONFIG_SYS_FSL_DDR_LE
529 Defines the DDR controller register space as Little Endian
531 CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY
532 Physical address from the view of DDR controllers. It is the
533 same as CONFIG_SYS_DDR_SDRAM_BASE for all Power SoCs. But
534 it could be different for ARM SoCs.
536 CONFIG_SYS_FSL_DDR_INTLV_256B
537 DDR controller interleaving on 256-byte. This is a special
538 interleaving mode, handled by Dickens for Freescale layerscape
541 - Intel Monahans options:
542 CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO
544 Defines the Monahans run mode to oscillator
545 ratio. Valid values are 8, 16, 24, 31. The core
546 frequency is this value multiplied by 13 MHz.
548 CONFIG_SYS_MONAHANS_TURBO_RUN_MODE_RATIO
550 Defines the Monahans turbo mode to oscillator
551 ratio. Valid values are 1 (default if undefined) and
552 2. The core frequency as calculated above is multiplied
556 CONFIG_SYS_INIT_SP_OFFSET
558 Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack
559 pointer. This is needed for the temporary stack before
562 CONFIG_SYS_MIPS_CACHE_MODE
564 Cache operation mode for the MIPS CPU.
565 See also arch/mips/include/asm/mipsregs.h.
567 CONF_CM_CACHABLE_NO_WA
570 CONF_CM_CACHABLE_NONCOHERENT
574 CONF_CM_CACHABLE_ACCELERATED
576 CONFIG_SYS_XWAY_EBU_BOOTCFG
578 Special option for Lantiq XWAY SoCs for booting from NOR flash.
579 See also arch/mips/cpu/mips32/start.S.
581 CONFIG_XWAY_SWAP_BYTES
583 Enable compilation of tools/xway-swap-bytes needed for Lantiq
584 XWAY SoCs for booting from NOR flash. The U-Boot image needs to
585 be swapped if a flash programmer is used.
588 CONFIG_SYS_EXCEPTION_VECTORS_HIGH
590 Select high exception vectors of the ARM core, e.g., do not
591 clear the V bit of the c1 register of CP15.
593 CONFIG_SYS_THUMB_BUILD
595 Use this flag to build U-Boot using the Thumb instruction
596 set for ARM architectures. Thumb instruction set provides
597 better code density. For ARM architectures that support
598 Thumb2 this flag will result in Thumb2 code generated by
601 CONFIG_ARM_ERRATA_716044
602 CONFIG_ARM_ERRATA_742230
603 CONFIG_ARM_ERRATA_743622
604 CONFIG_ARM_ERRATA_751472
605 CONFIG_ARM_ERRATA_794072
606 CONFIG_ARM_ERRATA_761320
608 If set, the workarounds for these ARM errata are applied early
609 during U-Boot startup. Note that these options force the
610 workarounds to be applied; no CPU-type/version detection
611 exists, unlike the similar options in the Linux kernel. Do not
612 set these options unless they apply!
617 The frequency of the timer returned by get_timer().
618 get_timer() must operate in milliseconds and this CONFIG
619 option must be set to 1000.
621 - Linux Kernel Interface:
624 U-Boot stores all clock information in Hz
625 internally. For binary compatibility with older Linux
626 kernels (which expect the clocks passed in the
627 bd_info data to be in MHz) the environment variable
628 "clocks_in_mhz" can be defined so that U-Boot
629 converts clock data to MHZ before passing it to the
631 When CONFIG_CLOCKS_IN_MHZ is defined, a definition of
632 "clocks_in_mhz=1" is automatically included in the
635 CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only]
637 When transferring memsize parameter to linux, some versions
638 expect it to be in bytes, others in MB.
639 Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.
643 New kernel versions are expecting firmware settings to be
644 passed using flattened device trees (based on open firmware
648 * New libfdt-based support
649 * Adds the "fdt" command
650 * The bootm command automatically updates the fdt
652 OF_CPU - The proper name of the cpus node (only required for
653 MPC512X and MPC5xxx based boards).
654 OF_SOC - The proper name of the soc node (only required for
655 MPC512X and MPC5xxx based boards).
656 OF_TBCLK - The timebase frequency.
657 OF_STDOUT_PATH - The path to the console device
659 boards with QUICC Engines require OF_QE to set UCC MAC
662 CONFIG_OF_BOARD_SETUP
664 Board code has addition modification that it wants to make
665 to the flat device tree before handing it off to the kernel
669 This define fills in the correct boot CPU in the boot
670 param header, the default value is zero if undefined.
674 U-Boot can detect if an IDE device is present or not.
675 If not, and this new config option is activated, U-Boot
676 removes the ATA node from the DTS before booting Linux,
677 so the Linux IDE driver does not probe the device and
678 crash. This is needed for buggy hardware (uc101) where
679 no pull down resistor is connected to the signal IDE5V_DD7.
681 CONFIG_MACH_TYPE [relevant for ARM only][mandatory]
683 This setting is mandatory for all boards that have only one
684 machine type and must be used to specify the machine type
685 number as it appears in the ARM machine registry
686 (see http://www.arm.linux.org.uk/developer/machines/).
687 Only boards that have multiple machine types supported
688 in a single configuration file and the machine type is
689 runtime discoverable, do not have to use this setting.
691 - vxWorks boot parameters:
693 bootvx constructs a valid bootline using the following
694 environments variables: bootfile, ipaddr, serverip, hostname.
695 It loads the vxWorks image pointed bootfile.
697 CONFIG_SYS_VXWORKS_BOOT_DEVICE - The vxworks device name
698 CONFIG_SYS_VXWORKS_MAC_PTR - Ethernet 6 byte MA -address
699 CONFIG_SYS_VXWORKS_SERVERNAME - Name of the server
700 CONFIG_SYS_VXWORKS_BOOT_ADDR - Address of boot parameters
702 CONFIG_SYS_VXWORKS_ADD_PARAMS
704 Add it at the end of the bootline. E.g "u=username pw=secret"
706 Note: If a "bootargs" environment is defined, it will overwride
707 the defaults discussed just above.
709 - Cache Configuration:
710 CONFIG_SYS_ICACHE_OFF - Do not enable instruction cache in U-Boot
711 CONFIG_SYS_DCACHE_OFF - Do not enable data cache in U-Boot
712 CONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot
714 - Cache Configuration for ARM:
715 CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache
717 CONFIG_SYS_PL310_BASE - Physical base address of PL310
718 controller register space
723 Define this if you want support for Amba PrimeCell PL010 UARTs.
727 Define this if you want support for Amba PrimeCell PL011 UARTs.
731 If you have Amba PrimeCell PL011 UARTs, set this variable to
732 the clock speed of the UARTs.
736 If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
737 define this to a list of base addresses for each (supported)
738 port. See e.g. include/configs/versatile.h
740 CONFIG_PL011_SERIAL_RLCR
742 Some vendor versions of PL011 serial ports (e.g. ST-Ericsson U8500)
743 have separate receive and transmit line control registers. Set
744 this variable to initialize the extra register.
746 CONFIG_PL011_SERIAL_FLUSH_ON_INIT
748 On some platforms (e.g. U8500) U-Boot is loaded by a second stage
749 boot loader that has already initialized the UART. Define this
750 variable to flush the UART at init time.
752 CONFIG_SERIAL_HW_FLOW_CONTROL
754 Define this variable to enable hw flow control in serial driver.
755 Current user of this option is drivers/serial/nsl16550.c driver
758 Depending on board, define exactly one serial port
759 (like CONFIG_8xx_CONS_SMC1, CONFIG_8xx_CONS_SMC2,
760 CONFIG_8xx_CONS_SCC1, ...), or switch off the serial
761 console by defining CONFIG_8xx_CONS_NONE
763 Note: if CONFIG_8xx_CONS_NONE is defined, the serial
764 port routines must be defined elsewhere
765 (i.e. serial_init(), serial_getc(), ...)
768 Enables console device for a color framebuffer. Needs following
769 defines (cf. smiLynxEM, i8042)
770 VIDEO_FB_LITTLE_ENDIAN graphic memory organisation
772 VIDEO_HW_RECTFILL graphic chip supports
775 VIDEO_HW_BITBLT graphic chip supports
776 bit-blit (cf. smiLynxEM)
777 VIDEO_VISIBLE_COLS visible pixel columns
779 VIDEO_VISIBLE_ROWS visible pixel rows
780 VIDEO_PIXEL_SIZE bytes per pixel
781 VIDEO_DATA_FORMAT graphic data format
782 (0-5, cf. cfb_console.c)
783 VIDEO_FB_ADRS framebuffer address
784 VIDEO_KBD_INIT_FCT keyboard int fct
785 (i.e. i8042_kbd_init())
786 VIDEO_TSTC_FCT test char fct
788 VIDEO_GETC_FCT get char fct
790 CONFIG_CONSOLE_CURSOR cursor drawing on/off
791 (requires blink timer
793 CONFIG_SYS_CONSOLE_BLINK_COUNT blink interval (cf. i8042.c)
794 CONFIG_CONSOLE_TIME display time/date info in
796 (requires CONFIG_CMD_DATE)
797 CONFIG_VIDEO_LOGO display Linux logo in
799 CONFIG_VIDEO_BMP_LOGO use bmp_logo.h instead of
800 linux_logo.h for logo.
801 Requires CONFIG_VIDEO_LOGO
802 CONFIG_CONSOLE_EXTRA_INFO
803 additional board info beside
806 When CONFIG_CFB_CONSOLE_ANSI is defined, console will support
807 a limited number of ANSI escape sequences (cursor control,
808 erase functions and limited graphics rendition control).
810 When CONFIG_CFB_CONSOLE is defined, video console is
811 default i/o. Serial console can be forced with
812 environment 'console=serial'.
814 When CONFIG_SILENT_CONSOLE is defined, all console
815 messages (by U-Boot and Linux!) can be silenced with
816 the "silent" environment variable. See
817 doc/README.silent for more information.
819 CONFIG_SYS_CONSOLE_BG_COL: define the backgroundcolor, default
821 CONFIG_SYS_CONSOLE_FG_COL: define the foregroundcolor, default
825 CONFIG_BAUDRATE - in bps
826 Select one of the baudrates listed in
827 CONFIG_SYS_BAUDRATE_TABLE, see below.
828 CONFIG_SYS_BRGCLK_PRESCALE, baudrate prescale
830 - Console Rx buffer length
831 With CONFIG_SYS_SMC_RXBUFLEN it is possible to define
832 the maximum receive buffer length for the SMC.
833 This option is actual only for 82xx and 8xx possible.
834 If using CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE
835 must be defined, to setup the maximum idle timeout for
838 - Pre-Console Buffer:
839 Prior to the console being initialised (i.e. serial UART
840 initialised etc) all console output is silently discarded.
841 Defining CONFIG_PRE_CONSOLE_BUFFER will cause U-Boot to
842 buffer any console messages prior to the console being
843 initialised to a buffer of size CONFIG_PRE_CON_BUF_SZ
844 bytes located at CONFIG_PRE_CON_BUF_ADDR. The buffer is
845 a circular buffer, so if more than CONFIG_PRE_CON_BUF_SZ
846 bytes are output before the console is initialised, the
847 earlier bytes are discarded.
849 'Sane' compilers will generate smaller code if
850 CONFIG_PRE_CON_BUF_SZ is a power of 2
852 - Safe printf() functions
853 Define CONFIG_SYS_VSNPRINTF to compile in safe versions of
854 the printf() functions. These are defined in
855 include/vsprintf.h and include snprintf(), vsnprintf() and
856 so on. Code size increase is approximately 300-500 bytes.
857 If this option is not given then these functions will
858 silently discard their buffer size argument - this means
859 you are not getting any overflow checking in this case.
861 - Boot Delay: CONFIG_BOOTDELAY - in seconds
862 Delay before automatically booting the default image;
863 set to -1 to disable autoboot.
864 set to -2 to autoboot with no delay and not check for abort
865 (even when CONFIG_ZERO_BOOTDELAY_CHECK is defined).
867 See doc/README.autoboot for these options that
868 work with CONFIG_BOOTDELAY. None are required.
869 CONFIG_BOOT_RETRY_TIME
870 CONFIG_BOOT_RETRY_MIN
871 CONFIG_AUTOBOOT_KEYED
872 CONFIG_AUTOBOOT_PROMPT
873 CONFIG_AUTOBOOT_DELAY_STR
874 CONFIG_AUTOBOOT_STOP_STR
875 CONFIG_AUTOBOOT_DELAY_STR2
876 CONFIG_AUTOBOOT_STOP_STR2
877 CONFIG_ZERO_BOOTDELAY_CHECK
878 CONFIG_RESET_TO_RETRY
882 Only needed when CONFIG_BOOTDELAY is enabled;
883 define a command string that is automatically executed
884 when no character is read on the console interface
885 within "Boot Delay" after reset.
888 This can be used to pass arguments to the bootm
889 command. The value of CONFIG_BOOTARGS goes into the
890 environment value "bootargs".
892 CONFIG_RAMBOOT and CONFIG_NFSBOOT
893 The value of these goes into the environment as
894 "ramboot" and "nfsboot" respectively, and can be used
895 as a convenience, when switching between booting from
899 CONFIG_BOOTCOUNT_LIMIT
900 Implements a mechanism for detecting a repeating reboot
902 http://www.denx.de/wiki/view/DULG/UBootBootCountLimit
905 If no softreset save registers are found on the hardware
906 "bootcount" is stored in the environment. To prevent a
907 saveenv on all reboots, the environment variable
908 "upgrade_available" is used. If "upgrade_available" is
909 0, "bootcount" is always 0, if "upgrade_available" is
910 1 "bootcount" is incremented in the environment.
911 So the Userspace Applikation must set the "upgrade_available"
912 and "bootcount" variable to 0, if a boot was successfully.
917 When this option is #defined, the existence of the
918 environment variable "preboot" will be checked
919 immediately before starting the CONFIG_BOOTDELAY
920 countdown and/or running the auto-boot command resp.
921 entering interactive mode.
923 This feature is especially useful when "preboot" is
924 automatically generated or modified. For an example
925 see the LWMON board specific code: here "preboot" is
926 modified when the user holds down a certain
927 combination of keys on the (special) keyboard when
930 - Serial Download Echo Mode:
932 If defined to 1, all characters received during a
933 serial download (using the "loads" command) are
934 echoed back. This might be needed by some terminal
935 emulations (like "cu"), but may as well just take
936 time on others. This setting #define's the initial
937 value of the "loads_echo" environment variable.
939 - Kgdb Serial Baudrate: (if CONFIG_CMD_KGDB is defined)
941 Select one of the baudrates listed in
942 CONFIG_SYS_BAUDRATE_TABLE, see below.
945 Monitor commands can be included or excluded
946 from the build by using the #include files
947 <config_cmd_all.h> and #undef'ing unwanted
948 commands, or using <config_cmd_default.h>
949 and augmenting with additional #define's
952 The default command configuration includes all commands
953 except those marked below with a "*".
955 CONFIG_CMD_AES AES 128 CBC encrypt/decrypt
956 CONFIG_CMD_ASKENV * ask for env variable
957 CONFIG_CMD_BDI bdinfo
958 CONFIG_CMD_BEDBUG * Include BedBug Debugger
959 CONFIG_CMD_BMP * BMP support
960 CONFIG_CMD_BSP * Board specific commands
961 CONFIG_CMD_BOOTD bootd
962 CONFIG_CMD_CACHE * icache, dcache
963 CONFIG_CMD_CLK * clock command support
964 CONFIG_CMD_CONSOLE coninfo
965 CONFIG_CMD_CRC32 * crc32
966 CONFIG_CMD_DATE * support for RTC, date/time...
967 CONFIG_CMD_DHCP * DHCP support
968 CONFIG_CMD_DIAG * Diagnostics
969 CONFIG_CMD_DS4510 * ds4510 I2C gpio commands
970 CONFIG_CMD_DS4510_INFO * ds4510 I2C info command
971 CONFIG_CMD_DS4510_MEM * ds4510 I2C eeprom/sram commansd
972 CONFIG_CMD_DS4510_RST * ds4510 I2C rst command
973 CONFIG_CMD_DTT * Digital Therm and Thermostat
974 CONFIG_CMD_ECHO echo arguments
975 CONFIG_CMD_EDITENV edit env variable
976 CONFIG_CMD_EEPROM * EEPROM read/write support
977 CONFIG_CMD_ELF * bootelf, bootvx
978 CONFIG_CMD_ENV_CALLBACK * display details about env callbacks
979 CONFIG_CMD_ENV_FLAGS * display details about env flags
980 CONFIG_CMD_ENV_EXISTS * check existence of env variable
981 CONFIG_CMD_EXPORTENV * export the environment
982 CONFIG_CMD_EXT2 * ext2 command support
983 CONFIG_CMD_EXT4 * ext4 command support
984 CONFIG_CMD_FS_GENERIC * filesystem commands (e.g. load, ls)
985 that work for multiple fs types
986 CONFIG_CMD_SAVEENV saveenv
987 CONFIG_CMD_FDC * Floppy Disk Support
988 CONFIG_CMD_FAT * FAT command support
989 CONFIG_CMD_FLASH flinfo, erase, protect
990 CONFIG_CMD_FPGA FPGA device initialization support
991 CONFIG_CMD_FUSE * Device fuse support
992 CONFIG_CMD_GETTIME * Get time since boot
993 CONFIG_CMD_GO * the 'go' command (exec code)
994 CONFIG_CMD_GREPENV * search environment
995 CONFIG_CMD_HASH * calculate hash / digest
996 CONFIG_CMD_HWFLOW * RTS/CTS hw flow control
997 CONFIG_CMD_I2C * I2C serial bus support
998 CONFIG_CMD_IDE * IDE harddisk support
999 CONFIG_CMD_IMI iminfo
1000 CONFIG_CMD_IMLS List all images found in NOR flash
1001 CONFIG_CMD_IMLS_NAND * List all images found in NAND flash
1002 CONFIG_CMD_IMMAP * IMMR dump support
1003 CONFIG_CMD_IOTRACE * I/O tracing for debugging
1004 CONFIG_CMD_IMPORTENV * import an environment
1005 CONFIG_CMD_INI * import data from an ini file into the env
1006 CONFIG_CMD_IRQ * irqinfo
1007 CONFIG_CMD_ITEST Integer/string test of 2 values
1008 CONFIG_CMD_JFFS2 * JFFS2 Support
1009 CONFIG_CMD_KGDB * kgdb
1010 CONFIG_CMD_LDRINFO * ldrinfo (display Blackfin loader)
1011 CONFIG_CMD_LINK_LOCAL * link-local IP address auto-configuration
1013 CONFIG_CMD_LOADB loadb
1014 CONFIG_CMD_LOADS loads
1015 CONFIG_CMD_MD5SUM * print md5 message digest
1016 (requires CONFIG_CMD_MEMORY and CONFIG_MD5)
1017 CONFIG_CMD_MEMINFO * Display detailed memory information
1018 CONFIG_CMD_MEMORY md, mm, nm, mw, cp, cmp, crc, base,
1020 CONFIG_CMD_MEMTEST * mtest
1021 CONFIG_CMD_MISC Misc functions like sleep etc
1022 CONFIG_CMD_MMC * MMC memory mapped support
1023 CONFIG_CMD_MII * MII utility commands
1024 CONFIG_CMD_MTDPARTS * MTD partition support
1025 CONFIG_CMD_NAND * NAND support
1026 CONFIG_CMD_NET bootp, tftpboot, rarpboot
1027 CONFIG_CMD_NFS NFS support
1028 CONFIG_CMD_PCA953X * PCA953x I2C gpio commands
1029 CONFIG_CMD_PCA953X_INFO * PCA953x I2C gpio info command
1030 CONFIG_CMD_PCI * pciinfo
1031 CONFIG_CMD_PCMCIA * PCMCIA support
1032 CONFIG_CMD_PING * send ICMP ECHO_REQUEST to network
1034 CONFIG_CMD_PORTIO * Port I/O
1035 CONFIG_CMD_READ * Read raw data from partition
1036 CONFIG_CMD_REGINFO * Register dump
1037 CONFIG_CMD_RUN run command in env variable
1038 CONFIG_CMD_SANDBOX * sb command to access sandbox features
1039 CONFIG_CMD_SAVES * save S record dump
1040 CONFIG_CMD_SCSI * SCSI Support
1041 CONFIG_CMD_SDRAM * print SDRAM configuration information
1042 (requires CONFIG_CMD_I2C)
1043 CONFIG_CMD_SETGETDCR Support for DCR Register access
1045 CONFIG_CMD_SF * Read/write/erase SPI NOR flash
1046 CONFIG_CMD_SHA1SUM * print sha1 memory digest
1047 (requires CONFIG_CMD_MEMORY)
1048 CONFIG_CMD_SOFTSWITCH * Soft switch setting command for BF60x
1049 CONFIG_CMD_SOURCE "source" command Support
1050 CONFIG_CMD_SPI * SPI serial bus support
1051 CONFIG_CMD_TFTPSRV * TFTP transfer in server mode
1052 CONFIG_CMD_TFTPPUT * TFTP put command (upload)
1053 CONFIG_CMD_TIME * run command and report execution time (ARM specific)
1054 CONFIG_CMD_TIMER * access to the system tick timer
1055 CONFIG_CMD_USB * USB support
1056 CONFIG_CMD_CDP * Cisco Discover Protocol support
1057 CONFIG_CMD_MFSL * Microblaze FSL support
1058 CONFIG_CMD_XIMG Load part of Multi Image
1059 CONFIG_CMD_UUID * Generate random UUID or GUID string
1061 EXAMPLE: If you want all functions except of network
1062 support you can write:
1064 #include "config_cmd_all.h"
1065 #undef CONFIG_CMD_NET
1068 fdt (flattened device tree) command: CONFIG_OF_LIBFDT
1070 Note: Don't enable the "icache" and "dcache" commands
1071 (configuration option CONFIG_CMD_CACHE) unless you know
1072 what you (and your U-Boot users) are doing. Data
1073 cache cannot be enabled on systems like the 8xx or
1074 8260 (where accesses to the IMMR region must be
1075 uncached), and it cannot be disabled on all other
1076 systems where we (mis-) use the data cache to hold an
1077 initial stack and some data.
1080 XXX - this list needs to get updated!
1082 - Regular expression support:
1084 If this variable is defined, U-Boot is linked against
1085 the SLRE (Super Light Regular Expression) library,
1086 which adds regex support to some commands, as for
1087 example "env grep" and "setexpr".
1091 If this variable is defined, U-Boot will use a device tree
1092 to configure its devices, instead of relying on statically
1093 compiled #defines in the board file. This option is
1094 experimental and only available on a few boards. The device
1095 tree is available in the global data as gd->fdt_blob.
1097 U-Boot needs to get its device tree from somewhere. This can
1098 be done using one of the two options below:
1101 If this variable is defined, U-Boot will embed a device tree
1102 binary in its image. This device tree file should be in the
1103 board directory and called <soc>-<board>.dts. The binary file
1104 is then picked up in board_init_f() and made available through
1105 the global data structure as gd->blob.
1108 If this variable is defined, U-Boot will build a device tree
1109 binary. It will be called u-boot.dtb. Architecture-specific
1110 code will locate it at run-time. Generally this works by:
1112 cat u-boot.bin u-boot.dtb >image.bin
1114 and in fact, U-Boot does this for you, creating a file called
1115 u-boot-dtb.bin which is useful in the common case. You can
1116 still use the individual files if you need something more
1121 If this variable is defined, it enables watchdog
1122 support for the SoC. There must be support in the SoC
1123 specific code for a watchdog. For the 8xx and 8260
1124 CPUs, the SIU Watchdog feature is enabled in the SYPCR
1125 register. When supported for a specific SoC is
1126 available, then no further board specific code should
1127 be needed to use it.
1130 When using a watchdog circuitry external to the used
1131 SoC, then define this variable and provide board
1132 specific code for the "hw_watchdog_reset" function.
1135 CONFIG_VERSION_VARIABLE
1136 If this variable is defined, an environment variable
1137 named "ver" is created by U-Boot showing the U-Boot
1138 version as printed by the "version" command.
1139 Any change to this variable will be reverted at the
1144 When CONFIG_CMD_DATE is selected, the type of the RTC
1145 has to be selected, too. Define exactly one of the
1148 CONFIG_RTC_MPC8xx - use internal RTC of MPC8xx
1149 CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC
1150 CONFIG_RTC_MC13XXX - use MC13783 or MC13892 RTC
1151 CONFIG_RTC_MC146818 - use MC146818 RTC
1152 CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC
1153 CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC
1154 CONFIG_RTC_DS1338 - use Maxim, Inc. DS1338 RTC
1155 CONFIG_RTC_DS1339 - use Maxim, Inc. DS1339 RTC
1156 CONFIG_RTC_DS164x - use Dallas DS164x RTC
1157 CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC
1158 CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC
1159 CONFIG_SYS_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337
1160 CONFIG_SYS_RV3029_TCR - enable trickle charger on
1163 Note that if the RTC uses I2C, then the I2C interface
1164 must also be configured. See I2C Support, below.
1167 CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO
1169 The CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of
1170 chip-ngpio pairs that tell the PCA953X driver the number of
1171 pins supported by a particular chip.
1173 Note that if the GPIO device uses I2C, then the I2C interface
1174 must also be configured. See I2C Support, below.
1177 When CONFIG_IO_TRACE is selected, U-Boot intercepts all I/O
1178 accesses and can checksum them or write a list of them out
1179 to memory. See the 'iotrace' command for details. This is
1180 useful for testing device drivers since it can confirm that
1181 the driver behaves the same way before and after a code
1182 change. Currently this is supported on sandbox and arm. To
1183 add support for your architecture, add '#include <iotrace.h>'
1184 to the bottom of arch/<arch>/include/asm/io.h and test.
1186 Example output from the 'iotrace stats' command is below.
1187 Note that if the trace buffer is exhausted, the checksum will
1188 still continue to operate.
1191 Start: 10000000 (buffer start address)
1192 Size: 00010000 (buffer size)
1193 Offset: 00000120 (current buffer offset)
1194 Output: 10000120 (start + offset)
1195 Count: 00000018 (number of trace records)
1196 CRC32: 9526fb66 (CRC32 of all trace records)
1198 - Timestamp Support:
1200 When CONFIG_TIMESTAMP is selected, the timestamp
1201 (date and time) of an image is printed by image
1202 commands like bootm or iminfo. This option is
1203 automatically enabled when you select CONFIG_CMD_DATE .
1205 - Partition Labels (disklabels) Supported:
1206 Zero or more of the following:
1207 CONFIG_MAC_PARTITION Apple's MacOS partition table.
1208 CONFIG_DOS_PARTITION MS Dos partition table, traditional on the
1209 Intel architecture, USB sticks, etc.
1210 CONFIG_ISO_PARTITION ISO partition table, used on CDROM etc.
1211 CONFIG_EFI_PARTITION GPT partition table, common when EFI is the
1212 bootloader. Note 2TB partition limit; see
1214 CONFIG_MTD_PARTITIONS Memory Technology Device partition table.
1216 If IDE or SCSI support is enabled (CONFIG_CMD_IDE or
1217 CONFIG_CMD_SCSI) you must configure support for at
1218 least one non-MTD partition type as well.
1221 CONFIG_IDE_RESET_ROUTINE - this is defined in several
1222 board configurations files but used nowhere!
1224 CONFIG_IDE_RESET - is this is defined, IDE Reset will
1225 be performed by calling the function
1226 ide_set_reset(int reset)
1227 which has to be defined in a board specific file
1232 Set this to enable ATAPI support.
1237 Set this to enable support for disks larger than 137GB
1238 Also look at CONFIG_SYS_64BIT_LBA.
1239 Whithout these , LBA48 support uses 32bit variables and will 'only'
1240 support disks up to 2.1TB.
1242 CONFIG_SYS_64BIT_LBA:
1243 When enabled, makes the IDE subsystem use 64bit sector addresses.
1247 At the moment only there is only support for the
1248 SYM53C8XX SCSI controller; define
1249 CONFIG_SCSI_SYM53C8XX to enable it.
1251 CONFIG_SYS_SCSI_MAX_LUN [8], CONFIG_SYS_SCSI_MAX_SCSI_ID [7] and
1252 CONFIG_SYS_SCSI_MAX_DEVICE [CONFIG_SYS_SCSI_MAX_SCSI_ID *
1253 CONFIG_SYS_SCSI_MAX_LUN] can be adjusted to define the
1254 maximum numbers of LUNs, SCSI ID's and target
1256 CONFIG_SYS_SCSI_SYM53C8XX_CCF to fix clock timing (80Mhz)
1258 The environment variable 'scsidevs' is set to the number of
1259 SCSI devices found during the last scan.
1261 - NETWORK Support (PCI):
1263 Support for Intel 8254x/8257x gigabit chips.
1266 Utility code for direct access to the SPI bus on Intel 8257x.
1267 This does not do anything useful unless you set at least one
1268 of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.
1270 CONFIG_E1000_SPI_GENERIC
1271 Allow generic access to the SPI bus on the Intel 8257x, for
1272 example with the "sspi" command.
1275 Management command for E1000 devices. When used on devices
1276 with SPI support you can reprogram the EEPROM from U-Boot.
1278 CONFIG_E1000_FALLBACK_MAC
1279 default MAC for empty EEPROM after production.
1282 Support for Intel 82557/82559/82559ER chips.
1283 Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM
1284 write routine for first time initialisation.
1287 Support for Digital 2114x chips.
1288 Optional CONFIG_TULIP_SELECT_MEDIA for board specific
1289 modem chip initialisation (KS8761/QS6611).
1292 Support for National dp83815 chips.
1295 Support for National dp8382[01] gigabit chips.
1297 - NETWORK Support (other):
1299 CONFIG_DRIVER_AT91EMAC
1300 Support for AT91RM9200 EMAC.
1303 Define this to use reduced MII inteface
1305 CONFIG_DRIVER_AT91EMAC_QUIET
1306 If this defined, the driver is quiet.
1307 The driver doen't show link status messages.
1309 CONFIG_CALXEDA_XGMAC
1310 Support for the Calxeda XGMAC device
1313 Support for SMSC's LAN91C96 chips.
1315 CONFIG_LAN91C96_BASE
1316 Define this to hold the physical address
1317 of the LAN91C96's I/O space
1319 CONFIG_LAN91C96_USE_32_BIT
1320 Define this to enable 32 bit addressing
1323 Support for SMSC's LAN91C111 chip
1325 CONFIG_SMC91111_BASE
1326 Define this to hold the physical address
1327 of the device (I/O space)
1329 CONFIG_SMC_USE_32_BIT
1330 Define this if data bus is 32 bits
1332 CONFIG_SMC_USE_IOFUNCS
1333 Define this to use i/o functions instead of macros
1334 (some hardware wont work with macros)
1336 CONFIG_DRIVER_TI_EMAC
1337 Support for davinci emac
1339 CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
1340 Define this if you have more then 3 PHYs.
1343 Support for Faraday's FTGMAC100 Gigabit SoC Ethernet
1345 CONFIG_FTGMAC100_EGIGA
1346 Define this to use GE link update with gigabit PHY.
1347 Define this if FTGMAC100 is connected to gigabit PHY.
1348 If your system has 10/100 PHY only, it might not occur
1349 wrong behavior. Because PHY usually return timeout or
1350 useless data when polling gigabit status and gigabit
1351 control registers. This behavior won't affect the
1352 correctnessof 10/100 link speed update.
1355 Support for SMSC's LAN911x and LAN921x chips
1358 Define this to hold the physical address
1359 of the device (I/O space)
1361 CONFIG_SMC911X_32_BIT
1362 Define this if data bus is 32 bits
1364 CONFIG_SMC911X_16_BIT
1365 Define this if data bus is 16 bits. If your processor
1366 automatically converts one 32 bit word to two 16 bit
1367 words you may also try CONFIG_SMC911X_32_BIT.
1370 Support for Renesas on-chip Ethernet controller
1372 CONFIG_SH_ETHER_USE_PORT
1373 Define the number of ports to be used
1375 CONFIG_SH_ETHER_PHY_ADDR
1376 Define the ETH PHY's address
1378 CONFIG_SH_ETHER_CACHE_WRITEBACK
1379 If this option is set, the driver enables cache flush.
1383 Support TPM devices.
1386 Support for i2c bus TPM devices. Only one device
1387 per system is supported at this time.
1389 CONFIG_TPM_TIS_I2C_BUS_NUMBER
1390 Define the the i2c bus number for the TPM device
1392 CONFIG_TPM_TIS_I2C_SLAVE_ADDRESS
1393 Define the TPM's address on the i2c bus
1395 CONFIG_TPM_TIS_I2C_BURST_LIMITATION
1396 Define the burst count bytes upper limit
1398 CONFIG_TPM_ATMEL_TWI
1399 Support for Atmel TWI TPM device. Requires I2C support.
1402 Support for generic parallel port TPM devices. Only one device
1403 per system is supported at this time.
1405 CONFIG_TPM_TIS_BASE_ADDRESS
1406 Base address where the generic TPM device is mapped
1407 to. Contemporary x86 systems usually map it at
1411 Add tpm monitor functions.
1412 Requires CONFIG_TPM. If CONFIG_TPM_AUTH_SESSIONS is set, also
1413 provides monitor access to authorized functions.
1416 Define this to enable the TPM support library which provides
1417 functional interfaces to some TPM commands.
1418 Requires support for a TPM device.
1420 CONFIG_TPM_AUTH_SESSIONS
1421 Define this to enable authorized functions in the TPM library.
1422 Requires CONFIG_TPM and CONFIG_SHA1.
1425 At the moment only the UHCI host controller is
1426 supported (PIP405, MIP405, MPC5200); define
1427 CONFIG_USB_UHCI to enable it.
1428 define CONFIG_USB_KEYBOARD to enable the USB Keyboard
1429 and define CONFIG_USB_STORAGE to enable the USB
1432 Supported are USB Keyboards and USB Floppy drives
1434 MPC5200 USB requires additional defines:
1436 for 528 MHz Clock: 0x0001bbbb
1440 for differential drivers: 0x00001000
1441 for single ended drivers: 0x00005000
1442 for differential drivers on PSC3: 0x00000100
1443 for single ended drivers on PSC3: 0x00004100
1444 CONFIG_SYS_USB_EVENT_POLL
1445 May be defined to allow interrupt polling
1446 instead of using asynchronous interrupts
1448 CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the
1449 txfilltuning field in the EHCI controller on reset.
1452 Define the below if you wish to use the USB console.
1453 Once firmware is rebuilt from a serial console issue the
1454 command "setenv stdin usbtty; setenv stdout usbtty" and
1455 attach your USB cable. The Unix command "dmesg" should print
1456 it has found a new device. The environment variable usbtty
1457 can be set to gserial or cdc_acm to enable your device to
1458 appear to a USB host as a Linux gserial device or a
1459 Common Device Class Abstract Control Model serial device.
1460 If you select usbtty = gserial you should be able to enumerate
1462 # modprobe usbserial vendor=0xVendorID product=0xProductID
1463 else if using cdc_acm, simply setting the environment
1464 variable usbtty to be cdc_acm should suffice. The following
1465 might be defined in YourBoardName.h
1468 Define this to build a UDC device
1471 Define this to have a tty type of device available to
1472 talk to the UDC device
1475 Define this to enable the high speed support for usb
1476 device and usbtty. If this feature is enabled, a routine
1477 int is_usbd_high_speed(void)
1478 also needs to be defined by the driver to dynamically poll
1479 whether the enumeration has succeded at high speed or full
1482 CONFIG_SYS_CONSOLE_IS_IN_ENV
1483 Define this if you want stdin, stdout &/or stderr to
1487 CONFIG_SYS_USB_EXTC_CLK 0xBLAH
1488 Derive USB clock from external clock "blah"
1489 - CONFIG_SYS_USB_EXTC_CLK 0x02
1491 CONFIG_SYS_USB_BRG_CLK 0xBLAH
1492 Derive USB clock from brgclk
1493 - CONFIG_SYS_USB_BRG_CLK 0x04
1495 If you have a USB-IF assigned VendorID then you may wish to
1496 define your own vendor specific values either in BoardName.h
1497 or directly in usbd_vendor_info.h. If you don't define
1498 CONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME,
1499 CONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot
1500 should pretend to be a Linux device to it's target host.
1502 CONFIG_USBD_MANUFACTURER
1503 Define this string as the name of your company for
1504 - CONFIG_USBD_MANUFACTURER "my company"
1506 CONFIG_USBD_PRODUCT_NAME
1507 Define this string as the name of your product
1508 - CONFIG_USBD_PRODUCT_NAME "acme usb device"
1510 CONFIG_USBD_VENDORID
1511 Define this as your assigned Vendor ID from the USB
1512 Implementors Forum. This *must* be a genuine Vendor ID
1513 to avoid polluting the USB namespace.
1514 - CONFIG_USBD_VENDORID 0xFFFF
1516 CONFIG_USBD_PRODUCTID
1517 Define this as the unique Product ID
1519 - CONFIG_USBD_PRODUCTID 0xFFFF
1521 - ULPI Layer Support:
1522 The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
1523 the generic ULPI layer. The generic layer accesses the ULPI PHY
1524 via the platform viewport, so you need both the genric layer and
1525 the viewport enabled. Currently only Chipidea/ARC based
1526 viewport is supported.
1527 To enable the ULPI layer support, define CONFIG_USB_ULPI and
1528 CONFIG_USB_ULPI_VIEWPORT in your board configuration file.
1529 If your ULPI phy needs a different reference clock than the
1530 standard 24 MHz then you have to define CONFIG_ULPI_REF_CLK to
1531 the appropriate value in Hz.
1534 The MMC controller on the Intel PXA is supported. To
1535 enable this define CONFIG_MMC. The MMC can be
1536 accessed from the boot prompt by mapping the device
1537 to physical memory similar to flash. Command line is
1538 enabled with CONFIG_CMD_MMC. The MMC driver also works with
1539 the FAT fs. This is enabled with CONFIG_CMD_FAT.
1542 Support for Renesas on-chip MMCIF controller
1544 CONFIG_SH_MMCIF_ADDR
1545 Define the base address of MMCIF registers
1548 Define the clock frequency for MMCIF
1551 Enable the generic MMC driver
1553 CONFIG_SUPPORT_EMMC_BOOT
1554 Enable some additional features of the eMMC boot partitions.
1556 CONFIG_SUPPORT_EMMC_RPMB
1557 Enable the commands for reading, writing and programming the
1558 key for the Replay Protection Memory Block partition in eMMC.
1560 - USB Device Firmware Update (DFU) class support:
1562 This enables the USB portion of the DFU USB class
1565 This enables the command "dfu" which is used to have
1566 U-Boot create a DFU class device via USB. This command
1567 requires that the "dfu_alt_info" environment variable be
1568 set and define the alt settings to expose to the host.
1571 This enables support for exposing (e)MMC devices via DFU.
1574 This enables support for exposing NAND devices via DFU.
1577 This enables support for exposing RAM via DFU.
1578 Note: DFU spec refer to non-volatile memory usage, but
1579 allow usages beyond the scope of spec - here RAM usage,
1580 one that would help mostly the developer.
1582 CONFIG_SYS_DFU_DATA_BUF_SIZE
1583 Dfu transfer uses a buffer before writing data to the
1584 raw storage device. Make the size (in bytes) of this buffer
1585 configurable. The size of this buffer is also configurable
1586 through the "dfu_bufsiz" environment variable.
1588 CONFIG_SYS_DFU_MAX_FILE_SIZE
1589 When updating files rather than the raw storage device,
1590 we use a static buffer to copy the file into and then write
1591 the buffer once we've been given the whole file. Define
1592 this to the maximum filesize (in bytes) for the buffer.
1593 Default is 4 MiB if undefined.
1595 DFU_DEFAULT_POLL_TIMEOUT
1596 Poll timeout [ms], is the timeout a device can send to the
1597 host. The host must wait for this timeout before sending
1598 a subsequent DFU_GET_STATUS request to the device.
1600 DFU_MANIFEST_POLL_TIMEOUT
1601 Poll timeout [ms], which the device sends to the host when
1602 entering dfuMANIFEST state. Host waits this timeout, before
1603 sending again an USB request to the device.
1605 - USB Device Android Fastboot support:
1607 This enables the command "fastboot" which enables the Android
1608 fastboot mode for the platform's USB device. Fastboot is a USB
1609 protocol for downloading images, flashing and device control
1610 used on Android devices.
1611 See doc/README.android-fastboot for more information.
1613 CONFIG_ANDROID_BOOT_IMAGE
1614 This enables support for booting images which use the Android
1615 image format header.
1617 CONFIG_USB_FASTBOOT_BUF_ADDR
1618 The fastboot protocol requires a large memory buffer for
1619 downloads. Define this to the starting RAM address to use for
1622 CONFIG_USB_FASTBOOT_BUF_SIZE
1623 The fastboot protocol requires a large memory buffer for
1624 downloads. This buffer should be as large as possible for a
1625 platform. Define this to the size available RAM for fastboot.
1627 - Journaling Flash filesystem support:
1628 CONFIG_JFFS2_NAND, CONFIG_JFFS2_NAND_OFF, CONFIG_JFFS2_NAND_SIZE,
1629 CONFIG_JFFS2_NAND_DEV
1630 Define these for a default partition on a NAND device
1632 CONFIG_SYS_JFFS2_FIRST_SECTOR,
1633 CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS
1634 Define these for a default partition on a NOR device
1636 CONFIG_SYS_JFFS_CUSTOM_PART
1637 Define this to create an own partition. You have to provide a
1638 function struct part_info* jffs2_part_info(int part_num)
1640 If you define only one JFFS2 partition you may also want to
1641 #define CONFIG_SYS_JFFS_SINGLE_PART 1
1642 to disable the command chpart. This is the default when you
1643 have not defined a custom partition
1645 - FAT(File Allocation Table) filesystem write function support:
1648 Define this to enable support for saving memory data as a
1649 file in FAT formatted partition.
1651 This will also enable the command "fatwrite" enabling the
1652 user to write files to FAT.
1654 CBFS (Coreboot Filesystem) support
1657 Define this to enable support for reading from a Coreboot
1658 filesystem. Available commands are cbfsinit, cbfsinfo, cbfsls
1661 - FAT(File Allocation Table) filesystem cluster size:
1662 CONFIG_FS_FAT_MAX_CLUSTSIZE
1664 Define the max cluster size for fat operations else
1665 a default value of 65536 will be defined.
1670 Define this to enable standard (PC-Style) keyboard
1674 Standard PC keyboard driver with US (is default) and
1675 GERMAN key layout (switch via environment 'keymap=de') support.
1676 Export function i8042_kbd_init, i8042_tstc and i8042_getc
1677 for cfb_console. Supports cursor blinking.
1680 Enables a Chrome OS keyboard using the CROS_EC interface.
1681 This uses CROS_EC to communicate with a second microcontroller
1682 which provides key scans on request.
1687 Define this to enable video support (for output to
1690 CONFIG_VIDEO_CT69000
1692 Enable Chips & Technologies 69000 Video chip
1694 CONFIG_VIDEO_SMI_LYNXEM
1695 Enable Silicon Motion SMI 712/710/810 Video chip. The
1696 video output is selected via environment 'videoout'
1697 (1 = LCD and 2 = CRT). If videoout is undefined, CRT is
1700 For the CT69000 and SMI_LYNXEM drivers, videomode is
1701 selected via environment 'videomode'. Two different ways
1703 - "videomode=num" 'num' is a standard LiLo mode numbers.
1704 Following standard modes are supported (* is default):
1706 Colors 640x480 800x600 1024x768 1152x864 1280x1024
1707 -------------+---------------------------------------------
1708 8 bits | 0x301* 0x303 0x305 0x161 0x307
1709 15 bits | 0x310 0x313 0x316 0x162 0x319
1710 16 bits | 0x311 0x314 0x317 0x163 0x31A
1711 24 bits | 0x312 0x315 0x318 ? 0x31B
1712 -------------+---------------------------------------------
1713 (i.e. setenv videomode 317; saveenv; reset;)
1715 - "videomode=bootargs" all the video parameters are parsed
1716 from the bootargs. (See drivers/video/videomodes.c)
1719 CONFIG_VIDEO_SED13806
1720 Enable Epson SED13806 driver. This driver supports 8bpp
1721 and 16bpp modes defined by CONFIG_VIDEO_SED13806_8BPP
1722 or CONFIG_VIDEO_SED13806_16BPP
1725 Enable the Freescale DIU video driver. Reference boards for
1726 SOCs that have a DIU should define this macro to enable DIU
1727 support, and should also define these other macros:
1733 CONFIG_VIDEO_SW_CURSOR
1734 CONFIG_VGA_AS_SINGLE_DEVICE
1736 CONFIG_VIDEO_BMP_LOGO
1738 The DIU driver will look for the 'video-mode' environment
1739 variable, and if defined, enable the DIU as a console during
1740 boot. See the documentation file README.video for a
1741 description of this variable.
1745 Enable the VGA video / BIOS for x86. The alternative if you
1746 are using coreboot is to use the coreboot frame buffer
1753 Define this to enable a custom keyboard support.
1754 This simply calls drv_keyboard_init() which must be
1755 defined in your board-specific files.
1756 The only board using this so far is RBC823.
1758 - LCD Support: CONFIG_LCD
1760 Define this to enable LCD support (for output to LCD
1761 display); also select one of the supported displays
1762 by defining one of these:
1766 HITACHI TX09D70VM1CCA, 3.5", 240x320.
1768 CONFIG_NEC_NL6448AC33:
1770 NEC NL6448AC33-18. Active, color, single scan.
1772 CONFIG_NEC_NL6448BC20
1774 NEC NL6448BC20-08. 6.5", 640x480.
1775 Active, color, single scan.
1777 CONFIG_NEC_NL6448BC33_54
1779 NEC NL6448BC33-54. 10.4", 640x480.
1780 Active, color, single scan.
1784 Sharp 320x240. Active, color, single scan.
1785 It isn't 16x9, and I am not sure what it is.
1787 CONFIG_SHARP_LQ64D341
1789 Sharp LQ64D341 display, 640x480.
1790 Active, color, single scan.
1794 HLD1045 display, 640x480.
1795 Active, color, single scan.
1799 Optrex CBL50840-2 NF-FW 99 22 M5
1801 Hitachi LMG6912RPFC-00T
1805 320x240. Black & white.
1807 Normally display is black on white background; define
1808 CONFIG_SYS_WHITE_ON_BLACK to get it inverted.
1810 CONFIG_LCD_ALIGNMENT
1812 Normally the LCD is page-aligned (tyically 4KB). If this is
1813 defined then the LCD will be aligned to this value instead.
1814 For ARM it is sometimes useful to use MMU_SECTION_SIZE
1815 here, since it is cheaper to change data cache settings on
1816 a per-section basis.
1818 CONFIG_CONSOLE_SCROLL_LINES
1820 When the console need to be scrolled, this is the number of
1821 lines to scroll by. It defaults to 1. Increasing this makes
1822 the console jump but can help speed up operation when scrolling
1827 Support drawing of RLE8-compressed bitmaps on the LCD.
1831 Enables an 'i2c edid' command which can read EDID
1832 information over I2C from an attached LCD display.
1834 - Splash Screen Support: CONFIG_SPLASH_SCREEN
1836 If this option is set, the environment is checked for
1837 a variable "splashimage". If found, the usual display
1838 of logo, copyright and system information on the LCD
1839 is suppressed and the BMP image at the address
1840 specified in "splashimage" is loaded instead. The
1841 console is redirected to the "nulldev", too. This
1842 allows for a "silent" boot where a splash screen is
1843 loaded very quickly after power-on.
1845 CONFIG_SPLASHIMAGE_GUARD
1847 If this option is set, then U-Boot will prevent the environment
1848 variable "splashimage" from being set to a problematic address
1849 (see README.displaying-bmps).
1850 This option is useful for targets where, due to alignment
1851 restrictions, an improperly aligned BMP image will cause a data
1852 abort. If you think you will not have problems with unaligned
1853 accesses (for example because your toolchain prevents them)
1854 there is no need to set this option.
1856 CONFIG_SPLASH_SCREEN_ALIGN
1858 If this option is set the splash image can be freely positioned
1859 on the screen. Environment variable "splashpos" specifies the
1860 position as "x,y". If a positive number is given it is used as
1861 number of pixel from left/top. If a negative number is given it
1862 is used as number of pixel from right/bottom. You can also
1863 specify 'm' for centering the image.
1866 setenv splashpos m,m
1867 => image at center of screen
1869 setenv splashpos 30,20
1870 => image at x = 30 and y = 20
1872 setenv splashpos -10,m
1873 => vertically centered image
1874 at x = dspWidth - bmpWidth - 9
1876 - Gzip compressed BMP image support: CONFIG_VIDEO_BMP_GZIP
1878 If this option is set, additionally to standard BMP
1879 images, gzipped BMP images can be displayed via the
1880 splashscreen support or the bmp command.
1882 - Run length encoded BMP image (RLE8) support: CONFIG_VIDEO_BMP_RLE8
1884 If this option is set, 8-bit RLE compressed BMP images
1885 can be displayed via the splashscreen support or the
1888 - Do compresssing for memory range:
1891 If this option is set, it would use zlib deflate method
1892 to compress the specified memory at its best effort.
1894 - Compression support:
1897 Enabled by default to support gzip compressed images.
1901 If this option is set, support for bzip2 compressed
1902 images is included. If not, only uncompressed and gzip
1903 compressed images are supported.
1905 NOTE: the bzip2 algorithm requires a lot of RAM, so
1906 the malloc area (as defined by CONFIG_SYS_MALLOC_LEN) should
1911 If this option is set, support for lzma compressed
1914 Note: The LZMA algorithm adds between 2 and 4KB of code and it
1915 requires an amount of dynamic memory that is given by the
1918 (1846 + 768 << (lc + lp)) * sizeof(uint16)
1920 Where lc and lp stand for, respectively, Literal context bits
1921 and Literal pos bits.
1923 This value is upper-bounded by 14MB in the worst case. Anyway,
1924 for a ~4MB large kernel image, we have lc=3 and lp=0 for a
1925 total amount of (1846 + 768 << (3 + 0)) * 2 = ~41KB... that is
1926 a very small buffer.
1928 Use the lzmainfo tool to determinate the lc and lp values and
1929 then calculate the amount of needed dynamic memory (ensuring
1930 the appropriate CONFIG_SYS_MALLOC_LEN value).
1934 If this option is set, support for LZO compressed images
1940 The address of PHY on MII bus.
1942 CONFIG_PHY_CLOCK_FREQ (ppc4xx)
1944 The clock frequency of the MII bus
1948 If this option is set, support for speed/duplex
1949 detection of gigabit PHY is included.
1951 CONFIG_PHY_RESET_DELAY
1953 Some PHY like Intel LXT971A need extra delay after
1954 reset before any MII register access is possible.
1955 For such PHY, set this option to the usec delay
1956 required. (minimum 300usec for LXT971A)
1958 CONFIG_PHY_CMD_DELAY (ppc4xx)
1960 Some PHY like Intel LXT971A need extra delay after
1961 command issued before MII status register can be read
1971 Define a default value for Ethernet address to use
1972 for the respective Ethernet interface, in case this
1973 is not determined automatically.
1978 Define a default value for the IP address to use for
1979 the default Ethernet interface, in case this is not
1980 determined through e.g. bootp.
1981 (Environment variable "ipaddr")
1983 - Server IP address:
1986 Defines a default value for the IP address of a TFTP
1987 server to contact when using the "tftboot" command.
1988 (Environment variable "serverip")
1990 CONFIG_KEEP_SERVERADDR
1992 Keeps the server's MAC address, in the env 'serveraddr'
1993 for passing to bootargs (like Linux's netconsole option)
1995 - Gateway IP address:
1998 Defines a default value for the IP address of the
1999 default router where packets to other networks are
2001 (Environment variable "gatewayip")
2006 Defines a default value for the subnet mask (or
2007 routing prefix) which is used to determine if an IP
2008 address belongs to the local subnet or needs to be
2009 forwarded through a router.
2010 (Environment variable "netmask")
2012 - Multicast TFTP Mode:
2015 Defines whether you want to support multicast TFTP as per
2016 rfc-2090; for example to work with atftp. Lets lots of targets
2017 tftp down the same boot image concurrently. Note: the Ethernet
2018 driver in use must provide a function: mcast() to join/leave a
2021 - BOOTP Recovery Mode:
2022 CONFIG_BOOTP_RANDOM_DELAY
2024 If you have many targets in a network that try to
2025 boot using BOOTP, you may want to avoid that all
2026 systems send out BOOTP requests at precisely the same
2027 moment (which would happen for instance at recovery
2028 from a power failure, when all systems will try to
2029 boot, thus flooding the BOOTP server. Defining
2030 CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be
2031 inserted before sending out BOOTP requests. The
2032 following delays are inserted then:
2034 1st BOOTP request: delay 0 ... 1 sec
2035 2nd BOOTP request: delay 0 ... 2 sec
2036 3rd BOOTP request: delay 0 ... 4 sec
2038 BOOTP requests: delay 0 ... 8 sec
2040 CONFIG_BOOTP_ID_CACHE_SIZE
2042 BOOTP packets are uniquely identified using a 32-bit ID. The
2043 server will copy the ID from client requests to responses and
2044 U-Boot will use this to determine if it is the destination of
2045 an incoming response. Some servers will check that addresses
2046 aren't in use before handing them out (usually using an ARP
2047 ping) and therefore take up to a few hundred milliseconds to
2048 respond. Network congestion may also influence the time it
2049 takes for a response to make it back to the client. If that
2050 time is too long, U-Boot will retransmit requests. In order
2051 to allow earlier responses to still be accepted after these
2052 retransmissions, U-Boot's BOOTP client keeps a small cache of
2053 IDs. The CONFIG_BOOTP_ID_CACHE_SIZE controls the size of this
2054 cache. The default is to keep IDs for up to four outstanding
2055 requests. Increasing this will allow U-Boot to accept offers
2056 from a BOOTP client in networks with unusually high latency.
2058 - DHCP Advanced Options:
2059 You can fine tune the DHCP functionality by defining
2060 CONFIG_BOOTP_* symbols:
2062 CONFIG_BOOTP_SUBNETMASK
2063 CONFIG_BOOTP_GATEWAY
2064 CONFIG_BOOTP_HOSTNAME
2065 CONFIG_BOOTP_NISDOMAIN
2066 CONFIG_BOOTP_BOOTPATH
2067 CONFIG_BOOTP_BOOTFILESIZE
2070 CONFIG_BOOTP_SEND_HOSTNAME
2071 CONFIG_BOOTP_NTPSERVER
2072 CONFIG_BOOTP_TIMEOFFSET
2073 CONFIG_BOOTP_VENDOREX
2074 CONFIG_BOOTP_MAY_FAIL
2076 CONFIG_BOOTP_SERVERIP - TFTP server will be the serverip
2077 environment variable, not the BOOTP server.
2079 CONFIG_BOOTP_MAY_FAIL - If the DHCP server is not found
2080 after the configured retry count, the call will fail
2081 instead of starting over. This can be used to fail over
2082 to Link-local IP address configuration if the DHCP server
2085 CONFIG_BOOTP_DNS2 - If a DHCP client requests the DNS
2086 serverip from a DHCP server, it is possible that more
2087 than one DNS serverip is offered to the client.
2088 If CONFIG_BOOTP_DNS2 is enabled, the secondary DNS
2089 serverip will be stored in the additional environment
2090 variable "dnsip2". The first DNS serverip is always
2091 stored in the variable "dnsip", when CONFIG_BOOTP_DNS
2094 CONFIG_BOOTP_SEND_HOSTNAME - Some DHCP servers are capable
2095 to do a dynamic update of a DNS server. To do this, they
2096 need the hostname of the DHCP requester.
2097 If CONFIG_BOOTP_SEND_HOSTNAME is defined, the content
2098 of the "hostname" environment variable is passed as
2099 option 12 to the DHCP server.
2101 CONFIG_BOOTP_DHCP_REQUEST_DELAY
2103 A 32bit value in microseconds for a delay between
2104 receiving a "DHCP Offer" and sending the "DHCP Request".
2105 This fixes a problem with certain DHCP servers that don't
2106 respond 100% of the time to a "DHCP request". E.g. On an
2107 AT91RM9200 processor running at 180MHz, this delay needed
2108 to be *at least* 15,000 usec before a Windows Server 2003
2109 DHCP server would reply 100% of the time. I recommend at
2110 least 50,000 usec to be safe. The alternative is to hope
2111 that one of the retries will be successful but note that
2112 the DHCP timeout and retry process takes a longer than
2115 - Link-local IP address negotiation:
2116 Negotiate with other link-local clients on the local network
2117 for an address that doesn't require explicit configuration.
2118 This is especially useful if a DHCP server cannot be guaranteed
2119 to exist in all environments that the device must operate.
2121 See doc/README.link-local for more information.
2124 CONFIG_CDP_DEVICE_ID
2126 The device id used in CDP trigger frames.
2128 CONFIG_CDP_DEVICE_ID_PREFIX
2130 A two character string which is prefixed to the MAC address
2135 A printf format string which contains the ascii name of
2136 the port. Normally is set to "eth%d" which sets
2137 eth0 for the first Ethernet, eth1 for the second etc.
2139 CONFIG_CDP_CAPABILITIES
2141 A 32bit integer which indicates the device capabilities;
2142 0x00000010 for a normal host which does not forwards.
2146 An ascii string containing the version of the software.
2150 An ascii string containing the name of the platform.
2154 A 32bit integer sent on the trigger.
2156 CONFIG_CDP_POWER_CONSUMPTION
2158 A 16bit integer containing the power consumption of the
2159 device in .1 of milliwatts.
2161 CONFIG_CDP_APPLIANCE_VLAN_TYPE
2163 A byte containing the id of the VLAN.
2165 - Status LED: CONFIG_STATUS_LED
2167 Several configurations allow to display the current
2168 status using a LED. For instance, the LED will blink
2169 fast while running U-Boot code, stop blinking as
2170 soon as a reply to a BOOTP request was received, and
2171 start blinking slow once the Linux kernel is running
2172 (supported by a status LED driver in the Linux
2173 kernel). Defining CONFIG_STATUS_LED enables this
2179 The status LED can be connected to a GPIO pin.
2180 In such cases, the gpio_led driver can be used as a
2181 status LED backend implementation. Define CONFIG_GPIO_LED
2182 to include the gpio_led driver in the U-Boot binary.
2184 CONFIG_GPIO_LED_INVERTED_TABLE
2185 Some GPIO connected LEDs may have inverted polarity in which
2186 case the GPIO high value corresponds to LED off state and
2187 GPIO low value corresponds to LED on state.
2188 In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined
2189 with a list of GPIO LEDs that have inverted polarity.
2191 - CAN Support: CONFIG_CAN_DRIVER
2193 Defining CONFIG_CAN_DRIVER enables CAN driver support
2194 on those systems that support this (optional)
2195 feature, like the TQM8xxL modules.
2197 - I2C Support: CONFIG_SYS_I2C
2199 This enable the NEW i2c subsystem, and will allow you to use
2200 i2c commands at the u-boot command line (as long as you set
2201 CONFIG_CMD_I2C in CONFIG_COMMANDS) and communicate with i2c
2202 based realtime clock chips or other i2c devices. See
2203 common/cmd_i2c.c for a description of the command line
2206 ported i2c driver to the new framework:
2207 - drivers/i2c/soft_i2c.c:
2208 - activate first bus with CONFIG_SYS_I2C_SOFT define
2209 CONFIG_SYS_I2C_SOFT_SPEED and CONFIG_SYS_I2C_SOFT_SLAVE
2210 for defining speed and slave address
2211 - activate second bus with I2C_SOFT_DECLARATIONS2 define
2212 CONFIG_SYS_I2C_SOFT_SPEED_2 and CONFIG_SYS_I2C_SOFT_SLAVE_2
2213 for defining speed and slave address
2214 - activate third bus with I2C_SOFT_DECLARATIONS3 define
2215 CONFIG_SYS_I2C_SOFT_SPEED_3 and CONFIG_SYS_I2C_SOFT_SLAVE_3
2216 for defining speed and slave address
2217 - activate fourth bus with I2C_SOFT_DECLARATIONS4 define
2218 CONFIG_SYS_I2C_SOFT_SPEED_4 and CONFIG_SYS_I2C_SOFT_SLAVE_4
2219 for defining speed and slave address
2221 - drivers/i2c/fsl_i2c.c:
2222 - activate i2c driver with CONFIG_SYS_I2C_FSL
2223 define CONFIG_SYS_FSL_I2C_OFFSET for setting the register
2224 offset CONFIG_SYS_FSL_I2C_SPEED for the i2c speed and
2225 CONFIG_SYS_FSL_I2C_SLAVE for the slave addr of the first
2227 - If your board supports a second fsl i2c bus, define
2228 CONFIG_SYS_FSL_I2C2_OFFSET for the register offset
2229 CONFIG_SYS_FSL_I2C2_SPEED for the speed and
2230 CONFIG_SYS_FSL_I2C2_SLAVE for the slave address of the
2233 - drivers/i2c/tegra_i2c.c:
2234 - activate this driver with CONFIG_SYS_I2C_TEGRA
2235 - This driver adds 4 i2c buses with a fix speed from
2236 100000 and the slave addr 0!
2238 - drivers/i2c/ppc4xx_i2c.c
2239 - activate this driver with CONFIG_SYS_I2C_PPC4XX
2240 - CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0
2241 - CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1
2243 - drivers/i2c/i2c_mxc.c
2244 - activate this driver with CONFIG_SYS_I2C_MXC
2245 - define speed for bus 1 with CONFIG_SYS_MXC_I2C1_SPEED
2246 - define slave for bus 1 with CONFIG_SYS_MXC_I2C1_SLAVE
2247 - define speed for bus 2 with CONFIG_SYS_MXC_I2C2_SPEED
2248 - define slave for bus 2 with CONFIG_SYS_MXC_I2C2_SLAVE
2249 - define speed for bus 3 with CONFIG_SYS_MXC_I2C3_SPEED
2250 - define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE
2251 If thoses defines are not set, default value is 100000
2252 for speed, and 0 for slave.
2254 - drivers/i2c/rcar_i2c.c:
2255 - activate this driver with CONFIG_SYS_I2C_RCAR
2256 - This driver adds 4 i2c buses
2258 - CONFIG_SYS_RCAR_I2C0_BASE for setting the register channel 0
2259 - CONFIG_SYS_RCAR_I2C0_SPEED for for the speed channel 0
2260 - CONFIG_SYS_RCAR_I2C1_BASE for setting the register channel 1
2261 - CONFIG_SYS_RCAR_I2C1_SPEED for for the speed channel 1
2262 - CONFIG_SYS_RCAR_I2C2_BASE for setting the register channel 2
2263 - CONFIG_SYS_RCAR_I2C2_SPEED for for the speed channel 2
2264 - CONFIG_SYS_RCAR_I2C3_BASE for setting the register channel 3
2265 - CONFIG_SYS_RCAR_I2C3_SPEED for for the speed channel 3
2266 - CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS for number of i2c buses
2268 - drivers/i2c/sh_i2c.c:
2269 - activate this driver with CONFIG_SYS_I2C_SH
2270 - This driver adds from 2 to 5 i2c buses
2272 - CONFIG_SYS_I2C_SH_BASE0 for setting the register channel 0
2273 - CONFIG_SYS_I2C_SH_SPEED0 for for the speed channel 0
2274 - CONFIG_SYS_I2C_SH_BASE1 for setting the register channel 1
2275 - CONFIG_SYS_I2C_SH_SPEED1 for for the speed channel 1
2276 - CONFIG_SYS_I2C_SH_BASE2 for setting the register channel 2
2277 - CONFIG_SYS_I2C_SH_SPEED2 for for the speed channel 2
2278 - CONFIG_SYS_I2C_SH_BASE3 for setting the register channel 3
2279 - CONFIG_SYS_I2C_SH_SPEED3 for for the speed channel 3
2280 - CONFIG_SYS_I2C_SH_BASE4 for setting the register channel 4
2281 - CONFIG_SYS_I2C_SH_SPEED4 for for the speed channel 4
2282 - CONFIG_SYS_I2C_SH_BASE5 for setting the register channel 5
2283 - CONFIG_SYS_I2C_SH_SPEED5 for for the speed channel 5
2284 - CONFIF_SYS_I2C_SH_NUM_CONTROLLERS for nummber of i2c buses
2286 - drivers/i2c/omap24xx_i2c.c
2287 - activate this driver with CONFIG_SYS_I2C_OMAP24XX
2288 - CONFIG_SYS_OMAP24_I2C_SPEED speed channel 0
2289 - CONFIG_SYS_OMAP24_I2C_SLAVE slave addr channel 0
2290 - CONFIG_SYS_OMAP24_I2C_SPEED1 speed channel 1
2291 - CONFIG_SYS_OMAP24_I2C_SLAVE1 slave addr channel 1
2292 - CONFIG_SYS_OMAP24_I2C_SPEED2 speed channel 2
2293 - CONFIG_SYS_OMAP24_I2C_SLAVE2 slave addr channel 2
2294 - CONFIG_SYS_OMAP24_I2C_SPEED3 speed channel 3
2295 - CONFIG_SYS_OMAP24_I2C_SLAVE3 slave addr channel 3
2296 - CONFIG_SYS_OMAP24_I2C_SPEED4 speed channel 4
2297 - CONFIG_SYS_OMAP24_I2C_SLAVE4 slave addr channel 4
2299 - drivers/i2c/zynq_i2c.c
2300 - activate this driver with CONFIG_SYS_I2C_ZYNQ
2301 - set CONFIG_SYS_I2C_ZYNQ_SPEED for speed setting
2302 - set CONFIG_SYS_I2C_ZYNQ_SLAVE for slave addr
2304 - drivers/i2c/s3c24x0_i2c.c:
2305 - activate this driver with CONFIG_SYS_I2C_S3C24X0
2306 - This driver adds i2c buses (11 for Exynos5250, Exynos5420
2307 9 i2c buses for Exynos4 and 1 for S3C24X0 SoCs from Samsung)
2308 with a fix speed from 100000 and the slave addr 0!
2310 - drivers/i2c/ihs_i2c.c
2311 - activate this driver with CONFIG_SYS_I2C_IHS
2312 - CONFIG_SYS_I2C_IHS_CH0 activate hardware channel 0
2313 - CONFIG_SYS_I2C_IHS_SPEED_0 speed channel 0
2314 - CONFIG_SYS_I2C_IHS_SLAVE_0 slave addr channel 0
2315 - CONFIG_SYS_I2C_IHS_CH1 activate hardware channel 1
2316 - CONFIG_SYS_I2C_IHS_SPEED_1 speed channel 1
2317 - CONFIG_SYS_I2C_IHS_SLAVE_1 slave addr channel 1
2318 - CONFIG_SYS_I2C_IHS_CH2 activate hardware channel 2
2319 - CONFIG_SYS_I2C_IHS_SPEED_2 speed channel 2
2320 - CONFIG_SYS_I2C_IHS_SLAVE_2 slave addr channel 2
2321 - CONFIG_SYS_I2C_IHS_CH3 activate hardware channel 3
2322 - CONFIG_SYS_I2C_IHS_SPEED_3 speed channel 3
2323 - CONFIG_SYS_I2C_IHS_SLAVE_3 slave addr channel 3
2327 CONFIG_SYS_NUM_I2C_BUSES
2328 Hold the number of i2c busses you want to use. If you
2329 don't use/have i2c muxes on your i2c bus, this
2330 is equal to CONFIG_SYS_NUM_I2C_ADAPTERS, and you can
2333 CONFIG_SYS_I2C_DIRECT_BUS
2334 define this, if you don't use i2c muxes on your hardware.
2335 if CONFIG_SYS_I2C_MAX_HOPS is not defined or == 0 you can
2338 CONFIG_SYS_I2C_MAX_HOPS
2339 define how many muxes are maximal consecutively connected
2340 on one i2c bus. If you not use i2c muxes, omit this
2343 CONFIG_SYS_I2C_BUSES
2344 hold a list of busses you want to use, only used if
2345 CONFIG_SYS_I2C_DIRECT_BUS is not defined, for example
2346 a board with CONFIG_SYS_I2C_MAX_HOPS = 1 and
2347 CONFIG_SYS_NUM_I2C_BUSES = 9:
2349 CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP}}, \
2350 {0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \
2351 {0, {{I2C_MUX_PCA9547, 0x70, 2}}}, \
2352 {0, {{I2C_MUX_PCA9547, 0x70, 3}}}, \
2353 {0, {{I2C_MUX_PCA9547, 0x70, 4}}}, \
2354 {0, {{I2C_MUX_PCA9547, 0x70, 5}}}, \
2355 {1, {I2C_NULL_HOP}}, \
2356 {1, {{I2C_MUX_PCA9544, 0x72, 1}}}, \
2357 {1, {{I2C_MUX_PCA9544, 0x72, 2}}}, \
2361 bus 0 on adapter 0 without a mux
2362 bus 1 on adapter 0 with a PCA9547 on address 0x70 port 1
2363 bus 2 on adapter 0 with a PCA9547 on address 0x70 port 2
2364 bus 3 on adapter 0 with a PCA9547 on address 0x70 port 3
2365 bus 4 on adapter 0 with a PCA9547 on address 0x70 port 4
2366 bus 5 on adapter 0 with a PCA9547 on address 0x70 port 5
2367 bus 6 on adapter 1 without a mux
2368 bus 7 on adapter 1 with a PCA9544 on address 0x72 port 1
2369 bus 8 on adapter 1 with a PCA9544 on address 0x72 port 2
2371 If you do not have i2c muxes on your board, omit this define.
2373 - Legacy I2C Support: CONFIG_HARD_I2C
2375 NOTE: It is intended to move drivers to CONFIG_SYS_I2C which
2376 provides the following compelling advantages:
2378 - more than one i2c adapter is usable
2379 - approved multibus support
2380 - better i2c mux support
2382 ** Please consider updating your I2C driver now. **
2384 These enable legacy I2C serial bus commands. Defining
2385 CONFIG_HARD_I2C will include the appropriate I2C driver
2386 for the selected CPU.
2388 This will allow you to use i2c commands at the u-boot
2389 command line (as long as you set CONFIG_CMD_I2C in
2390 CONFIG_COMMANDS) and communicate with i2c based realtime
2391 clock chips. See common/cmd_i2c.c for a description of the
2392 command line interface.
2394 CONFIG_HARD_I2C selects a hardware I2C controller.
2396 There are several other quantities that must also be
2397 defined when you define CONFIG_HARD_I2C.
2399 In both cases you will need to define CONFIG_SYS_I2C_SPEED
2400 to be the frequency (in Hz) at which you wish your i2c bus
2401 to run and CONFIG_SYS_I2C_SLAVE to be the address of this node (ie
2402 the CPU's i2c node address).
2404 Now, the u-boot i2c code for the mpc8xx
2405 (arch/powerpc/cpu/mpc8xx/i2c.c) sets the CPU up as a master node
2406 and so its address should therefore be cleared to 0 (See,
2407 eg, MPC823e User's Manual p.16-473). So, set
2408 CONFIG_SYS_I2C_SLAVE to 0.
2410 CONFIG_SYS_I2C_INIT_MPC5XXX
2412 When a board is reset during an i2c bus transfer
2413 chips might think that the current transfer is still
2414 in progress. Reset the slave devices by sending start
2415 commands until the slave device responds.
2417 That's all that's required for CONFIG_HARD_I2C.
2419 If you use the software i2c interface (CONFIG_SYS_I2C_SOFT)
2420 then the following macros need to be defined (examples are
2421 from include/configs/lwmon.h):
2425 (Optional). Any commands necessary to enable the I2C
2426 controller or configure ports.
2428 eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
2432 (Only for MPC8260 CPU). The I/O port to use (the code
2433 assumes both bits are on the same port). Valid values
2434 are 0..3 for ports A..D.
2438 The code necessary to make the I2C data line active
2439 (driven). If the data line is open collector, this
2442 eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
2446 The code necessary to make the I2C data line tri-stated
2447 (inactive). If the data line is open collector, this
2450 eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
2454 Code that returns true if the I2C data line is high,
2457 eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
2461 If <bit> is true, sets the I2C data line high. If it
2462 is false, it clears it (low).
2464 eg: #define I2C_SDA(bit) \
2465 if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
2466 else immr->im_cpm.cp_pbdat &= ~PB_SDA
2470 If <bit> is true, sets the I2C clock line high. If it
2471 is false, it clears it (low).
2473 eg: #define I2C_SCL(bit) \
2474 if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
2475 else immr->im_cpm.cp_pbdat &= ~PB_SCL
2479 This delay is invoked four times per clock cycle so this
2480 controls the rate of data transfer. The data rate thus
2481 is 1 / (I2C_DELAY * 4). Often defined to be something
2484 #define I2C_DELAY udelay(2)
2486 CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA
2488 If your arch supports the generic GPIO framework (asm/gpio.h),
2489 then you may alternatively define the two GPIOs that are to be
2490 used as SCL / SDA. Any of the previous I2C_xxx macros will
2491 have GPIO-based defaults assigned to them as appropriate.
2493 You should define these to the GPIO value as given directly to
2494 the generic GPIO functions.
2496 CONFIG_SYS_I2C_INIT_BOARD
2498 When a board is reset during an i2c bus transfer
2499 chips might think that the current transfer is still
2500 in progress. On some boards it is possible to access
2501 the i2c SCLK line directly, either by using the
2502 processor pin as a GPIO or by having a second pin
2503 connected to the bus. If this option is defined a
2504 custom i2c_init_board() routine in boards/xxx/board.c
2505 is run early in the boot sequence.
2507 CONFIG_SYS_I2C_BOARD_LATE_INIT
2509 An alternative to CONFIG_SYS_I2C_INIT_BOARD. If this option is
2510 defined a custom i2c_board_late_init() routine in
2511 boards/xxx/board.c is run AFTER the operations in i2c_init()
2512 is completed. This callpoint can be used to unreset i2c bus
2513 using CPU i2c controller register accesses for CPUs whose i2c
2514 controller provide such a method. It is called at the end of
2515 i2c_init() to allow i2c_init operations to setup the i2c bus
2516 controller on the CPU (e.g. setting bus speed & slave address).
2518 CONFIG_I2CFAST (PPC405GP|PPC405EP only)
2520 This option enables configuration of bi_iic_fast[] flags
2521 in u-boot bd_info structure based on u-boot environment
2522 variable "i2cfast". (see also i2cfast)
2524 CONFIG_I2C_MULTI_BUS
2526 This option allows the use of multiple I2C buses, each of which
2527 must have a controller. At any point in time, only one bus is
2528 active. To switch to a different bus, use the 'i2c dev' command.
2529 Note that bus numbering is zero-based.
2531 CONFIG_SYS_I2C_NOPROBES
2533 This option specifies a list of I2C devices that will be skipped
2534 when the 'i2c probe' command is issued. If CONFIG_I2C_MULTI_BUS
2535 is set, specify a list of bus-device pairs. Otherwise, specify
2536 a 1D array of device addresses
2539 #undef CONFIG_I2C_MULTI_BUS
2540 #define CONFIG_SYS_I2C_NOPROBES {0x50,0x68}
2542 will skip addresses 0x50 and 0x68 on a board with one I2C bus
2544 #define CONFIG_I2C_MULTI_BUS
2545 #define CONFIG_SYS_I2C_MULTI_NOPROBES {{0,0x50},{0,0x68},{1,0x54}}
2547 will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1
2549 CONFIG_SYS_SPD_BUS_NUM
2551 If defined, then this indicates the I2C bus number for DDR SPD.
2552 If not defined, then U-Boot assumes that SPD is on I2C bus 0.
2554 CONFIG_SYS_RTC_BUS_NUM
2556 If defined, then this indicates the I2C bus number for the RTC.
2557 If not defined, then U-Boot assumes that RTC is on I2C bus 0.
2559 CONFIG_SYS_DTT_BUS_NUM
2561 If defined, then this indicates the I2C bus number for the DTT.
2562 If not defined, then U-Boot assumes that DTT is on I2C bus 0.
2564 CONFIG_SYS_I2C_DTT_ADDR:
2566 If defined, specifies the I2C address of the DTT device.
2567 If not defined, then U-Boot uses predefined value for
2568 specified DTT device.
2570 CONFIG_SOFT_I2C_READ_REPEATED_START
2572 defining this will force the i2c_read() function in
2573 the soft_i2c driver to perform an I2C repeated start
2574 between writing the address pointer and reading the
2575 data. If this define is omitted the default behaviour
2576 of doing a stop-start sequence will be used. Most I2C
2577 devices can use either method, but some require one or
2580 - SPI Support: CONFIG_SPI
2582 Enables SPI driver (so far only tested with
2583 SPI EEPROM, also an instance works with Crystal A/D and
2584 D/As on the SACSng board)
2588 Enables the driver for SPI controller on SuperH. Currently
2589 only SH7757 is supported.
2593 Enables extended (16-bit) SPI EEPROM addressing.
2594 (symmetrical to CONFIG_I2C_X)
2598 Enables a software (bit-bang) SPI driver rather than
2599 using hardware support. This is a general purpose
2600 driver that only requires three general I/O port pins
2601 (two outputs, one input) to function. If this is
2602 defined, the board configuration must define several
2603 SPI configuration items (port pins to use, etc). For
2604 an example, see include/configs/sacsng.h.
2608 Enables a hardware SPI driver for general-purpose reads
2609 and writes. As with CONFIG_SOFT_SPI, the board configuration
2610 must define a list of chip-select function pointers.
2611 Currently supported on some MPC8xxx processors. For an
2612 example, see include/configs/mpc8349emds.h.
2616 Enables the driver for the SPI controllers on i.MX and MXC
2617 SoCs. Currently i.MX31/35/51 are supported.
2619 CONFIG_SYS_SPI_MXC_WAIT
2620 Timeout for waiting until spi transfer completed.
2621 default: (CONFIG_SYS_HZ/100) /* 10 ms */
2623 - FPGA Support: CONFIG_FPGA
2625 Enables FPGA subsystem.
2627 CONFIG_FPGA_<vendor>
2629 Enables support for specific chip vendors.
2632 CONFIG_FPGA_<family>
2634 Enables support for FPGA family.
2635 (SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX)
2639 Specify the number of FPGA devices to support.
2641 CONFIG_CMD_FPGA_LOADMK
2643 Enable support for fpga loadmk command
2645 CONFIG_CMD_FPGA_LOADP
2647 Enable support for fpga loadp command - load partial bitstream
2649 CONFIG_CMD_FPGA_LOADBP
2651 Enable support for fpga loadbp command - load partial bitstream
2654 CONFIG_SYS_FPGA_PROG_FEEDBACK
2656 Enable printing of hash marks during FPGA configuration.
2658 CONFIG_SYS_FPGA_CHECK_BUSY
2660 Enable checks on FPGA configuration interface busy
2661 status by the configuration function. This option
2662 will require a board or device specific function to
2667 If defined, a function that provides delays in the FPGA
2668 configuration driver.
2670 CONFIG_SYS_FPGA_CHECK_CTRLC
2671 Allow Control-C to interrupt FPGA configuration
2673 CONFIG_SYS_FPGA_CHECK_ERROR
2675 Check for configuration errors during FPGA bitfile
2676 loading. For example, abort during Virtex II
2677 configuration if the INIT_B line goes low (which
2678 indicated a CRC error).
2680 CONFIG_SYS_FPGA_WAIT_INIT
2682 Maximum time to wait for the INIT_B line to deassert
2683 after PROB_B has been deasserted during a Virtex II
2684 FPGA configuration sequence. The default time is 500
2687 CONFIG_SYS_FPGA_WAIT_BUSY
2689 Maximum time to wait for BUSY to deassert during
2690 Virtex II FPGA configuration. The default is 5 ms.
2692 CONFIG_SYS_FPGA_WAIT_CONFIG
2694 Time to wait after FPGA configuration. The default is
2697 - Configuration Management:
2700 If defined, this string will be added to the U-Boot
2701 version information (U_BOOT_VERSION)
2703 - Vendor Parameter Protection:
2705 U-Boot considers the values of the environment
2706 variables "serial#" (Board Serial Number) and
2707 "ethaddr" (Ethernet Address) to be parameters that
2708 are set once by the board vendor / manufacturer, and
2709 protects these variables from casual modification by
2710 the user. Once set, these variables are read-only,
2711 and write or delete attempts are rejected. You can
2712 change this behaviour:
2714 If CONFIG_ENV_OVERWRITE is #defined in your config
2715 file, the write protection for vendor parameters is
2716 completely disabled. Anybody can change or delete
2719 Alternatively, if you #define _both_ CONFIG_ETHADDR
2720 _and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default
2721 Ethernet address is installed in the environment,
2722 which can be changed exactly ONCE by the user. [The
2723 serial# is unaffected by this, i. e. it remains
2726 The same can be accomplished in a more flexible way
2727 for any variable by configuring the type of access
2728 to allow for those variables in the ".flags" variable
2729 or define CONFIG_ENV_FLAGS_LIST_STATIC.
2734 Define this variable to enable the reservation of
2735 "protected RAM", i. e. RAM which is not overwritten
2736 by U-Boot. Define CONFIG_PRAM to hold the number of
2737 kB you want to reserve for pRAM. You can overwrite
2738 this default value by defining an environment
2739 variable "pram" to the number of kB you want to
2740 reserve. Note that the board info structure will
2741 still show the full amount of RAM. If pRAM is
2742 reserved, a new environment variable "mem" will
2743 automatically be defined to hold the amount of
2744 remaining RAM in a form that can be passed as boot
2745 argument to Linux, for instance like that:
2747 setenv bootargs ... mem=\${mem}
2750 This way you can tell Linux not to use this memory,
2751 either, which results in a memory region that will
2752 not be affected by reboots.
2754 *WARNING* If your board configuration uses automatic
2755 detection of the RAM size, you must make sure that
2756 this memory test is non-destructive. So far, the
2757 following board configurations are known to be
2760 IVMS8, IVML24, SPD8xx, TQM8xxL,
2761 HERMES, IP860, RPXlite, LWMON,
2764 - Access to physical memory region (> 4GB)
2765 Some basic support is provided for operations on memory not
2766 normally accessible to U-Boot - e.g. some architectures
2767 support access to more than 4GB of memory on 32-bit
2768 machines using physical address extension or similar.
2769 Define CONFIG_PHYSMEM to access this basic support, which
2770 currently only supports clearing the memory.
2775 Define this variable to stop the system in case of a
2776 fatal error, so that you have to reset it manually.
2777 This is probably NOT a good idea for an embedded
2778 system where you want the system to reboot
2779 automatically as fast as possible, but it may be
2780 useful during development since you can try to debug
2781 the conditions that lead to the situation.
2783 CONFIG_NET_RETRY_COUNT
2785 This variable defines the number of retries for
2786 network operations like ARP, RARP, TFTP, or BOOTP
2787 before giving up the operation. If not defined, a
2788 default value of 5 is used.
2792 Timeout waiting for an ARP reply in milliseconds.
2796 Timeout in milliseconds used in NFS protocol.
2797 If you encounter "ERROR: Cannot umount" in nfs command,
2798 try longer timeout such as
2799 #define CONFIG_NFS_TIMEOUT 10000UL
2801 - Command Interpreter:
2802 CONFIG_AUTO_COMPLETE
2804 Enable auto completion of commands using TAB.
2806 Note that this feature has NOT been implemented yet
2807 for the "hush" shell.
2810 CONFIG_SYS_HUSH_PARSER
2812 Define this variable to enable the "hush" shell (from
2813 Busybox) as command line interpreter, thus enabling
2814 powerful command line syntax like
2815 if...then...else...fi conditionals or `&&' and '||'
2816 constructs ("shell scripts").
2818 If undefined, you get the old, much simpler behaviour
2819 with a somewhat smaller memory footprint.
2822 CONFIG_SYS_PROMPT_HUSH_PS2
2824 This defines the secondary prompt string, which is
2825 printed when the command interpreter needs more input
2826 to complete a command. Usually "> ".
2830 In the current implementation, the local variables
2831 space and global environment variables space are
2832 separated. Local variables are those you define by
2833 simply typing `name=value'. To access a local
2834 variable later on, you have write `$name' or
2835 `${name}'; to execute the contents of a variable
2836 directly type `$name' at the command prompt.
2838 Global environment variables are those you use
2839 setenv/printenv to work with. To run a command stored
2840 in such a variable, you need to use the run command,
2841 and you must not use the '$' sign to access them.
2843 To store commands and special characters in a
2844 variable, please use double quotation marks
2845 surrounding the whole text of the variable, instead
2846 of the backslashes before semicolons and special
2849 - Commandline Editing and History:
2850 CONFIG_CMDLINE_EDITING
2852 Enable editing and History functions for interactive
2853 commandline input operations
2855 - Default Environment:
2856 CONFIG_EXTRA_ENV_SETTINGS
2858 Define this to contain any number of null terminated
2859 strings (variable = value pairs) that will be part of
2860 the default environment compiled into the boot image.
2862 For example, place something like this in your
2863 board's config file:
2865 #define CONFIG_EXTRA_ENV_SETTINGS \
2869 Warning: This method is based on knowledge about the
2870 internal format how the environment is stored by the
2871 U-Boot code. This is NOT an official, exported
2872 interface! Although it is unlikely that this format
2873 will change soon, there is no guarantee either.
2874 You better know what you are doing here.
2876 Note: overly (ab)use of the default environment is
2877 discouraged. Make sure to check other ways to preset
2878 the environment like the "source" command or the
2881 CONFIG_ENV_VARS_UBOOT_CONFIG
2883 Define this in order to add variables describing the
2884 U-Boot build configuration to the default environment.
2885 These will be named arch, cpu, board, vendor, and soc.
2887 Enabling this option will cause the following to be defined:
2895 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
2897 Define this in order to add variables describing certain
2898 run-time determined information about the hardware to the
2899 environment. These will be named board_name, board_rev.
2901 CONFIG_DELAY_ENVIRONMENT
2903 Normally the environment is loaded when the board is
2904 intialised so that it is available to U-Boot. This inhibits
2905 that so that the environment is not available until
2906 explicitly loaded later by U-Boot code. With CONFIG_OF_CONTROL
2907 this is instead controlled by the value of
2908 /config/load-environment.
2910 - DataFlash Support:
2911 CONFIG_HAS_DATAFLASH
2913 Defining this option enables DataFlash features and
2914 allows to read/write in Dataflash via the standard
2917 - Serial Flash support
2920 Defining this option enables SPI flash commands
2921 'sf probe/read/write/erase/update'.
2923 Usage requires an initial 'probe' to define the serial
2924 flash parameters, followed by read/write/erase/update
2927 The following defaults may be provided by the platform
2928 to handle the common case when only a single serial
2929 flash is present on the system.
2931 CONFIG_SF_DEFAULT_BUS Bus identifier
2932 CONFIG_SF_DEFAULT_CS Chip-select
2933 CONFIG_SF_DEFAULT_MODE (see include/spi.h)
2934 CONFIG_SF_DEFAULT_SPEED in Hz
2938 Define this option to include a destructive SPI flash
2941 CONFIG_SPI_FLASH_BAR Ban/Extended Addr Reg
2943 Define this option to use the Bank addr/Extended addr
2944 support on SPI flashes which has size > 16Mbytes.
2946 CONFIG_SF_DUAL_FLASH Dual flash memories
2948 Define this option to use dual flash support where two flash
2949 memories can be connected with a given cs line.
2950 currently Xilinx Zynq qspi support these type of connections.
2952 - SystemACE Support:
2955 Adding this option adds support for Xilinx SystemACE
2956 chips attached via some sort of local bus. The address
2957 of the chip must also be defined in the
2958 CONFIG_SYS_SYSTEMACE_BASE macro. For example:
2960 #define CONFIG_SYSTEMACE
2961 #define CONFIG_SYS_SYSTEMACE_BASE 0xf0000000
2963 When SystemACE support is added, the "ace" device type
2964 becomes available to the fat commands, i.e. fatls.
2966 - TFTP Fixed UDP Port:
2969 If this is defined, the environment variable tftpsrcp
2970 is used to supply the TFTP UDP source port value.
2971 If tftpsrcp isn't defined, the normal pseudo-random port
2972 number generator is used.
2974 Also, the environment variable tftpdstp is used to supply
2975 the TFTP UDP destination port value. If tftpdstp isn't
2976 defined, the normal port 69 is used.
2978 The purpose for tftpsrcp is to allow a TFTP server to
2979 blindly start the TFTP transfer using the pre-configured
2980 target IP address and UDP port. This has the effect of
2981 "punching through" the (Windows XP) firewall, allowing
2982 the remainder of the TFTP transfer to proceed normally.
2983 A better solution is to properly configure the firewall,
2984 but sometimes that is not allowed.
2989 This enables a generic 'hash' command which can produce
2990 hashes / digests from a few algorithms (e.g. SHA1, SHA256).
2994 Enable the hash verify command (hash -v). This adds to code
2997 CONFIG_SHA1 - support SHA1 hashing
2998 CONFIG_SHA256 - support SHA256 hashing
3000 Note: There is also a sha1sum command, which should perhaps
3001 be deprecated in favour of 'hash sha1'.
3003 - Freescale i.MX specific commands:
3004 CONFIG_CMD_HDMIDETECT
3005 This enables 'hdmidet' command which returns true if an
3006 HDMI monitor is detected. This command is i.MX 6 specific.
3009 This enables the 'bmode' (bootmode) command for forcing
3010 a boot from specific media.
3012 This is useful for forcing the ROM's usb downloader to
3013 activate upon a watchdog reset which is nice when iterating
3014 on U-Boot. Using the reset button or running bmode normal
3015 will set it back to normal. This command currently
3016 supports i.MX53 and i.MX6.
3021 This enables the RSA algorithm used for FIT image verification
3022 in U-Boot. See doc/uImage.FIT/signature.txt for more information.
3024 The signing part is build into mkimage regardless of this
3027 - bootcount support:
3028 CONFIG_BOOTCOUNT_LIMIT
3030 This enables the bootcounter support, see:
3031 http://www.denx.de/wiki/DULG/UBootBootCountLimit
3034 enable special bootcounter support on at91sam9xe based boards.
3036 enable special bootcounter support on blackfin based boards.
3038 enable special bootcounter support on da850 based boards.
3039 CONFIG_BOOTCOUNT_RAM
3040 enable support for the bootcounter in RAM
3041 CONFIG_BOOTCOUNT_I2C
3042 enable support for the bootcounter on an i2c (like RTC) device.
3043 CONFIG_SYS_I2C_RTC_ADDR = i2c chip address
3044 CONFIG_SYS_BOOTCOUNT_ADDR = i2c addr which is used for
3046 CONFIG_BOOTCOUNT_ALEN = address len
3048 - Show boot progress:
3049 CONFIG_SHOW_BOOT_PROGRESS
3051 Defining this option allows to add some board-
3052 specific code (calling a user-provided function
3053 "show_boot_progress(int)") that enables you to show
3054 the system's boot progress on some display (for
3055 example, some LED's) on your board. At the moment,
3056 the following checkpoints are implemented:
3058 - Detailed boot stage timing
3060 Define this option to get detailed timing of each stage
3061 of the boot process.
3063 CONFIG_BOOTSTAGE_USER_COUNT
3064 This is the number of available user bootstage records.
3065 Each time you call bootstage_mark(BOOTSTAGE_ID_ALLOC, ...)
3066 a new ID will be allocated from this stash. If you exceed
3067 the limit, recording will stop.
3069 CONFIG_BOOTSTAGE_REPORT
3070 Define this to print a report before boot, similar to this:
3072 Timer summary in microseconds:
3075 3,575,678 3,575,678 board_init_f start
3076 3,575,695 17 arch_cpu_init A9
3077 3,575,777 82 arch_cpu_init done
3078 3,659,598 83,821 board_init_r start
3079 3,910,375 250,777 main_loop
3080 29,916,167 26,005,792 bootm_start
3081 30,361,327 445,160 start_kernel
3083 CONFIG_CMD_BOOTSTAGE
3084 Add a 'bootstage' command which supports printing a report
3085 and un/stashing of bootstage data.
3087 CONFIG_BOOTSTAGE_FDT
3088 Stash the bootstage information in the FDT. A root 'bootstage'
3089 node is created with each bootstage id as a child. Each child
3090 has a 'name' property and either 'mark' containing the
3091 mark time in microsecond, or 'accum' containing the
3092 accumulated time for that bootstage id in microseconds.
3097 name = "board_init_f";
3106 Code in the Linux kernel can find this in /proc/devicetree.
3108 Legacy uImage format:
3111 1 common/cmd_bootm.c before attempting to boot an image
3112 -1 common/cmd_bootm.c Image header has bad magic number
3113 2 common/cmd_bootm.c Image header has correct magic number
3114 -2 common/cmd_bootm.c Image header has bad checksum
3115 3 common/cmd_bootm.c Image header has correct checksum
3116 -3 common/cmd_bootm.c Image data has bad checksum
3117 4 common/cmd_bootm.c Image data has correct checksum
3118 -4 common/cmd_bootm.c Image is for unsupported architecture
3119 5 common/cmd_bootm.c Architecture check OK
3120 -5 common/cmd_bootm.c Wrong Image Type (not kernel, multi)
3121 6 common/cmd_bootm.c Image Type check OK
3122 -6 common/cmd_bootm.c gunzip uncompression error
3123 -7 common/cmd_bootm.c Unimplemented compression type
3124 7 common/cmd_bootm.c Uncompression OK
3125 8 common/cmd_bootm.c No uncompress/copy overwrite error
3126 -9 common/cmd_bootm.c Unsupported OS (not Linux, BSD, VxWorks, QNX)
3128 9 common/image.c Start initial ramdisk verification
3129 -10 common/image.c Ramdisk header has bad magic number
3130 -11 common/image.c Ramdisk header has bad checksum
3131 10 common/image.c Ramdisk header is OK
3132 -12 common/image.c Ramdisk data has bad checksum
3133 11 common/image.c Ramdisk data has correct checksum
3134 12 common/image.c Ramdisk verification complete, start loading
3135 -13 common/image.c Wrong Image Type (not PPC Linux ramdisk)
3136 13 common/image.c Start multifile image verification
3137 14 common/image.c No initial ramdisk, no multifile, continue.
3139 15 arch/<arch>/lib/bootm.c All preparation done, transferring control to OS
3141 -30 arch/powerpc/lib/board.c Fatal error, hang the system
3142 -31 post/post.c POST test failed, detected by post_output_backlog()
3143 -32 post/post.c POST test failed, detected by post_run_single()
3145 34 common/cmd_doc.c before loading a Image from a DOC device
3146 -35 common/cmd_doc.c Bad usage of "doc" command
3147 35 common/cmd_doc.c correct usage of "doc" command
3148 -36 common/cmd_doc.c No boot device
3149 36 common/cmd_doc.c correct boot device
3150 -37 common/cmd_doc.c Unknown Chip ID on boot device
3151 37 common/cmd_doc.c correct chip ID found, device available
3152 -38 common/cmd_doc.c Read Error on boot device
3153 38 common/cmd_doc.c reading Image header from DOC device OK
3154 -39 common/cmd_doc.c Image header has bad magic number
3155 39 common/cmd_doc.c Image header has correct magic number
3156 -40 common/cmd_doc.c Error reading Image from DOC device
3157 40 common/cmd_doc.c Image header has correct magic number
3158 41 common/cmd_ide.c before loading a Image from a IDE device
3159 -42 common/cmd_ide.c Bad usage of "ide" command
3160 42 common/cmd_ide.c correct usage of "ide" command
3161 -43 common/cmd_ide.c No boot device
3162 43 common/cmd_ide.c boot device found
3163 -44 common/cmd_ide.c Device not available
3164 44 common/cmd_ide.c Device available
3165 -45 common/cmd_ide.c wrong partition selected
3166 45 common/cmd_ide.c partition selected
3167 -46 common/cmd_ide.c Unknown partition table
3168 46 common/cmd_ide.c valid partition table found
3169 -47 common/cmd_ide.c Invalid partition type
3170 47 common/cmd_ide.c correct partition type
3171 -48 common/cmd_ide.c Error reading Image Header on boot device
3172 48 common/cmd_ide.c reading Image Header from IDE device OK
3173 -49 common/cmd_ide.c Image header has bad magic number
3174 49 common/cmd_ide.c Image header has correct magic number
3175 -50 common/cmd_ide.c Image header has bad checksum
3176 50 common/cmd_ide.c Image header has correct checksum
3177 -51 common/cmd_ide.c Error reading Image from IDE device
3178 51 common/cmd_ide.c reading Image from IDE device OK
3179 52 common/cmd_nand.c before loading a Image from a NAND device
3180 -53 common/cmd_nand.c Bad usage of "nand" command
3181 53 common/cmd_nand.c correct usage of "nand" command
3182 -54 common/cmd_nand.c No boot device
3183 54 common/cmd_nand.c boot device found
3184 -55 common/cmd_nand.c Unknown Chip ID on boot device
3185 55 common/cmd_nand.c correct chip ID found, device available
3186 -56 common/cmd_nand.c Error reading Image Header on boot device
3187 56 common/cmd_nand.c reading Image Header from NAND device OK
3188 -57 common/cmd_nand.c Image header has bad magic number
3189 57 common/cmd_nand.c Image header has correct magic number
3190 -58 common/cmd_nand.c Error reading Image from NAND device
3191 58 common/cmd_nand.c reading Image from NAND device OK
3193 -60 common/env_common.c Environment has a bad CRC, using default
3195 64 net/eth.c starting with Ethernet configuration.
3196 -64 net/eth.c no Ethernet found.
3197 65 net/eth.c Ethernet found.
3199 -80 common/cmd_net.c usage wrong
3200 80 common/cmd_net.c before calling NetLoop()