2 * Copyright (C) 2011 by Vladimir Zapolskiy <vz@mleia.com>
4 * SPDX-License-Identifier: GPL-2.0+
8 #include <asm/arch/cpu.h>
9 #include <asm/arch/clk.h>
10 #include <asm/arch/uart.h>
14 static struct clk_pm_regs *clk = (struct clk_pm_regs *)CLK_PM_BASE;
15 static struct uart_ctrl_regs *ctrl = (struct uart_ctrl_regs *)UART_CTRL_BASE;
17 void lpc32xx_uart_init(unsigned int uart_id)
19 if (uart_id < 1 || uart_id > 7)
22 /* Disable loopback mode, if it is set by S1L bootloader */
23 clrbits_le32(&ctrl->loop,
24 UART_LOOPBACK(CONFIG_SYS_LPC32XX_UART));
26 if (uart_id < 3 || uart_id > 6)
29 /* Enable UART system clock */
30 setbits_le32(&clk->uartclk_ctrl, CLK_UART(uart_id));
32 /* Set UART into autoclock mode */
33 clrsetbits_le32(&ctrl->clkmode,
34 UART_CLKMODE_MASK(uart_id),
35 UART_CLKMODE_AUTO(uart_id));
37 /* Bypass pre-divider of UART clock */
38 writel(CLK_UART_X_DIV(1) | CLK_UART_Y_DIV(1),
39 &clk->u3clk + (uart_id - 3));
42 void lpc32xx_mac_init(void)
44 /* Enable MAC interface */
45 writel(CLK_MAC_REG | CLK_MAC_SLAVE | CLK_MAC_MASTER
46 | CLK_MAC_MII, &clk->macclk_ctrl);
49 void lpc32xx_mlc_nand_init(void)
51 /* Enable NAND interface */
52 writel(CLK_NAND_MLC | CLK_NAND_MLC_INT, &clk->flashclk_ctrl);
55 void lpc32xx_i2c_init(unsigned int devnum)
57 /* Enable I2C interface */
58 uint32_t ctrl = readl(&clk->i2cclk_ctrl);
60 ctrl |= CLK_I2C1_ENABLE;
62 ctrl |= CLK_I2C2_ENABLE;
63 writel(ctrl, &clk->i2cclk_ctrl);
66 U_BOOT_DEVICE(lpc32xx_gpios) = {
67 .name = "gpio_lpc32xx"