2 * armboot - Startup Code for ARM926EJS CPU-core
4 * Copyright (c) 2003 Texas Instruments
6 * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
8 * Copyright (c) 2001 Marius Groger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Zupke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
13 * Copyright (c) 2010 Albert Aribaud <albert.u.boot@aribaud.net>
15 * Change to support call back into iMX28 bootrom
16 * Copyright (c) 2011 Marek Vasut <marek.vasut@gmail.com>
17 * on behalf of DENX Software Engineering GmbH
19 * SPDX-License-Identifier: GPL-2.0+
22 #include <asm-offsets.h>
28 *************************************************************************
30 * Jump vector table as in table 3.1 in [1]
32 *************************************************************************
39 ldr pc, _undefined_instruction
40 ldr pc, _software_interrupt
41 ldr pc, _prefetch_abort
47 #ifdef CONFIG_SPL_BUILD
48 _undefined_instruction:
49 .word _undefined_instruction
51 .word _software_interrupt
64 * Vector table, located at address 0x20.
65 * This table allows the code running AFTER SPL, the U-Boot, to install it's
66 * interrupt handlers here. The problem is that the U-Boot is loaded into RAM,
67 * including it's interrupt vectoring table and the table at 0x0 is still the
68 * SPLs. So if interrupt happens in U-Boot, the SPLs interrupt vectoring table
71 _undefined_instruction:
72 .word undefined_instruction
74 .word software_interrupt
85 #endif /* CONFIG_SPL_BUILD */
86 .balignl 16, 0xdeadbeef
89 *************************************************************************
91 * Startup Code (reset vector)
93 * do important init only if we don't start from memory!
94 * setup Memory and board specific bits prior to relocation.
95 * relocate armboot to ram
98 *************************************************************************
103 #ifdef CONFIG_SPL_TEXT_BASE
104 .word CONFIG_SPL_TEXT_BASE
106 .word CONFIG_SYS_TEXT_BASE
110 * These are defined in the board-specific linker script.
111 * Subtracting _start from them lets the linker put their
112 * relative position in the executable instead of leaving
115 .globl _bss_start_ofs
117 .word __bss_start - _start
121 .word __bss_end - _start
127 #ifdef CONFIG_USE_IRQ
128 /* IRQ stack memory (calculated at run-time) */
129 .globl IRQ_STACK_START
133 /* IRQ stack memory (calculated at run-time) */
134 .globl FIQ_STACK_START
139 /* IRQ stack memory (calculated at run-time) + 8 bytes */
140 .globl IRQ_STACK_START_IN
145 * the actual reset code
150 * Store all registers on old stack pointer, this will allow us later to
151 * return to the BootROM and let the BootROM load U-Boot into RAM.
155 /* save control register c1 */
156 mrc p15, 0, r0, c1, c0, 0
160 * set the cpu to SVC32 mode and store old CPSR register content
171 * restore bootrom's cpu mode (especially FIQ)
177 * restore c1 register
178 * (especially set exception vector location back to
179 * bootrom space which is required by bootrom for USB boot)
182 mcr p15, 0, r0, c1, c0, 0