arch/arm/cpu/armv7/omap-common/boot-common.c

   1 /*
   2  * boot-common.c
   3  *
   4  * Common bootmode functions for omap based boards
   5  *
   6  * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #include <common.h>
  12 #include <ahci.h>
  13 #include <spl.h>
  14 #include <asm/omap_common.h>
  15 #include <asm/arch/omap.h>
  16 #include <asm/arch/mmc_host_def.h>
  17 #include <asm/arch/sys_proto.h>
  18 #include <watchdog.h>
  19 #include <scsi.h>
  20
  21 DECLARE_GLOBAL_DATA_PTR;
  22
  23 void save_omap_boot_params(void)
  24 {
  25         u32 rom_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
  26         u8 boot_device;
  27         u32 dev_desc, dev_data;
  28
  29         if ((rom_params <  NON_SECURE_SRAM_START) ||
  30             (rom_params > NON_SECURE_SRAM_END))
  31                 return;
  32
  33         /*
  34          * rom_params can be type casted to omap_boot_parameters and
  35          * used. But it not correct to assume that romcode structure
  36          * encoding would be same as u-boot. So use the defined offsets.
  37          */
  38         boot_device = *((u8 *)(rom_params + BOOT_DEVICE_OFFSET));
  39
  40 #if defined(BOOT_DEVICE_NAND_I2C)
  41         /*
  42          * Re-map NAND&I2C boot-device to the "normal" NAND boot-device.
  43          * Otherwise the SPL boot IF can't handle this device correctly.
  44          * Somehow booting with Hynix 4GBit NAND H27U4G8 on Siemens
  45          * Draco leads to this boot-device passed to SPL from the BootROM.
  46          */
  47         if (boot_device == BOOT_DEVICE_NAND_I2C)
  48                 boot_device = BOOT_DEVICE_NAND;
  49 #endif
  50         gd->arch.omap_boot_params.omap_bootdevice = boot_device;
  51
  52         gd->arch.omap_boot_params.ch_flags =
  53                                 *((u8 *)(rom_params + CH_FLAGS_OFFSET));
  54
  55         if ((boot_device >= MMC_BOOT_DEVICES_START) &&
  56             (boot_device <= MMC_BOOT_DEVICES_END)) {
  57 #if !defined(CONFIG_AM33XX) && !defined(CONFIG_TI81XX) && \
  58         !defined(CONFIG_AM43XX)
  59                 if ((omap_hw_init_context() ==
  60                                       OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL)) {
  61                         gd->arch.omap_boot_params.omap_bootmode =
  62                         *((u8 *)(rom_params + BOOT_MODE_OFFSET));
  63                 } else
  64 #endif
  65                 {
  66                         dev_desc = *((u32 *)(rom_params + DEV_DESC_PTR_OFFSET));
  67                         dev_data = *((u32 *)(dev_desc + DEV_DATA_PTR_OFFSET));
  68                         gd->arch.omap_boot_params.omap_bootmode =
  69                                         *((u32 *)(dev_data + BOOT_MODE_OFFSET));
  70                 }
  71         }
  72
  73 #if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
  74         /*
  75          * We get different values for QSPI_1 and QSPI_4 being used, but
  76          * don't actually care about this difference.  Rather than
  77          * mangle the later code, if we're coming in as QSPI_4 just
  78          * change to the QSPI_1 value.
  79          */
  80         if (gd->arch.omap_boot_params.omap_bootdevice == 11)
  81                 gd->arch.omap_boot_params.omap_bootdevice = BOOT_DEVICE_SPI;
  82 #endif
  83 }
  84
  85 #ifdef CONFIG_SPL_BUILD
  86 u32 spl_boot_device(void)
  87 {
  88         return (u32) (gd->arch.omap_boot_params.omap_bootdevice);
  89 }
  90
  91 u32 spl_boot_mode(void)
  92 {
  93         u32 val = gd->arch.omap_boot_params.omap_bootmode;
  94
  95         if (val == MMCSD_MODE_RAW)
  96                 return MMCSD_MODE_RAW;
  97         else if (val == MMCSD_MODE_FS)
  98                 return MMCSD_MODE_FS;
  99         else
 100 #ifdef CONFIG_SUPPORT_EMMC_BOOT
 101                 return MMCSD_MODE_EMMCBOOT;
 102 #else
 103                 return MMCSD_MODE_UNDEFINED;
 104 #endif
 105 }
 106
 107 void spl_board_init(void)
 108 {
 109 #ifdef CONFIG_SPL_NAND_SUPPORT
 110         gpmc_init();
 111 #endif
 112 #if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW_SUPPORT)
 113         arch_misc_init();
 114 #endif
 115 #if defined(CONFIG_HW_WATCHDOG)
 116         hw_watchdog_init();
 117 #endif
 118 #ifdef CONFIG_AM33XX
 119         am33xx_spl_board_init();
 120 #endif
 121 }
 122
 123 int board_mmc_init(bd_t *bis)
 124 {
 125         switch (spl_boot_device()) {
 126         case BOOT_DEVICE_MMC1:
 127                 omap_mmc_init(0, 0, 0, -1, -1);
 128                 break;
 129         case BOOT_DEVICE_MMC2:
 130         case BOOT_DEVICE_MMC2_2:
 131                 omap_mmc_init(1, 0, 0, -1, -1);
 132                 break;
 133         }
 134         return 0;
 135 }
 136
 137 void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
 138 {
 139         typedef void __noreturn (*image_entry_noargs_t)(u32 *);
 140         image_entry_noargs_t image_entry =
 141                         (image_entry_noargs_t) spl_image->entry_point;
 142
 143         debug("image entry point: 0x%X\n", spl_image->entry_point);
 144         /* Pass the saved boot_params from rom code */
 145         image_entry((u32 *)&gd->arch.omap_boot_params);
 146 }
 147 #endif
 148
 149 #ifdef CONFIG_SCSI_AHCI_PLAT
 150 void arch_preboot_os(void)
 151 {
 152         ahci_reset(DWC_AHSATA_BASE);
 153 }
 154 #endif