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update to 2015.04-rc1
[karo-tx-uboot.git] / arch / arm / cpu / armv7 / omap-common / boot-common.c
1 /*
2  * boot-common.c
3  *
4  * Common bootmode functions for omap based boards
5  *
6  * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
7  *
8  * SPDX-License-Identifier:     GPL-2.0+
9  */
10
11 #include <common.h>
12 #include <ahci.h>
13 #include <spl.h>
14 #include <asm/omap_common.h>
15 #include <asm/arch/omap.h>
16 #include <asm/arch/mmc_host_def.h>
17 #include <asm/arch/sys_proto.h>
18 #include <watchdog.h>
19 #include <scsi.h>
20
21 DECLARE_GLOBAL_DATA_PTR;
22
23 void save_omap_boot_params(void)
24 {
25         u32 rom_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
26         u8 boot_device;
27         u32 dev_desc, dev_data;
28
29         if ((rom_params <  NON_SECURE_SRAM_START) ||
30             (rom_params > NON_SECURE_SRAM_END))
31                 return;
32
33         /*
34          * rom_params can be type casted to omap_boot_parameters and
35          * used. But it not correct to assume that romcode structure
36          * encoding would be same as u-boot. So use the defined offsets.
37          */
38         boot_device = *((u8 *)(rom_params + BOOT_DEVICE_OFFSET));
39
40 #if defined(BOOT_DEVICE_NAND_I2C)
41         /*
42          * Re-map NAND&I2C boot-device to the "normal" NAND boot-device.
43          * Otherwise the SPL boot IF can't handle this device correctly.
44          * Somehow booting with Hynix 4GBit NAND H27U4G8 on Siemens
45          * Draco leads to this boot-device passed to SPL from the BootROM.
46          */
47         if (boot_device == BOOT_DEVICE_NAND_I2C)
48                 boot_device = BOOT_DEVICE_NAND;
49 #endif
50         gd->arch.omap_boot_params.omap_bootdevice = boot_device;
51
52         gd->arch.omap_boot_params.ch_flags =
53                                 *((u8 *)(rom_params + CH_FLAGS_OFFSET));
54
55         if ((boot_device >= MMC_BOOT_DEVICES_START) &&
56             (boot_device <= MMC_BOOT_DEVICES_END)) {
57 #if !defined(CONFIG_AM33XX) && !defined(CONFIG_TI81XX) && \
58         !defined(CONFIG_AM43XX)
59                 if ((omap_hw_init_context() ==
60                                       OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL)) {
61                         gd->arch.omap_boot_params.omap_bootmode =
62                         *((u8 *)(rom_params + BOOT_MODE_OFFSET));
63                 } else
64 #endif
65                 {
66                         dev_desc = *((u32 *)(rom_params + DEV_DESC_PTR_OFFSET));
67                         dev_data = *((u32 *)(dev_desc + DEV_DATA_PTR_OFFSET));
68                         gd->arch.omap_boot_params.omap_bootmode =
69                                         *((u32 *)(dev_data + BOOT_MODE_OFFSET));
70                 }
71         }
72
73 #if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
74         /*
75          * We get different values for QSPI_1 and QSPI_4 being used, but
76          * don't actually care about this difference.  Rather than
77          * mangle the later code, if we're coming in as QSPI_4 just
78          * change to the QSPI_1 value.
79          */
80         if (gd->arch.omap_boot_params.omap_bootdevice == 11)
81                 gd->arch.omap_boot_params.omap_bootdevice = BOOT_DEVICE_SPI;
82 #endif
83 }
84
85 #ifdef CONFIG_SPL_BUILD
86 u32 spl_boot_device(void)
87 {
88         return gd->arch.omap_boot_params.omap_bootdevice;
89 }
90
91 u32 spl_boot_mode(void)
92 {
93         u32 val = gd->arch.omap_boot_params.omap_bootmode;
94
95         if (val == MMCSD_MODE_RAW)
96                 return MMCSD_MODE_RAW;
97         else if (val == MMCSD_MODE_FS)
98                 return MMCSD_MODE_FS;
99         else
100 #ifdef CONFIG_SUPPORT_EMMC_BOOT
101                 return MMCSD_MODE_EMMCBOOT;
102 #else
103                 return MMCSD_MODE_UNDEFINED;
104 #endif
105 }
106
107 void spl_board_init(void)
108 {
109         /*
110          * Save the boot parameters passed from romcode.
111          * We cannot delay the saving further than this,
112          * to prevent overwrites.
113          */
114         save_omap_boot_params();
115
116         /* Prepare console output */
117         preloader_console_init();
118
119 #ifdef CONFIG_SPL_NAND_SUPPORT
120         gpmc_init();
121 #endif
122 #if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW_SUPPORT)
123         arch_misc_init();
124 #endif
125 #if defined(CONFIG_HW_WATCHDOG)
126         hw_watchdog_init();
127 #endif
128 #ifdef CONFIG_AM33XX
129         am33xx_spl_board_init();
130 #endif
131 }
132
133 int board_mmc_init(bd_t *bis)
134 {
135         switch (spl_boot_device()) {
136         case BOOT_DEVICE_MMC1:
137                 omap_mmc_init(0, 0, 0, -1, -1);
138                 break;
139         case BOOT_DEVICE_MMC2:
140         case BOOT_DEVICE_MMC2_2:
141                 omap_mmc_init(1, 0, 0, -1, -1);
142                 break;
143         }
144         return 0;
145 }
146
147 void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
148 {
149         typedef void __noreturn (*image_entry_noargs_t)(u32 *);
150         image_entry_noargs_t image_entry =
151                         (image_entry_noargs_t) spl_image->entry_point;
152
153         debug("image entry point: 0x%X\n", spl_image->entry_point);
154         /* Pass the saved boot_params from rom code */
155         image_entry((u32 *)&gd->arch.omap_boot_params);
156 }
157 #endif
158
159 #ifdef CONFIG_SCSI_AHCI_PLAT
160 void arch_preboot_os(void)
161 {
162         ahci_reset(DWC_AHSATA_BASE);
163 }
164 #endif