am33xx: Update DT files, add am335x_gp_evm_config target
[karo-tx-uboot.git] / arch / arm / dts / am335x-bone-common.dtsi
1 /*
2  * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
8
9 / {
10         cpus {
11                 cpu@0 {
12                         cpu0-supply = <&dcdc2_reg>;
13                 };
14         };
15
16         memory {
17                 device_type = "memory";
18                 reg = <0x80000000 0x10000000>; /* 256 MB */
19         };
20
21         leds {
22                 pinctrl-names = "default";
23                 pinctrl-0 = <&user_leds_s0>;
24
25                 compatible = "gpio-leds";
26
27                 led@2 {
28                         label = "beaglebone:green:heartbeat";
29                         gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
30                         linux,default-trigger = "heartbeat";
31                         default-state = "off";
32                 };
33
34                 led@3 {
35                         label = "beaglebone:green:mmc0";
36                         gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
37                         linux,default-trigger = "mmc0";
38                         default-state = "off";
39                 };
40
41                 led@4 {
42                         label = "beaglebone:green:usr2";
43                         gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
44                         linux,default-trigger = "cpu0";
45                         default-state = "off";
46                 };
47
48                 led@5 {
49                         label = "beaglebone:green:usr3";
50                         gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
51                         linux,default-trigger = "mmc1";
52                         default-state = "off";
53                 };
54         };
55
56         vmmcsd_fixed: fixedregulator@0 {
57                 compatible = "regulator-fixed";
58                 regulator-name = "vmmcsd_fixed";
59                 regulator-min-microvolt = <3300000>;
60                 regulator-max-microvolt = <3300000>;
61         };
62 };
63
64 &am33xx_pinmux {
65         pinctrl-names = "default";
66         pinctrl-0 = <&clkout2_pin>;
67
68         user_leds_s0: user_leds_s0 {
69                 pinctrl-single,pins = <
70                         0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)  /* gpmc_a5.gpio1_21 */
71                         0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7)    /* gpmc_a6.gpio1_22 */
72                         0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7)  /* gpmc_a7.gpio1_23 */
73                         0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7)    /* gpmc_a8.gpio1_24 */
74                 >;
75         };
76
77         i2c0_pins: pinmux_i2c0_pins {
78                 pinctrl-single,pins = <
79                         0x188 (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_sda.i2c0_sda */
80                         0x18c (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_scl.i2c0_scl */
81                 >;
82         };
83
84         i2c2_pins: pinmux_i2c2_pins {
85                 pinctrl-single,pins = <
86                         0x178 (PIN_INPUT_PULLUP | MUX_MODE3)    /* uart1_ctsn.i2c2_sda */
87                         0x17c (PIN_INPUT_PULLUP | MUX_MODE3)    /* uart1_rtsn.i2c2_scl */
88                 >;
89         };
90
91         uart0_pins: pinmux_uart0_pins {
92                 pinctrl-single,pins = <
93                         0x170 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart0_rxd.uart0_rxd */
94                         0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
95                 >;
96         };
97
98         clkout2_pin: pinmux_clkout2_pin {
99                 pinctrl-single,pins = <
100                         0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
101                 >;
102         };
103
104         cpsw_default: cpsw_default {
105                 pinctrl-single,pins = <
106                         /* Slave 1 */
107                         0x110 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mii1_rxerr.mii1_rxerr */
108                         0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
109                         0x118 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mii1_rxdv.mii1_rxdv */
110                         0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
111                         0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
112                         0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
113                         0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
114                         0x12c (PIN_INPUT_PULLUP | MUX_MODE0)    /* mii1_txclk.mii1_txclk */
115                         0x130 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mii1_rxclk.mii1_rxclk */
116                         0x134 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mii1_rxd3.mii1_rxd3 */
117                         0x138 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mii1_rxd2.mii1_rxd2 */
118                         0x13c (PIN_INPUT_PULLUP | MUX_MODE0)    /* mii1_rxd1.mii1_rxd1 */
119                         0x140 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mii1_rxd0.mii1_rxd0 */
120                 >;
121         };
122
123         cpsw_sleep: cpsw_sleep {
124                 pinctrl-single,pins = <
125                         /* Slave 1 reset value */
126                         0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
127                         0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
128                         0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
129                         0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
130                         0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
131                         0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
132                         0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
133                         0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
134                         0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
135                         0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
136                         0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
137                         0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
138                         0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
139                 >;
140         };
141
142         davinci_mdio_default: davinci_mdio_default {
143                 pinctrl-single,pins = <
144                         /* MDIO */
145                         0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)    /* mdio_data.mdio_data */
146                         0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)                   /* mdio_clk.mdio_clk */
147                 >;
148         };
149
150         davinci_mdio_sleep: davinci_mdio_sleep {
151                 pinctrl-single,pins = <
152                         /* MDIO reset value */
153                         0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
154                         0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
155                 >;
156         };
157
158         mmc1_pins: pinmux_mmc1_pins {
159                 pinctrl-single,pins = <
160                         0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */
161                 >;
162         };
163
164         emmc_pins: pinmux_emmc_pins {
165                 pinctrl-single,pins = <
166                         0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
167                         0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
168                         0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
169                         0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
170                         0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
171                         0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
172                         0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
173                         0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
174                         0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
175                         0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
176                 >;
177         };
178 };
179
180 &uart0 {
181         pinctrl-names = "default";
182         pinctrl-0 = <&uart0_pins>;
183
184         status = "okay";
185 };
186
187 &usb {
188         status = "okay";
189 };
190
191 &usb_ctrl_mod {
192         status = "okay";
193 };
194
195 &usb0_phy {
196         status = "okay";
197 };
198
199 &usb1_phy {
200         status = "okay";
201 };
202
203 &usb0 {
204         status = "okay";
205         dr_mode = "peripheral";
206 };
207
208 &usb1 {
209         status = "okay";
210         dr_mode = "host";
211 };
212
213 &cppi41dma  {
214         status = "okay";
215 };
216
217 &i2c0 {
218         pinctrl-names = "default";
219         pinctrl-0 = <&i2c0_pins>;
220
221         status = "okay";
222         clock-frequency = <400000>;
223
224         tps: tps@24 {
225                 reg = <0x24>;
226         };
227
228         baseboard_eeprom: baseboard_eeprom@50 {
229                 compatible = "at,24c256";
230                 reg = <0x50>;
231
232                 #address-cells = <1>;
233                 #size-cells = <1>;
234                 baseboard_data: baseboard_data@0 {
235                         reg = <0 0x100>;
236                 };
237         };
238 };
239
240 &i2c2 {
241         pinctrl-names = "default";
242         pinctrl-0 = <&i2c2_pins>;
243
244         status = "okay";
245         clock-frequency = <100000>;
246
247         cape_eeprom0: cape_eeprom0@54 {
248                 compatible = "at,24c256";
249                 reg = <0x54>;
250                 #address-cells = <1>;
251                 #size-cells = <1>;
252                 cape0_data: cape_data@0 {
253                         reg = <0 0x100>;
254                 };
255         };
256
257         cape_eeprom1: cape_eeprom1@55 {
258                 compatible = "at,24c256";
259                 reg = <0x55>;
260                 #address-cells = <1>;
261                 #size-cells = <1>;
262                 cape1_data: cape_data@0 {
263                         reg = <0 0x100>;
264                 };
265         };
266
267         cape_eeprom2: cape_eeprom2@56 {
268                 compatible = "at,24c256";
269                 reg = <0x56>;
270                 #address-cells = <1>;
271                 #size-cells = <1>;
272                 cape2_data: cape_data@0 {
273                         reg = <0 0x100>;
274                 };
275         };
276
277         cape_eeprom3: cape_eeprom3@57 {
278                 compatible = "at,24c256";
279                 reg = <0x57>;
280                 #address-cells = <1>;
281                 #size-cells = <1>;
282                 cape3_data: cape_data@0 {
283                         reg = <0 0x100>;
284                 };
285         };
286 };
287
288
289 /include/ "tps65217.dtsi"
290
291 &tps {
292         /*
293          * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
294          * mode") at poweroff.  Most BeagleBone versions do not support RTC-only
295          * mode and risk hardware damage if this mode is entered.
296          *
297          * For details, see linux-omap mailing list May 2015 thread
298          *      [PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller
299          * In particular, messages:
300          *      http://www.spinics.net/lists/linux-omap/msg118585.html
301          *      http://www.spinics.net/lists/linux-omap/msg118615.html
302          *
303          * You can override this later with
304          *      &tps {  /delete-property/ ti,pmic-shutdown-controller;  }
305          * if you want to use RTC-only mode and made sure you are not affected
306          * by the hardware problems. (Tip: double-check by performing a current
307          * measurement after shutdown: it should be less than 1 mA.)
308          */
309         ti,pmic-shutdown-controller;
310
311         regulators {
312                 dcdc1_reg: regulator@0 {
313                         regulator-name = "vdds_dpr";
314                         regulator-always-on;
315                 };
316
317                 dcdc2_reg: regulator@1 {
318                         /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
319                         regulator-name = "vdd_mpu";
320                         regulator-min-microvolt = <925000>;
321                         regulator-max-microvolt = <1325000>;
322                         regulator-boot-on;
323                         regulator-always-on;
324                 };
325
326                 dcdc3_reg: regulator@2 {
327                         /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
328                         regulator-name = "vdd_core";
329                         regulator-min-microvolt = <925000>;
330                         regulator-max-microvolt = <1150000>;
331                         regulator-boot-on;
332                         regulator-always-on;
333                 };
334
335                 ldo1_reg: regulator@3 {
336                         regulator-name = "vio,vrtc,vdds";
337                         regulator-always-on;
338                 };
339
340                 ldo2_reg: regulator@4 {
341                         regulator-name = "vdd_3v3aux";
342                         regulator-always-on;
343                 };
344
345                 ldo3_reg: regulator@5 {
346                         regulator-name = "vdd_1v8";
347                         regulator-always-on;
348                 };
349
350                 ldo4_reg: regulator@6 {
351                         regulator-name = "vdd_3v3a";
352                         regulator-always-on;
353                 };
354         };
355 };
356
357 &cpsw_emac0 {
358         phy_id = <&davinci_mdio>, <0>;
359         phy-mode = "mii";
360 };
361
362 &cpsw_emac1 {
363         phy_id = <&davinci_mdio>, <1>;
364         phy-mode = "mii";
365 };
366
367 &mac {
368         pinctrl-names = "default", "sleep";
369         pinctrl-0 = <&cpsw_default>;
370         pinctrl-1 = <&cpsw_sleep>;
371         status = "okay";
372 };
373
374 &davinci_mdio {
375         pinctrl-names = "default", "sleep";
376         pinctrl-0 = <&davinci_mdio_default>;
377         pinctrl-1 = <&davinci_mdio_sleep>;
378         status = "okay";
379 };
380
381 &mmc1 {
382         status = "okay";
383         bus-width = <0x4>;
384         pinctrl-names = "default";
385         pinctrl-0 = <&mmc1_pins>;
386         cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
387         cd-inverted;
388 };
389
390 &aes {
391         status = "okay";
392 };
393
394 &sham {
395         status = "okay";
396 };