arch/arm/dts/tegra210.dtsi

   1 #include <dt-bindings/clock/tegra210-car.h>
   2 #include <dt-bindings/gpio/tegra-gpio.h>
   3 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
   4 #include <dt-bindings/interrupt-controller/arm-gic.h>
   5 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
   6
   7 #include "skeleton.dtsi"
   8
   9 / {
  10         compatible = "nvidia,tegra210";
  11         interrupt-parent = <&gic>;
  12         #address-cells = <2>;
  13         #size-cells = <2>;
  14
  15         gic: interrupt-controller@0,50041000 {
  16                 compatible = "arm,gic-400";
  17                 #interrupt-cells = <3>;
  18                 interrupt-controller;
  19                 reg = <0x0 0x50041000 0x0 0x1000>,
  20                       <0x0 0x50042000 0x0 0x2000>,
  21                       <0x0 0x50044000 0x0 0x2000>,
  22                       <0x0 0x50046000 0x0 0x2000>;
  23                 interrupts = <GIC_PPI 9
  24                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
  25                 interrupt-parent = <&gic>;
  26         };
  27
  28         tegra_car: clock@0,60006000 {
  29                 compatible = "nvidia,tegra210-car";
  30                 reg = <0x0 0x60006000 0x0 0x1000>;
  31                 #clock-cells = <1>;
  32                 #reset-cells = <1>;
  33         };
  34
  35         gpio: gpio@0,6000d000 {
  36                 compatible = "nvidia,tegra210-gpio", "nvidia,tegra30-gpio";
  37                 reg = <0x0 0x6000d000 0x0 0x1000>;
  38                 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
  39                              <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
  40                              <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
  41                              <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
  42                              <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
  43                              <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
  44                              <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
  45                              <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
  46                 #gpio-cells = <2>;
  47                 gpio-controller;
  48                 #interrupt-cells = <2>;
  49                 interrupt-controller;
  50         };
  51
  52         i2c@0,7000c000 {
  53                 compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
  54                 reg = <0x0 0x7000c000 0x0 0x100>;
  55                 interrupts = <0 38 0x04>;
  56                 #address-cells = <1>;
  57                 #size-cells = <0>;
  58                 clocks = <&tegra_car 12>;
  59                 status = "disabled";
  60         };
  61
  62         i2c@0,7000c400 {
  63                 compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
  64                 reg = <0x0 0x7000c400 0x0 0x100>;
  65                 interrupts = <0 84 0x04>;
  66                 #address-cells = <1>;
  67                 #size-cells = <0>;
  68                 clocks = <&tegra_car 54>;
  69                 status = "disabled";
  70         };
  71
  72         i2c@0,7000c500 {
  73                 compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
  74                 reg = <0x0 0x7000c500 0x0 0x100>;
  75                 interrupts = <0 92 0x04>;
  76                 #address-cells = <1>;
  77                 #size-cells = <0>;
  78                 clocks = <&tegra_car 67>;
  79                 status = "disabled";
  80         };
  81
  82         i2c@0,7000c700 {
  83                 compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
  84                 reg = <0x0 0x7000c700 0x0 0x100>;
  85                 interrupts = <0 120 0x04>;
  86                 #address-cells = <1>;
  87                 #size-cells = <0>;
  88                 clocks = <&tegra_car 103>;
  89                 status = "disabled";
  90         };
  91
  92         i2c@0,7000d000 {
  93                 compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
  94                 reg = <0x0 0x7000d000 0x0 0x100>;
  95                 interrupts = <0 53 0x04>;
  96                 #address-cells = <1>;
  97                 #size-cells = <0>;
  98                 clocks = <&tegra_car 47>;
  99                 status = "disabled";
 100         };
 101
 102         i2c@0,7000d100 {
 103                 compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
 104                 reg = <0x0 0x7000d100 0x0 0x100>;
 105                 interrupts = <0 53 0x04>;
 106                 #address-cells = <1>;
 107                 #size-cells = <0>;
 108                 clocks = <&tegra_car 47>;
 109                 status = "disabled";
 110         };
 111
 112         uarta: serial@0,70006000 {
 113                 compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
 114                 reg = <0x0 0x70006000 0x0 0x40>;
 115                 reg-shift = <2>;
 116                 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
 117                 clocks = <&tegra_car TEGRA210_CLK_UARTA>;
 118                 resets = <&tegra_car 6>;
 119                 reset-names = "serial";
 120                 status = "disabled";
 121         };
 122
 123         uartb: serial@0,70006040 {
 124                 compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
 125                 reg = <0x0 0x70006040 0x0 0x40>;
 126                 reg-shift = <2>;
 127                 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
 128                 clocks = <&tegra_car TEGRA210_CLK_UARTB>;
 129                 resets = <&tegra_car 7>;
 130                 reset-names = "serial";
 131                 status = "disabled";
 132         };
 133
 134         uartc: serial@0,70006200 {
 135                 compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
 136                 reg = <0x0 0x70006200 0x0 0x40>;
 137                 reg-shift = <2>;
 138                 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
 139                 clocks = <&tegra_car TEGRA210_CLK_UARTC>;
 140                 resets = <&tegra_car 55>;
 141                 reset-names = "serial";
 142                 status = "disabled";
 143         };
 144
 145         uartd: serial@0,70006300 {
 146                 compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
 147                 reg = <0x0 0x70006300 0x0 0x40>;
 148                 reg-shift = <2>;
 149                 interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
 150                 clocks = <&tegra_car TEGRA210_CLK_UARTD>;
 151                 resets = <&tegra_car 65>;
 152                 reset-names = "serial";
 153                 status = "disabled";
 154         };
 155
 156         spi@0,7000d400 {
 157                 compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
 158                 reg = <0x0 0x7000d400 0x0 0x200>;
 159                 interrupts = <0 59 0x04>;
 160                 #address-cells = <1>;
 161                 #size-cells = <0>;
 162                 clocks = <&tegra_car TEGRA210_CLK_SBC1>;
 163                 resets = <&tegra_car 41>;
 164                 reset-names = "spi";
 165                 status = "disabled";
 166         };
 167
 168         spi@0,7000d600 {
 169                 compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
 170                 reg = <0x0 0x7000d600 0x0 0x200>;
 171                 interrupts = <0 82 0x04>;
 172                 #address-cells = <1>;
 173                 #size-cells = <0>;
 174                 clocks = <&tegra_car TEGRA210_CLK_SBC2>;
 175                 resets = <&tegra_car 44>;
 176                 reset-names = "spi";
 177                 status = "disabled";
 178         };
 179
 180         spi@0,7000d800 {
 181                 compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
 182                 reg = <0x0 0x7000d800 0x0 0x200>;
 183                 interrupts = <0 83 0x04>;
 184                 #address-cells = <1>;
 185                 #size-cells = <0>;
 186                 clocks = <&tegra_car TEGRA210_CLK_SBC3>;
 187                 resets = <&tegra_car 46>;
 188                 reset-names = "spi";
 189                 status = "disabled";
 190         };
 191
 192         spi@0,7000da00 {
 193                 compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
 194                 reg = <0x0 0x7000da00 0x0 0x200>;
 195                 interrupts = <0 93 0x04>;
 196                 #address-cells = <1>;
 197                 #size-cells = <0>;
 198                 clocks = <&tegra_car TEGRA210_CLK_SBC4>;
 199                 resets = <&tegra_car 68>;
 200                 reset-names = "spi";
 201                 status = "disabled";
 202         };
 203
 204         spi@0,70410000 {
 205                 compatible = "nvidia,tegra210-qspi";
 206                 reg = <0x0 0x70410000 0x0 0x1000>;
 207                 interrupts = <0 10 0x04>;
 208                 #address-cells = <1>;
 209                 #size-cells = <0>;
 210                 clocks = <&tegra_car 211>;
 211                 status = "disabled";
 212         };
 213
 214         padctl: padctl@0,7009f000 {
 215                 compatible = "nvidia,tegra210-xusb-padctl";
 216                 reg = <0x0 0x7009f000 0x0 0x1000>;
 217                 resets = <&tegra_car 142>;
 218                 reset-names = "padctl";
 219                 #phy-cells = <1>;
 220         };
 221
 222         sdhci@0,700b0000 {
 223                 compatible = "nvidia,tegra210-sdhci";
 224                 reg = <0x0 0x700b0000 0x0 0x200>;
 225                 interrupts = <0 14 0x04>;
 226                 clocks = <&tegra_car TEGRA210_CLK_SDMMC1>;
 227                 resets = <&tegra_car 14>;
 228                 reset-names = "sdhci";
 229                 status = "disabled";
 230         };
 231
 232         sdhci@0,700b0200 {
 233                 compatible = "nvidia,tegra210-sdhci";
 234                 reg = <0x0 0x700b0200 0x0 0x200>;
 235                 interrupts = <0 15 0x04>;
 236                 clocks = <&tegra_car TEGRA210_CLK_SDMMC2>;
 237                 resets = <&tegra_car 9>;
 238                 reset-names = "sdhci";
 239                 status = "disabled";
 240         };
 241
 242         sdhci@0,700b0400 {
 243                 compatible = "nvidia,tegra210-sdhci";
 244                 reg = <0x0 0x700b0400 0x0 0x200>;
 245                 interrupts = <0 19 0x04>;
 246                 clocks = <&tegra_car TEGRA210_CLK_SDMMC3>;
 247                 resets = <&tegra_car 69>;
 248                 reset-names = "sdhci";
 249                 status = "disabled";
 250         };
 251
 252         sdhci@0,700b0600 {
 253                 compatible = "nvidia,tegra210-sdhci";
 254                 reg = <0x0 0x700b0600 0x0 0x200>;
 255                 interrupts = <0 31 0x04>;
 256                 clocks = <&tegra_car TEGRA210_CLK_SDMMC4>;
 257                 resets = <&tegra_car 15>;
 258                 reset-names = "sdhci";
 259                 status = "disabled";
 260         };
 261
 262         usb@0,7d000000 {
 263                 compatible = "nvidia,tegra210-ehci";
 264                 reg = <0x0 0x7d000000 0x0 0x4000>;
 265                 interrupts = <0 20 0x04>;
 266                 phy_type = "utmi";
 267                 clocks = <&tegra_car TEGRA210_CLK_USBD>;
 268                 resets = <&tegra_car 22>;
 269                 reset-names = "usb";
 270                 status = "disabled";
 271         };
 272
 273         usb@0,7d004000 {
 274                 compatible = "nvidia,tegra210-ehci";
 275                 reg = <0x0 0x7d004000 0x0 0x4000>;
 276                 interrupts = < 53 >;
 277                 phy_type = "utmi";
 278                 clocks = <&tegra_car TEGRA210_CLK_USB2>;
 279                 resets = <&tegra_car 58>;
 280                 reset-names = "usb";
 281                 status = "disabled";
 282         };
 283 };