]> git.kernelconcepts.de Git - karo-tx-uboot.git/blob - arch/arm/dts/tegra30.dtsi
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'
[karo-tx-uboot.git] / arch / arm / dts / tegra30.dtsi
1 #include <dt-bindings/gpio/tegra-gpio.h>
2 #include <dt-bindings/interrupt-controller/arm-gic.h>
3
4 #include "skeleton.dtsi"
5
6 / {
7         compatible = "nvidia,tegra30";
8
9         tegra_car: clock {
10                 compatible = "nvidia,tegra30-car";
11                 reg = <0x60006000 0x1000>;
12                 #clock-cells = <1>;
13         };
14
15         apbdma: dma {
16                 compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
17                 reg = <0x6000a000 0x1400>;
18                 interrupts = <0 104 0x04
19                               0 105 0x04
20                               0 106 0x04
21                               0 107 0x04
22                               0 108 0x04
23                               0 109 0x04
24                               0 110 0x04
25                               0 111 0x04
26                               0 112 0x04
27                               0 113 0x04
28                               0 114 0x04
29                               0 115 0x04
30                               0 116 0x04
31                               0 117 0x04
32                               0 118 0x04
33                               0 119 0x04
34                               0 128 0x04
35                               0 129 0x04
36                               0 130 0x04
37                               0 131 0x04
38                               0 132 0x04
39                               0 133 0x04
40                               0 134 0x04
41                               0 135 0x04
42                               0 136 0x04
43                               0 137 0x04
44                               0 138 0x04
45                               0 139 0x04
46                               0 140 0x04
47                               0 141 0x04
48                               0 142 0x04
49                               0 143 0x04>;
50                 clocks = <&tegra_car 34>;
51         };
52
53         gpio: gpio@6000d000 {
54                 compatible = "nvidia,tegra30-gpio";
55                 reg = <0x6000d000 0x1000>;
56                 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
57                              <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
58                              <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
59                              <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
60                              <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
61                              <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
62                              <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
63                              <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
64                 #gpio-cells = <2>;
65                 gpio-controller;
66                 #interrupt-cells = <2>;
67                 interrupt-controller;
68         };
69
70         i2c@7000c000 {
71                 compatible =  "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
72                 reg = <0x7000c000 0x100>;
73                 interrupts = <0 38 0x04>;
74                 #address-cells = <1>;
75                 #size-cells = <0>;
76                 clocks = <&tegra_car 12>, <&tegra_car 182>;
77                 clock-names = "div-clk", "fast-clk";
78                 status = "disabled";
79         };
80
81         i2c@7000c400 {
82                 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
83                 reg = <0x7000c400 0x100>;
84                 interrupts = <0 84 0x04>;
85                 #address-cells = <1>;
86                 #size-cells = <0>;
87                 clocks = <&tegra_car 54>, <&tegra_car 182>;
88                 clock-names = "div-clk", "fast-clk";
89                 status = "disabled";
90         };
91
92         i2c@7000c500 {
93                 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
94                 reg = <0x7000c500 0x100>;
95                 interrupts = <0 92 0x04>;
96                 #address-cells = <1>;
97                 #size-cells = <0>;
98                 clocks = <&tegra_car 67>, <&tegra_car 182>;
99                 clock-names = "div-clk", "fast-clk";
100                 status = "disabled";
101         };
102
103         i2c@7000c700 {
104                 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
105                 reg = <0x7000c700 0x100>;
106                 interrupts = <0 120 0x04>;
107                 #address-cells = <1>;
108                 #size-cells = <0>;
109                 clocks = <&tegra_car 103>, <&tegra_car 182>;
110                 clock-names = "div-clk", "fast-clk";
111                 status = "disabled";
112         };
113
114         i2c@7000d000 {
115                 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
116                 reg = <0x7000d000 0x100>;
117                 interrupts = <0 53 0x04>;
118                 #address-cells = <1>;
119                 #size-cells = <0>;
120                 clocks = <&tegra_car 47>, <&tegra_car 182>;
121                 clock-names = "div-clk", "fast-clk";
122                 status = "disabled";
123         };
124
125         spi@7000d400 {
126                 compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
127                 reg = <0x7000d400 0x200>;
128                 interrupts = <0 59 0x04>;
129                 nvidia,dma-request-selector = <&apbdma 15>;
130                 #address-cells = <1>;
131                 #size-cells = <0>;
132                 clocks = <&tegra_car 41>;
133                 status = "disabled";
134         };
135
136         spi@7000d600 {
137                 compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
138                 reg = <0x7000d600 0x200>;
139                 interrupts = <0 82 0x04>;
140                 nvidia,dma-request-selector = <&apbdma 16>;
141                 #address-cells = <1>;
142                 #size-cells = <0>;
143                 clocks = <&tegra_car 44>;
144                 status = "disabled";
145         };
146
147         spi@7000d800 {
148                 compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
149                 reg = <0x7000d480 0x200>;
150                 interrupts = <0 83 0x04>;
151                 nvidia,dma-request-selector = <&apbdma 17>;
152                 #address-cells = <1>;
153                 #size-cells = <0>;
154                 clocks = <&tegra_car 46>;
155                 status = "disabled";
156         };
157
158         spi@7000da00 {
159                 compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
160                 reg = <0x7000da00 0x200>;
161                 interrupts = <0 93 0x04>;
162                 nvidia,dma-request-selector = <&apbdma 18>;
163                 #address-cells = <1>;
164                 #size-cells = <0>;
165                 clocks = <&tegra_car 68>;
166                 status = "disabled";
167         };
168
169         spi@7000dc00 {
170                 compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
171                 reg = <0x7000dc00 0x200>;
172                 interrupts = <0 94 0x04>;
173                 nvidia,dma-request-selector = <&apbdma 27>;
174                 #address-cells = <1>;
175                 #size-cells = <0>;
176                 clocks = <&tegra_car 104>;
177                 status = "disabled";
178         };
179
180         spi@7000de00 {
181                 compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
182                 reg = <0x7000de00 0x200>;
183                 interrupts = <0 79 0x04>;
184                 nvidia,dma-request-selector = <&apbdma 28>;
185                 #address-cells = <1>;
186                 #size-cells = <0>;
187                 clocks = <&tegra_car 105>;
188                 status = "disabled";
189         };
190
191         sdhci@78000000 {
192                 compatible = "nvidia,tegra30-sdhci";
193                 reg = <0x78000000 0x200>;
194                 interrupts = <0 14 0x04>;
195                 clocks = <&tegra_car 14>;
196                 status = "disabled";
197         };
198
199         sdhci@78000200 {
200                 compatible = "nvidia,tegra30-sdhci";
201                 reg = <0x78000200 0x200>;
202                 interrupts = <0 15 0x04>;
203                 clocks = <&tegra_car 9>;
204                 status = "disabled";
205         };
206
207         sdhci@78000400 {
208                 compatible = "nvidia,tegra30-sdhci";
209                 reg = <0x78000400 0x200>;
210                 interrupts = <0 19 0x04>;
211                 clocks = <&tegra_car 69>;
212                 status = "disabled";
213         };
214
215         sdhci@78000600 {
216                 compatible = "nvidia,tegra30-sdhci";
217                 reg = <0x78000600 0x200>;
218                 interrupts = <0 31 0x04>;
219                 clocks = <&tegra_car 15>;
220                 status = "disabled";
221         };
222
223         usb@7d000000 {
224                 compatible = "nvidia,tegra30-ehci";
225                 reg = <0x7d000000 0x4000>;
226                 interrupts = <52>;
227                 phy_type = "utmi";
228                 clocks = <&tegra_car 22>;       /* PERIPH_ID_USBD */
229                 status = "disabled";
230         };
231
232         usb@7d004000 {
233                 compatible = "nvidia,tegra30-ehci";
234                 reg = <0x7d004000 0x4000>;
235                 interrupts = <53>;
236                 phy_type = "hsic";
237                 clocks = <&tegra_car 58>;       /* PERIPH_ID_USB2 */
238                 status = "disabled";
239         };
240
241         usb@7d008000 {
242                 compatible = "nvidia,tegra30-ehci";
243                 reg = <0x7d008000 0x4000>;
244                 interrupts = <129>;
245                 phy_type = "utmi";
246                 clocks = <&tegra_car 59>;       /* PERIPH_ID_USB3 */
247                 status = "disabled";
248         };
249 };