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ARM: dts: uniphier: add ProXstream2 and PH1-LD6b SoC/board support
[karo-tx-uboot.git] / arch / arm / dts / uniphier-proxstream2.dtsi
1 /*
2  * Device Tree Source for UniPhier ProXstream2 SoC
3  *
4  * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
5  *
6  * SPDX-License-Identifier:     GPL-2.0+        X11
7  */
8
9 /include/ "skeleton.dtsi"
10
11 / {
12         compatible = "socionext,proxstream2";
13
14         cpus {
15                 #address-cells = <1>;
16                 #size-cells = <0>;
17                 enable-method = "socionext,uniphier-smp";
18
19                 cpu@0 {
20                         device_type = "cpu";
21                         compatible = "arm,cortex-a9";
22                         reg = <0>;
23                 };
24
25                 cpu@1 {
26                         device_type = "cpu";
27                         compatible = "arm,cortex-a9";
28                         reg = <1>;
29                 };
30
31                 cpu@2 {
32                         device_type = "cpu";
33                         compatible = "arm,cortex-a9";
34                         reg = <2>;
35                 };
36
37                 cpu@3 {
38                         device_type = "cpu";
39                         compatible = "arm,cortex-a9";
40                         reg = <3>;
41                 };
42         };
43
44         clocks {
45                 arm_timer_clk: arm_timer_clk {
46                         #clock-cells = <0>;
47                         compatible = "fixed-clock";
48                         clock-frequency = <50000000>;
49                 };
50
51                 uart_clk: uart_clk {
52                         #clock-cells = <0>;
53                         compatible = "fixed-clock";
54                         clock-frequency = <88900000>;
55                 };
56
57                 i2c_clk: i2c_clk {
58                         #clock-cells = <0>;
59                         compatible = "fixed-clock";
60                         clock-frequency = <50000000>;
61                 };
62         };
63
64         soc {
65                 compatible = "simple-bus";
66                 #address-cells = <1>;
67                 #size-cells = <1>;
68                 ranges;
69                 interrupt-parent = <&intc>;
70
71                 extbus: extbus {
72                         compatible = "simple-bus";
73                         #address-cells = <2>;
74                         #size-cells = <1>;
75                 };
76
77                 serial0: serial@54006800 {
78                         compatible = "socionext,uniphier-uart";
79                         status = "disabled";
80                         reg = <0x54006800 0x40>;
81                         pinctrl-names = "default";
82                         pinctrl-0 = <&pinctrl_uart0>;
83                         interrupts = <0 33 4>;
84                         clocks = <&uart_clk>;
85                         clock-frequency = <88900000>;
86                 };
87
88                 serial1: serial@54006900 {
89                         compatible = "socionext,uniphier-uart";
90                         status = "disabled";
91                         reg = <0x54006900 0x40>;
92                         pinctrl-names = "default";
93                         pinctrl-0 = <&pinctrl_uart1>;
94                         interrupts = <0 35 4>;
95                         clocks = <&uart_clk>;
96                         clock-frequency = <88900000>;
97                 };
98
99                 serial2: serial@54006a00 {
100                         compatible = "socionext,uniphier-uart";
101                         status = "disabled";
102                         reg = <0x54006a00 0x40>;
103                         pinctrl-names = "default";
104                         pinctrl-0 = <&pinctrl_uart2>;
105                         interrupts = <0 37 4>;
106                         clocks = <&uart_clk>;
107                         clock-frequency = <88900000>;
108                 };
109
110                 serial3: serial@54006b00 {
111                         compatible = "socionext,uniphier-uart";
112                         status = "disabled";
113                         reg = <0x54006b00 0x40>;
114                         pinctrl-names = "default";
115                         pinctrl-0 = <&pinctrl_uart3>;
116                         interrupts = <0 177 4>;
117                         clocks = <&uart_clk>;
118                         clock-frequency = <88900000>;
119                 };
120
121                 i2c0: i2c@58780000 {
122                         compatible = "socionext,uniphier-fi2c";
123                         status = "disabled";
124                         reg = <0x58780000 0x80>;
125                         #address-cells = <1>;
126                         #size-cells = <0>;
127                         pinctrl-names = "default";
128                         pinctrl-0 = <&pinctrl_i2c0>;
129                         interrupts = <0 41 4>;
130                         clocks = <&i2c_clk>;
131                         clock-frequency = <100000>;
132                 };
133
134                 i2c1: i2c@58781000 {
135                         compatible = "socionext,uniphier-fi2c";
136                         status = "disabled";
137                         reg = <0x58781000 0x80>;
138                         #address-cells = <1>;
139                         #size-cells = <0>;
140                         pinctrl-names = "default";
141                         pinctrl-0 = <&pinctrl_i2c1>;
142                         interrupts = <0 42 4>;
143                         clocks = <&i2c_clk>;
144                         clock-frequency = <100000>;
145                 };
146
147                 i2c2: i2c@58782000 {
148                         compatible = "socionext,uniphier-fi2c";
149                         status = "disabled";
150                         reg = <0x58782000 0x80>;
151                         #address-cells = <1>;
152                         #size-cells = <0>;
153                         pinctrl-names = "default";
154                         pinctrl-0 = <&pinctrl_i2c2>;
155                         interrupts = <0 43 4>;
156                         clocks = <&i2c_clk>;
157                         clock-frequency = <100000>;
158                 };
159
160                 i2c3: i2c@58783000 {
161                         compatible = "socionext,uniphier-fi2c";
162                         status = "disabled";
163                         reg = <0x58783000 0x80>;
164                         #address-cells = <1>;
165                         #size-cells = <0>;
166                         pinctrl-names = "default";
167                         pinctrl-0 = <&pinctrl_i2c3>;
168                         interrupts = <0 44 4>;
169                         clocks = <&i2c_clk>;
170                         clock-frequency = <100000>;
171                 };
172
173                 /* chip-internal connection for DMD */
174                 i2c4: i2c@58784000 {
175                         compatible = "socionext,uniphier-fi2c";
176                         reg = <0x58784000 0x80>;
177                         #address-cells = <1>;
178                         #size-cells = <0>;
179                         interrupts = <0 45 4>;
180                         clocks = <&i2c_clk>;
181                         clock-frequency = <400000>;
182                 };
183
184                 /* chip-internal connection for STM */
185                 i2c5: i2c@58785000 {
186                         compatible = "socionext,uniphier-fi2c";
187                         reg = <0x58785000 0x80>;
188                         #address-cells = <1>;
189                         #size-cells = <0>;
190                         interrupts = <0 25 4>;
191                         clocks = <&i2c_clk>;
192                         clock-frequency = <400000>;
193                 };
194
195                 /* chip-internal connection for HDMI */
196                 i2c6: i2c@58786000 {
197                         compatible = "socionext,uniphier-fi2c";
198                         reg = <0x58786000 0x80>;
199                         #address-cells = <1>;
200                         #size-cells = <0>;
201                         interrupts = <0 26 4>;
202                         clocks = <&i2c_clk>;
203                         clock-frequency = <400000>;
204                 };
205
206                 system-bus-controller-misc@59800000 {
207                         compatible = "socionext,uniphier-system-bus-controller-misc",
208                                      "syscon";
209                         reg = <0x59800000 0x2000>;
210                 };
211
212                 pinctrl: pinctrl@5f801000 {
213                         compatible = "socionext,proxstream2-pinctrl", "syscon";
214                         reg = <0x5f801000 0xe00>;
215                 };
216
217                 timer@60000200 {
218                         compatible = "arm,cortex-a9-global-timer";
219                         reg = <0x60000200 0x20>;
220                         interrupts = <1 11 0xf04>;
221                         clocks = <&arm_timer_clk>;
222                 };
223
224                 timer@60000600 {
225                         compatible = "arm,cortex-a9-twd-timer";
226                         reg = <0x60000600 0x20>;
227                         interrupts = <1 13 0xf04>;
228                         clocks = <&arm_timer_clk>;
229                 };
230
231                 intc: interrupt-controller@60001000 {
232                         compatible = "arm,cortex-a9-gic";
233                         #interrupt-cells = <3>;
234                         interrupt-controller;
235                         reg = <0x60001000 0x1000>,
236                               <0x60000100 0x100>;
237                 };
238         };
239 };
240
241 /include/ "uniphier-pinctrl.dtsi"