arch/arm/include/asm/arch-exynos/ehci.h

   1 /*
   2  * SAMSUNG EXYNOS USB HOST EHCI Controller
   3  *
   4  * Copyright (C) 2012 Samsung Electronics Co.Ltd
   5  *      Vivek Gautam <gautam.vivek@samsung.com>
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #ifndef __ASM_ARM_ARCH_EHCI_H__
  11 #define __ASM_ARM_ARCH_EHCI_H__
  12
  13 #define CLK_24MHZ               5
  14
  15 #define HOST_CTRL0_PHYSWRSTALL                  (1 << 31)
  16 #define HOST_CTRL0_COMMONON_N                   (1 << 9)
  17 #define HOST_CTRL0_SIDDQ                        (1 << 6)
  18 #define HOST_CTRL0_FORCESLEEP                   (1 << 5)
  19 #define HOST_CTRL0_FORCESUSPEND                 (1 << 4)
  20 #define HOST_CTRL0_WORDINTERFACE                (1 << 3)
  21 #define HOST_CTRL0_UTMISWRST                    (1 << 2)
  22 #define HOST_CTRL0_LINKSWRST                    (1 << 1)
  23 #define HOST_CTRL0_PHYSWRST                     (1 << 0)
  24
  25 #define HOST_CTRL0_FSEL_MASK                    (7 << 16)
  26
  27 #define EHCICTRL_ENAINCRXALIGN                  (1 << 29)
  28 #define EHCICTRL_ENAINCR4                       (1 << 28)
  29 #define EHCICTRL_ENAINCR8                       (1 << 27)
  30 #define EHCICTRL_ENAINCR16                      (1 << 26)
  31
  32 /* Register map for PHY control */
  33 struct exynos_usb_phy {
  34         unsigned int usbphyctrl0;
  35         unsigned int usbphytune0;
  36         unsigned int reserved1[2];
  37         unsigned int hsicphyctrl1;
  38         unsigned int hsicphytune1;
  39         unsigned int reserved2[2];
  40         unsigned int hsicphyctrl2;
  41         unsigned int hsicphytune2;
  42         unsigned int reserved3[2];
  43         unsigned int ehcictrl;
  44         unsigned int ohcictrl;
  45         unsigned int usbotgsys;
  46         unsigned int reserved4;
  47         unsigned int usbotgtune;
  48 };
  49
  50 /* Switch on the VBUS power. */
  51 int board_usb_vbus_init(void);
  52
  53 #endif /* __ASM_ARM_ARCH_EHCI_H__ */