2 * Copyright (C) 2012-2015 Freescale Semiconductor, Inc. All Rights Reserved.
4 * SPDX-License-Identifier: GPL-2.0+
8 #ifndef __ARCH_MX6_HAB_H
9 #define __ARCH_MX6_HAB_H
11 #ifdef CONFIG_SECURE_BOOT
13 #include <linux/types.h>
14 #include <asm/arch/sys_proto.h>
16 int get_hab_status(void);
18 /* -------- start of HAB API updates ------------*/
19 /* The following are taken from HAB4 SIS */
21 /* Status definitions */
29 /* Security Configuration definitions */
31 HAB_CFG_RETURN = 0x33, /* Field Return IC */
32 HAB_CFG_OPEN = 0xf0, /* Non-secure IC */
33 HAB_CFG_CLOSED = 0xcc /* Secure IC */
36 /* State definitions */
38 HAB_STATE_INITIAL = 0x33, /* Initialising state (transitory) */
39 HAB_STATE_CHECK = 0x55, /* Check state (non-secure) */
40 HAB_STATE_NONSECURE = 0x66, /* Non-secure state */
41 HAB_STATE_TRUSTED = 0x99, /* Trusted state */
42 HAB_STATE_SECURE = 0xaa, /* Secure state */
43 HAB_STATE_FAIL_SOFT = 0xcc, /* Soft fail state */
44 HAB_STATE_FAIL_HARD = 0xff, /* Hard fail state (terminal) */
45 HAB_STATE_NONE = 0xf0, /* No security state machine */
50 HAB_TGT_MEMORY = 0x0f, /* Check memory white list */
51 HAB_TGT_PERIPHERAL = 0xf0, /* Check peripheral white list*/
52 HAB_TGT_ANY = 0x55, /**< Check memory & peripheral white list */
55 enum HAB_FUNC_OFFSETS {
60 HAB_RVT_AUTHENTICATE_IMAGE,
65 HAB_RVT_REPORT_STATUS,
70 HAB_RSN_ANY = 0x00, /* Match any reason */
71 HAB_ENG_FAIL = 0x30, /* Engine failure */
72 HAB_INV_ADDRESS = 0x22, /* Invalid address: access denied */
73 HAB_INV_ASSERTION = 0x0c, /* Invalid assertion */
74 HAB_INV_CALL = 0x28, /* Function called out of sequence */
75 HAB_INV_CERTIFICATE = 0x21, /* Invalid certificate */
76 HAB_INV_COMMAND = 0x06, /* Invalid command: command malformed */
77 HAB_INV_CSF = 0x11, /* Invalid csf */
78 HAB_INV_DCD = 0x27, /* Invalid dcd */
79 HAB_INV_INDEX = 0x0f, /* Invalid index: access denied */
80 HAB_INV_IVT = 0x05, /* Invalid ivt */
81 HAB_INV_KEY = 0x1d, /* Invalid key */
82 HAB_INV_RETURN = 0x1e, /* Failed callback function */
83 HAB_INV_SIGNATURE = 0x18, /* Invalid signature */
84 HAB_INV_SIZE = 0x17, /* Invalid data size */
85 HAB_MEM_FAIL = 0x2e, /* Memory failure */
86 HAB_OVR_COUNT = 0x2b, /* Expired poll count */
87 HAB_OVR_STORAGE = 0x2d, /* Exhausted storage region */
88 HAB_UNS_ALGORITHM = 0x12, /* Unsupported algorithm */
89 HAB_UNS_COMMAND = 0x03, /* Unsupported command */
90 HAB_UNS_ENGINE = 0x0a, /* Unsupported engine */
91 HAB_UNS_ITEM = 0x24, /* Unsupported configuration item */
92 HAB_UNS_KEY = 0x1b, /* Unsupported key type/parameters */
93 HAB_UNS_PROTOCOL = 0x14, /* Unsupported protocol */
94 HAB_UNS_STATE = 0x09, /* Unsuitable state */
99 HAB_CTX_ANY = 0x00, /* Match any context */
100 HAB_CTX_FAB = 0xff, /* Event logged in hab_fab_test() */
101 HAB_CTX_ENTRY = 0xe1, /* Event logged in hab_rvt.entry() */
102 HAB_CTX_TARGET = 0x33, /* Event logged in hab_rvt.check_target() */
103 HAB_CTX_AUTHENTICATE = 0x0a, /* Logged in hab_rvt.authenticate_image() */
104 HAB_CTX_DCD = 0xdd, /* Event logged in hab_rvt.run_dcd() */
105 HAB_CTX_CSF = 0xcf, /* Event logged in hab_rvt.run_csf() */
106 HAB_CTX_COMMAND = 0xc0, /* Event logged executing csf/dcd command */
107 HAB_CTX_AUT_DAT = 0xdb, /* Authenticated data block */
108 HAB_CTX_ASSERT = 0xa0, /* Event logged in hab_rvt.assert() */
109 HAB_CTX_EXIT = 0xee, /* Event logged in hab_rvt.exit() */
113 /*Function prototype description*/
114 typedef enum hab_status hab_rvt_report_event_t(enum hab_status, uint32_t,
116 typedef enum hab_status hab_rvt_report_status_t(enum hab_config *,
118 typedef enum hab_status hab_loader_callback_f_t(void**, size_t*, const void*);
119 typedef enum hab_status hab_rvt_entry_t(void);
120 typedef enum hab_status hab_rvt_exit_t(void);
121 typedef enum hab_status hab_rvt_check_target_t(enum hab_target, const void *,
124 typedef void *hab_rvt_authenticate_image_t(uint8_t, ptrdiff_t,
125 void **, size_t *, hab_loader_callback_f_t);
127 typedef enum hab_status hab_rvt_run_dcd_t(const uint8_t *dcd);
129 typedef enum hab_status hab_rvt_run_csf_t(const uint8_t *csf, uint8_t cid);
131 typedef enum hab_status hab_rvt_assert_t(uint32_t, const void *,
134 typedef enum hab_status hab_rvt_report_event_t(enum hab_status, uint32_t,
137 typedef enum hab_status hab_rvt_report_status_t(enum hab_config *,
140 typedef void hapi_clock_init_t(void);
142 #define HAB_ENG_ANY 0x00 /* Select first compatible engine */
143 #define HAB_ENG_SCC 0x03 /* Security controller */
144 #define HAB_ENG_RTIC 0x05 /* Run-time integrity checker */
145 #define HAB_ENG_SAHARA 0x06 /* Crypto accelerator */
146 #define HAB_ENG_CSU 0x0a /* Central Security Unit */
147 #define HAB_ENG_SRTC 0x0c /* Secure clock */
148 #define HAB_ENG_DCP 0x1b /* Data Co-Processor */
149 #define HAB_ENG_CAAM 0x1d /* CAAM */
150 #define HAB_ENG_SNVS 0x1e /* Secure Non-Volatile Storage */
151 #define HAB_ENG_OCOTP 0x21 /* Fuse controller */
152 #define HAB_ENG_DTCP 0x22 /* DTCP co-processor */
153 #define HAB_ENG_ROM 0x36 /* Protected ROM area */
154 #define HAB_ENG_HDCP 0x24 /* HDCP co-processor */
155 #define HAB_ENG_RTL 0x77 /* RTL simulation engine */
156 #define HAB_ENG_SW 0xff /* Software engine */
158 static inline void **hab_rvt_base(void)
161 int cpu_type = get_cpu_type();
163 const uint32_t mask = 0xfc0000ff;
168 if (rev >= CHIP_REV_1_5)
174 if (rev >= CHIP_REV_1_2)
179 case MXC_CPU_MX6SOLO:
187 printf("Unsupported CPU type: %02x\n", cpu_type);
191 if (((rev = readl(base)) & mask) != cpu_to_be32(0xdd000040)) {
192 printf("Invalid RVT @ %08lx: %08x:%08x\n",
193 base, rev, rev & mask);
196 return (void **)base;
199 #define HAB_CID_ROM 0 /**< ROM Caller ID */
200 #define HAB_CID_UBOOT 1 /**< UBOOT Caller ID*/
202 /* ----------- end of HAB API updates ------------*/
204 #define hab_rvt_entry_p \
205 ((hab_rvt_entry_t *)hab_rvt_base()[HAB_RVT_ENTRY])
207 #define hab_rvt_exit_p \
208 ((hab_rvt_exit_t *)hab_rvt_base()[HAB_RVT_EXIT])
210 #define hab_rvt_check_target_p \
211 ((hab_rvt_check_target_t*)hab_rvt_base()[HAB_RVT_CHECK_TARGET])
213 #define hab_rvt_authenticate_image_p \
214 ((hab_rvt_authenticate_image_t *)hab_rvt_base()[HAB_RVT_AUTHENTICATE_IMAGE])
216 #define hab_rvt_run_dcd_p \
217 ((hab_rvt_run_dcd_t*)hab_rvt_base()[HAB_RVT_RUN_DCD])
219 #define hab_rvt_run_csf_p \
220 ((hab_rvt_run_csf_t*)hab_rvt_base()[HAB_RVT_RUN_CSF])
222 #define hab_rvt_assert_p \
223 ((hab_rvt_assert_t*)hab_rvt_base()[HAB_RVT_ASSERT])
225 #define hab_rvt_report_event_p \
226 ((hab_rvt_report_event_t*)hab_rvt_base()[HAB_RVT_REPORT_EVENT])
228 #define hab_rvt_report_status_p \
229 ((hab_rvt_report_status_t*)hab_rvt_base()[HAB_RVT_REPORT_STATUS])
231 #define HAB_FUNC(n, rt) \
232 static inline rt hab_rvt_##n(void) \
234 if (hab_rvt_base() == NULL) \
236 return hab_rvt_##n##_p(); \
239 #define HAB_FUNC1(n, rt, t1) \
240 static inline rt hab_rvt_##n(t1 p1) \
242 if (hab_rvt_base() == NULL) \
244 return hab_rvt_##n##_p(p1); \
247 #define HAB_FUNC2(n, rt, t1, t2) \
248 static inline rt hab_rvt_##n(t1 p1, t2 p2) \
250 if (hab_rvt_base() == NULL) \
252 return hab_rvt_##n##_p(p1, p2); \
255 #define HAB_FUNC3(n, rt, t1, t2, t3) \
256 static inline rt hab_rvt_##n(t1 p1, t2 p2, t3 p3) \
258 if (hab_rvt_base() == NULL) \
260 return hab_rvt_##n##_p(p1, p2, p3); \
263 #define HAB_FUNC4(n, rt, t1, t2, t3, t4) \
264 static inline rt hab_rvt_##n(t1 p1, t2 p2, t3 p3, t4 p4) \
266 if (hab_rvt_base() == NULL) \
268 return hab_rvt_##n##_p(p1, p2, p3, p4); \
271 #define HAB_FUNC5(n, rt, t1, t2, t3, t4, t5) \
272 static inline rt hab_rvt_##n(t1 p1, t2 p2, t3 p3, t4 p4, t5 p5) \
274 if (hab_rvt_base() == NULL) \
276 return hab_rvt_##n##_p(p1, p2, p3, p4, p5); \
279 #else /* CONFIG_SECURE_BOOT */
281 static inline int get_hab_status(void)
286 #endif /* CONFIG_SECURE_BOOT */
287 #endif /* __ARCH_MX6_HAB_H */