arch/x86/dts/bayleybay.dts

   1 /*
   2  * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 /dts-v1/;
   8
   9 #include <dt-bindings/gpio/x86-gpio.h>
  10
  11 /include/ "skeleton.dtsi"
  12 /include/ "serial.dtsi"
  13 /include/ "rtc.dtsi"
  14
  15 / {
  16         model = "Intel Bayley Bay";
  17         compatible = "intel,bayleybay", "intel,baytrail";
  18
  19         aliases {
  20                 serial0 = &serial;
  21                 spi0 = "/spi";
  22         };
  23
  24         config {
  25                 silent_console = <0>;
  26         };
  27
  28         chosen {
  29                 stdout-path = "/serial";
  30         };
  31
  32         cpus {
  33                 #address-cells = <1>;
  34                 #size-cells = <0>;
  35
  36                 cpu@0 {
  37                         device_type = "cpu";
  38                         compatible = "intel,baytrail-cpu";
  39                         reg = <0>;
  40                         intel,apic-id = <0>;
  41                 };
  42
  43                 cpu@1 {
  44                         device_type = "cpu";
  45                         compatible = "intel,baytrail-cpu";
  46                         reg = <1>;
  47                         intel,apic-id = <2>;
  48                 };
  49
  50                 cpu@2 {
  51                         device_type = "cpu";
  52                         compatible = "intel,baytrail-cpu";
  53                         reg = <2>;
  54                         intel,apic-id = <4>;
  55                 };
  56
  57                 cpu@3 {
  58                         device_type = "cpu";
  59                         compatible = "intel,baytrail-cpu";
  60                         reg = <3>;
  61                         intel,apic-id = <6>;
  62                 };
  63         };
  64
  65         spi {
  66                 #address-cells = <1>;
  67                 #size-cells = <0>;
  68                 compatible = "intel,ich-spi";
  69                 spi-flash@0 {
  70                         reg = <0>;
  71                         compatible = "winbond,w25q64dw", "spi-flash";
  72                         memory-map = <0xff800000 0x00800000>;
  73                 };
  74         };
  75
  76         gpioa {
  77                 compatible = "intel,ich6-gpio";
  78                 u-boot,dm-pre-reloc;
  79                 reg = <0 0x20>;
  80                 bank-name = "A";
  81         };
  82
  83         gpiob {
  84                 compatible = "intel,ich6-gpio";
  85                 u-boot,dm-pre-reloc;
  86                 reg = <0x20 0x20>;
  87                 bank-name = "B";
  88         };
  89
  90         gpioc {
  91                 compatible = "intel,ich6-gpio";
  92                 u-boot,dm-pre-reloc;
  93                 reg = <0x40 0x20>;
  94                 bank-name = "C";
  95         };
  96
  97         gpiod {
  98                 compatible = "intel,ich6-gpio";
  99                 u-boot,dm-pre-reloc;
 100                 reg = <0x60 0x20>;
 101                 bank-name = "D";
 102         };
 103
 104         gpioe {
 105                 compatible = "intel,ich6-gpio";
 106                 u-boot,dm-pre-reloc;
 107                 reg = <0x80 0x20>;
 108                 bank-name = "E";
 109         };
 110
 111         gpiof {
 112                 compatible = "intel,ich6-gpio";
 113                 u-boot,dm-pre-reloc;
 114                 reg = <0xA0 0x20>;
 115                 bank-name = "F";
 116         };
 117
 118         pci {
 119                 compatible = "pci-x86";
 120                 #address-cells = <3>;
 121                 #size-cells = <2>;
 122                 u-boot,dm-pre-reloc;
 123                 ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000
 124                           0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000
 125                           0x01000000 0x0 0x2000 0x2000 0 0xe000>;
 126         };
 127
 128         microcode {
 129                 update@0 {
 130 #include "microcode/m0230671117.dtsi"
 131                 };
 132         };
 133
 134 };