arch/x86/dts/qemu-x86_i440fx.dts

   1 /*
   2  * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 /dts-v1/;
   8
   9 #include <dt-bindings/interrupt-router/intel-irq.h>
  10
  11 /include/ "skeleton.dtsi"
  12 /include/ "serial.dtsi"
  13 /include/ "rtc.dtsi"
  14
  15 / {
  16         model = "QEMU x86 (I440FX)";
  17         compatible = "qemu,x86";
  18
  19         config {
  20                 silent_console = <0>;
  21         };
  22
  23         chosen {
  24                 stdout-path = "/serial";
  25         };
  26
  27         cpus {
  28                 #address-cells = <1>;
  29                 #size-cells = <0>;
  30
  31                 cpu@0 {
  32                         device_type = "cpu";
  33                         compatible = "cpu-x86";
  34                         reg = <0>;
  35                         intel,apic-id = <0>;
  36                 };
  37
  38                 cpu@1 {
  39                         device_type = "cpu";
  40                         compatible = "cpu-x86";
  41                         reg = <1>;
  42                         intel,apic-id = <1>;
  43                 };
  44         };
  45
  46         pci {
  47                 compatible = "pci-x86";
  48                 #address-cells = <3>;
  49                 #size-cells = <2>;
  50                 u-boot,dm-pre-reloc;
  51                 ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000
  52                         0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
  53                         0x01000000 0x0 0x2000 0x2000 0 0xe000>;
  54
  55                 irq-router@1,0 {
  56                         reg = <0x00000800 0 0 0 0>;
  57                         compatible = "intel,irq-router";
  58                         intel,pirq-config = "pci";
  59                         intel,pirq-link = <0x60 4>;
  60                         intel,pirq-mask = <0x0e40>;
  61                         intel,pirq-routing = <
  62                                 /* PIIX UHCI */
  63                                 PCI_BDF(0, 1, 2) INTD PIRQD
  64                                 /* e1000 NIC */
  65                                 PCI_BDF(0, 3, 0) INTA PIRQC
  66                         >;
  67                 };
  68         };
  69
  70 };