board/ait/cam_enc_4xx/cam_enc_4xx.c

   1 /*
   2  * Copyright (C) 2009 Texas Instruments Incorporated
   3  *
   4  * Copyright (C) 2011
   5  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20  */
  21
  22 #include <common.h>
  23 #include <linux/mtd/nand.h>
  24 #include <nand.h>
  25 #include <miiphy.h>
  26 #include <netdev.h>
  27 #include <asm/io.h>
  28 #include <asm/arch/hardware.h>
  29 #include <asm/arch/nand_defs.h>
  30 #include <asm/arch/davinci_misc.h>
  31 #ifdef CONFIG_DAVINCI_MMC
  32 #include <mmc.h>
  33 #include <asm/arch/sdmmc_defs.h>
  34 #endif
  35
  36 DECLARE_GLOBAL_DATA_PTR;
  37
  38 #ifndef CONFIG_SPL_BUILD
  39 int dram_init(void)
  40 {
  41         /* dram_init must store complete ramsize in gd->ram_size */
  42         gd->ram_size = get_ram_size(
  43                         (void *)CONFIG_SYS_SDRAM_BASE,
  44                         CONFIG_MAX_RAM_BANK_SIZE);
  45         return 0;
  46 }
  47
  48 void dram_init_banksize(void)
  49 {
  50         gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
  51         gd->bd->bi_dram[0].size = gd->ram_size;
  52 }
  53
  54 static struct davinci_timer *timer =
  55         (struct davinci_timer *)DAVINCI_TIMER3_BASE;
  56
  57 static unsigned long get_timer_val(void)
  58 {
  59         unsigned long now = readl(&timer->tim34);
  60
  61         return now;
  62 }
  63
  64 static void stop_timer(void)
  65 {
  66         writel(0x0, &timer->tcr);
  67         return;
  68 }
  69
  70 int checkboard(void)
  71 {
  72         printf("Board: AIT CAM ENC 4XX\n");
  73         return 0;
  74 }
  75
  76 int board_init(void)
  77 {
  78         gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
  79
  80         return 0;
  81 }
  82
  83 #ifdef CONFIG_DRIVER_TI_EMAC
  84 int board_eth_init(bd_t *bis)
  85 {
  86         davinci_emac_initialize();
  87
  88         return 0;
  89 }
  90 #endif
  91
  92 #ifdef CONFIG_NAND_DAVINCI
  93 static int
  94 davinci_std_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
  95                                    uint8_t *buf, int page)
  96 {
  97         struct nand_chip *this = mtd->priv;
  98         int i, eccsize = chip->ecc.size;
  99         int eccbytes = chip->ecc.bytes;
 100         int eccsteps = chip->ecc.steps;
 101         uint8_t *p = buf;
 102         uint8_t *oob = chip->oob_poi;
 103
 104         chip->cmdfunc(mtd, NAND_CMD_READOOB, 0x0, page & this->pagemask);
 105
 106         chip->read_buf(mtd, oob, mtd->oobsize);
 107
 108         chip->cmdfunc(mtd, NAND_CMD_READ0, 0x0, page & this->pagemask);
 109
 110
 111         for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
 112                 int stat;
 113
 114                 chip->ecc.hwctl(mtd, NAND_ECC_READ);
 115                 chip->read_buf(mtd, p, eccsize);
 116                 chip->ecc.hwctl(mtd, NAND_ECC_READSYN);
 117
 118                 if (chip->ecc.prepad)
 119                         oob += chip->ecc.prepad;
 120
 121                 stat = chip->ecc.correct(mtd, p, oob, NULL);
 122
 123                 if (stat == -1)
 124                         mtd->ecc_stats.failed++;
 125                 else
 126                         mtd->ecc_stats.corrected += stat;
 127
 128                 oob += eccbytes;
 129
 130                 if (chip->ecc.postpad)
 131                         oob += chip->ecc.postpad;
 132         }
 133
 134         /* Calculate remaining oob bytes */
 135         i = mtd->oobsize - (oob - chip->oob_poi);
 136         if (i)
 137                 chip->read_buf(mtd, oob, i);
 138
 139         return 0;
 140 }
 141
 142 static void davinci_std_write_page_syndrome(struct mtd_info *mtd,
 143                                     struct nand_chip *chip, const uint8_t *buf)
 144 {
 145         unsigned char davinci_ecc_buf[NAND_MAX_OOBSIZE];
 146         struct nand_chip *this = mtd->priv;
 147         int i, eccsize = chip->ecc.size;
 148         int eccbytes = chip->ecc.bytes;
 149         int eccsteps = chip->ecc.steps;
 150         int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
 151         int offset = 0;
 152         const uint8_t *p = buf;
 153         uint8_t *oob = chip->oob_poi;
 154
 155         for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
 156                 chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
 157                 chip->write_buf(mtd, p, eccsize);
 158
 159                 /* Calculate ECC without prepad */
 160                 chip->ecc.calculate(mtd, p, oob + chip->ecc.prepad);
 161
 162                 if (chip->ecc.prepad) {
 163                         offset = (chip->ecc.steps - eccsteps) * chunk;
 164                         memcpy(&davinci_ecc_buf[offset], oob, chip->ecc.prepad);
 165                         oob += chip->ecc.prepad;
 166                 }
 167
 168                 offset = ((chip->ecc.steps - eccsteps) * chunk) +
 169                                 chip->ecc.prepad;
 170                 memcpy(&davinci_ecc_buf[offset], oob, eccbytes);
 171                 oob += eccbytes;
 172
 173                 if (chip->ecc.postpad) {
 174                         offset = ((chip->ecc.steps - eccsteps) * chunk) +
 175                                         chip->ecc.prepad + eccbytes;
 176                         memcpy(&davinci_ecc_buf[offset], oob,
 177                                 chip->ecc.postpad);
 178                         oob += chip->ecc.postpad;
 179                 }
 180         }
 181
 182         /*
 183          * Write the sparebytes into the page once
 184          * all eccsteps have been covered
 185          */
 186         for (i = 0; i < mtd->oobsize; i++)
 187                 writeb(davinci_ecc_buf[i], this->IO_ADDR_W);
 188
 189         /* Calculate remaining oob bytes */
 190         i = mtd->oobsize - (oob - chip->oob_poi);
 191         if (i)
 192                 chip->write_buf(mtd, oob, i);
 193 }
 194
 195 static int davinci_std_write_oob_syndrome(struct mtd_info *mtd,
 196                                    struct nand_chip *chip, int page)
 197 {
 198         int pos, status = 0;
 199         const uint8_t *bufpoi = chip->oob_poi;
 200
 201         pos = mtd->writesize;
 202
 203         chip->cmdfunc(mtd, NAND_CMD_SEQIN, pos, page);
 204
 205         chip->write_buf(mtd, bufpoi, mtd->oobsize);
 206
 207         chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
 208         status = chip->waitfunc(mtd, chip);
 209
 210         return status & NAND_STATUS_FAIL ? -1 : 0;
 211 }
 212
 213 static int davinci_std_read_oob_syndrome(struct mtd_info *mtd,
 214         struct nand_chip *chip, int page, int sndcmd)
 215 {
 216         struct nand_chip *this = mtd->priv;
 217         uint8_t *buf = chip->oob_poi;
 218         uint8_t *bufpoi = buf;
 219
 220         chip->cmdfunc(mtd, NAND_CMD_READOOB, 0x0, page & this->pagemask);
 221
 222         chip->read_buf(mtd, bufpoi, mtd->oobsize);
 223
 224         return 1;
 225 }
 226
 227 static void nand_dm365evm_select_chip(struct mtd_info *mtd, int chip)
 228 {
 229         struct nand_chip        *this = mtd->priv;
 230         unsigned long           wbase = (unsigned long) this->IO_ADDR_W;
 231         unsigned long           rbase = (unsigned long) this->IO_ADDR_R;
 232
 233         if (chip == 1) {
 234                 __set_bit(14, &wbase);
 235                 __set_bit(14, &rbase);
 236         } else {
 237                 __clear_bit(14, &wbase);
 238                 __clear_bit(14, &rbase);
 239         }
 240         this->IO_ADDR_W = (void *)wbase;
 241         this->IO_ADDR_R = (void *)rbase;
 242 }
 243
 244 int board_nand_init(struct nand_chip *nand)
 245 {
 246         davinci_nand_init(nand);
 247         nand->select_chip = nand_dm365evm_select_chip;
 248
 249         return 0;
 250 }
 251
 252 struct nand_ecc_ctrl org_ecc;
 253 static int notsaved = 1;
 254
 255 static int nand_switch_hw_func(int mode)
 256 {
 257         struct nand_chip *nand;
 258         struct mtd_info *mtd;
 259
 260         if (nand_curr_device < 0 ||
 261             nand_curr_device >= CONFIG_SYS_MAX_NAND_DEVICE ||
 262             !nand_info[nand_curr_device].name) {
 263                 printf("Error: Can't switch hw functions," \
 264                         " no devices available\n");
 265                 return -1;
 266         }
 267
 268         mtd = &nand_info[nand_curr_device];
 269         nand = mtd->priv;
 270
 271         if (mode == 0) {
 272                 printf("switching to uboot hw functions.\n");
 273                 memcpy(&nand->ecc, &org_ecc, sizeof(struct nand_ecc_ctrl));
 274         } else {
 275                 /* RBL */
 276                 printf("switching to RBL hw functions.\n");
 277                 if (notsaved == 1) {
 278                         memcpy(&org_ecc, &nand->ecc,
 279                                 sizeof(struct nand_ecc_ctrl));
 280                         notsaved = 0;
 281                 }
 282                 nand->ecc.mode = NAND_ECC_HW_SYNDROME;
 283                 nand->ecc.prepad = 6;
 284                 nand->ecc.read_page = davinci_std_read_page_syndrome;
 285                 nand->ecc.write_page = davinci_std_write_page_syndrome;
 286                 nand->ecc.read_oob = davinci_std_read_oob_syndrome;
 287                 nand->ecc.write_oob = davinci_std_write_oob_syndrome;
 288         }
 289         return mode;
 290 }
 291
 292 static int hwmode;
 293
 294 static int do_switch_ecc(cmd_tbl_t *cmdtp, int flag, int argc,
 295                 char *const argv[])
 296 {
 297         if (argc != 2)
 298                 goto usage;
 299         if (strncmp(argv[1], "rbl", 2) == 0)
 300                 hwmode = nand_switch_hw_func(1);
 301         else if (strncmp(argv[1], "uboot", 2) == 0)
 302                 hwmode = nand_switch_hw_func(0);
 303         else
 304                 goto usage;
 305
 306         return 0;
 307
 308 usage:
 309         printf("Usage: nandrbl %s\n", cmdtp->usage);
 310         return 1;
 311 }
 312
 313 U_BOOT_CMD(
 314         nandrbl, 2, 1,  do_switch_ecc,
 315         "switch between rbl/uboot NAND ECC calculation algorithm",
 316         "[rbl/uboot] - Switch between rbl/uboot NAND ECC algorithm"
 317 );
 318
 319
 320 #endif /* #ifdef CONFIG_NAND_DAVINCI */
 321
 322 #ifdef CONFIG_DAVINCI_MMC
 323 static struct davinci_mmc mmc_sd0 = {
 324         .reg_base       = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
 325         .input_clk      = 121500000,
 326         .host_caps      = MMC_MODE_4BIT,
 327         .voltages       = MMC_VDD_32_33 | MMC_VDD_33_34,
 328         .version        = MMC_CTLR_VERSION_2,
 329 };
 330
 331 int board_mmc_init(bd_t *bis)
 332 {
 333         int err;
 334
 335         /* Add slot-0 to mmc subsystem */
 336         err = davinci_mmc_init(bis, &mmc_sd0);
 337
 338         return err;
 339 }
 340 #endif
 341
 342 int board_late_init(void)
 343 {
 344         struct davinci_gpio *gpio = davinci_gpio_bank45;
 345
 346         /* 24MHz InputClock / 15 prediv -> 1.6 MHz timer running */
 347         while (get_timer_val() < 0x186a00)
 348                 ;
 349
 350         /* 1 sec reached -> stop timer, clear all LED */
 351         stop_timer();
 352         clrbits_le32(&gpio->out_data, CONFIG_CAM_ENC_LED_MASK);
 353         return 0;
 354 }
 355
 356 void reset_phy(void)
 357 {
 358         char *name = "GENERIC @ 0x00";
 359
 360         /* reset the phy */
 361         miiphy_reset(name, 0x0);
 362 }
 363
 364 #else /* #ifndef CONFIG_SPL_BUILD */
 365 static void cam_enc_4xx_set_all_led(void)
 366 {
 367         struct davinci_gpio *gpio = davinci_gpio_bank45;
 368
 369         setbits_le32(&gpio->out_data, CONFIG_CAM_ENC_LED_MASK);
 370 }
 371
 372 /*
 373  * TIMER 0 is used for tick
 374  */
 375 static struct davinci_timer *timer =
 376         (struct davinci_timer *)DAVINCI_TIMER3_BASE;
 377
 378 #define TIMER_LOAD_VAL  0xffffffff
 379 #define TIM_CLK_DIV     16
 380
 381 static int cam_enc_4xx_timer_init(void)
 382 {
 383         /* We are using timer34 in unchained 32-bit mode, full speed */
 384         writel(0x0, &timer->tcr);
 385         writel(0x0, &timer->tgcr);
 386         writel(0x06 | ((TIM_CLK_DIV - 1) << 8), &timer->tgcr);
 387         writel(0x0, &timer->tim34);
 388         writel(TIMER_LOAD_VAL, &timer->prd34);
 389         writel(2 << 22, &timer->tcr);
 390         return 0;
 391 }
 392
 393 void board_gpio_init(void)
 394 {
 395         struct davinci_gpio *gpio;
 396
 397         cam_enc_4xx_set_all_led();
 398         cam_enc_4xx_timer_init();
 399         gpio = davinci_gpio_bank01;
 400         clrbits_le32(&gpio->dir, ~0xfdfffffe);
 401         /* clear LED D14 = GPIO25 */
 402         clrbits_le32(&gpio->out_data, 0x02000000);
 403         gpio = davinci_gpio_bank23;
 404         clrbits_le32(&gpio->dir, ~0x5ff0afef);
 405         /* set GPIO61 to 1 -> intern UART0 as Console */
 406         setbits_le32(&gpio->out_data, 0x20000000);
 407         /*
 408          * PHY out of reset GIO 50 = 1
 409          * NAND WP off GIO 51 = 1
 410          */
 411         setbits_le32(&gpio->out_data, 0x000c0004);
 412         gpio = davinci_gpio_bank45;
 413         clrbits_le32(&gpio->dir, ~(0xdb2fffff) | CONFIG_CAM_ENC_LED_MASK);
 414         /*
 415          * clear LED:
 416          * D17 = GPIO86
 417          * D11 = GPIO87
 418          * GPIO88
 419          * GPIO89
 420          * D13 = GPIO90
 421          * GPIO91
 422          */
 423         clrbits_le32(&gpio->out_data, CONFIG_CAM_ENC_LED_MASK);
 424         gpio = davinci_gpio_bank67;
 425         clrbits_le32(&gpio->dir, ~0x000007ff);
 426 }
 427
 428 /*
 429  * functions for the post memory test.
 430  */
 431 int arch_memory_test_prepare(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
 432 {
 433         *vstart = CONFIG_SYS_SDRAM_BASE;
 434         *size = PHYS_SDRAM_1_SIZE;
 435         *phys_offset = 0;
 436         return 0;
 437 }
 438
 439 void arch_memory_failure_handle(void)
 440 {
 441         cam_enc_4xx_set_all_led();
 442         puts("mem failure\n");
 443         while (1)
 444                 ;
 445 }
 446 #endif