]> git.kernelconcepts.de Git - karo-tx-uboot.git/blob - board/ait/cam_enc_4xx/cam_enc_4xx.c
Merge branch 'master' of git://git.denx.de/u-boot-arm
[karo-tx-uboot.git] / board / ait / cam_enc_4xx / cam_enc_4xx.c
1 /*
2  * Copyright (C) 2009 Texas Instruments Incorporated
3  *
4  * Copyright (C) 2011
5  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20  */
21
22 #include <common.h>
23 #include <linux/mtd/nand.h>
24 #include <nand.h>
25 #include <miiphy.h>
26 #include <netdev.h>
27 #include <asm/io.h>
28 #include <asm/arch/hardware.h>
29 #include <asm/arch/nand_defs.h>
30 #include <asm/arch/davinci_misc.h>
31 #ifdef CONFIG_DAVINCI_MMC
32 #include <mmc.h>
33 #include <asm/arch/sdmmc_defs.h>
34 #endif
35
36 DECLARE_GLOBAL_DATA_PTR;
37
38 #ifndef CONFIG_SPL_BUILD
39 static struct davinci_timer *timer =
40         (struct davinci_timer *)DAVINCI_TIMER3_BASE;
41
42 static unsigned long get_timer_val(void)
43 {
44         unsigned long now = readl(&timer->tim34);
45
46         return now;
47 }
48
49 static void stop_timer(void)
50 {
51         writel(0x0, &timer->tcr);
52         return;
53 }
54
55 int checkboard(void)
56 {
57         printf("Board: AIT CAM ENC 4XX\n");
58         return 0;
59 }
60
61 int board_init(void)
62 {
63         gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
64
65         return 0;
66 }
67
68 #ifdef CONFIG_DRIVER_TI_EMAC
69 int board_eth_init(bd_t *bis)
70 {
71         davinci_emac_initialize();
72
73         return 0;
74 }
75 #endif
76
77 #ifdef CONFIG_NAND_DAVINCI
78 static int
79 davinci_std_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
80                                    uint8_t *buf, int page)
81 {
82         struct nand_chip *this = mtd->priv;
83         int i, eccsize = chip->ecc.size;
84         int eccbytes = chip->ecc.bytes;
85         int eccsteps = chip->ecc.steps;
86         uint8_t *p = buf;
87         uint8_t *oob = chip->oob_poi;
88
89         chip->cmdfunc(mtd, NAND_CMD_READOOB, 0x0, page & this->pagemask);
90
91         chip->read_buf(mtd, oob, mtd->oobsize);
92
93         chip->cmdfunc(mtd, NAND_CMD_READ0, 0x0, page & this->pagemask);
94
95
96         for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
97                 int stat;
98
99                 chip->ecc.hwctl(mtd, NAND_ECC_READ);
100                 chip->read_buf(mtd, p, eccsize);
101                 chip->ecc.hwctl(mtd, NAND_ECC_READSYN);
102
103                 if (chip->ecc.prepad)
104                         oob += chip->ecc.prepad;
105
106                 stat = chip->ecc.correct(mtd, p, oob, NULL);
107
108                 if (stat == -1)
109                         mtd->ecc_stats.failed++;
110                 else
111                         mtd->ecc_stats.corrected += stat;
112
113                 oob += eccbytes;
114
115                 if (chip->ecc.postpad)
116                         oob += chip->ecc.postpad;
117         }
118
119         /* Calculate remaining oob bytes */
120         i = mtd->oobsize - (oob - chip->oob_poi);
121         if (i)
122                 chip->read_buf(mtd, oob, i);
123
124         return 0;
125 }
126
127 static void davinci_std_write_page_syndrome(struct mtd_info *mtd,
128                                     struct nand_chip *chip, const uint8_t *buf)
129 {
130         unsigned char davinci_ecc_buf[NAND_MAX_OOBSIZE];
131         struct nand_chip *this = mtd->priv;
132         int i, eccsize = chip->ecc.size;
133         int eccbytes = chip->ecc.bytes;
134         int eccsteps = chip->ecc.steps;
135         int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
136         int offset = 0;
137         const uint8_t *p = buf;
138         uint8_t *oob = chip->oob_poi;
139
140         for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
141                 chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
142                 chip->write_buf(mtd, p, eccsize);
143
144                 /* Calculate ECC without prepad */
145                 chip->ecc.calculate(mtd, p, oob + chip->ecc.prepad);
146
147                 if (chip->ecc.prepad) {
148                         offset = (chip->ecc.steps - eccsteps) * chunk;
149                         memcpy(&davinci_ecc_buf[offset], oob, chip->ecc.prepad);
150                         oob += chip->ecc.prepad;
151                 }
152
153                 offset = ((chip->ecc.steps - eccsteps) * chunk) +
154                                 chip->ecc.prepad;
155                 memcpy(&davinci_ecc_buf[offset], oob, eccbytes);
156                 oob += eccbytes;
157
158                 if (chip->ecc.postpad) {
159                         offset = ((chip->ecc.steps - eccsteps) * chunk) +
160                                         chip->ecc.prepad + eccbytes;
161                         memcpy(&davinci_ecc_buf[offset], oob,
162                                 chip->ecc.postpad);
163                         oob += chip->ecc.postpad;
164                 }
165         }
166
167         /*
168          * Write the sparebytes into the page once
169          * all eccsteps have been covered
170          */
171         for (i = 0; i < mtd->oobsize; i++)
172                 writeb(davinci_ecc_buf[i], this->IO_ADDR_W);
173
174         /* Calculate remaining oob bytes */
175         i = mtd->oobsize - (oob - chip->oob_poi);
176         if (i)
177                 chip->write_buf(mtd, oob, i);
178 }
179
180 static int davinci_std_write_oob_syndrome(struct mtd_info *mtd,
181                                    struct nand_chip *chip, int page)
182 {
183         int pos, status = 0;
184         const uint8_t *bufpoi = chip->oob_poi;
185
186         pos = mtd->writesize;
187
188         chip->cmdfunc(mtd, NAND_CMD_SEQIN, pos, page);
189
190         chip->write_buf(mtd, bufpoi, mtd->oobsize);
191
192         chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
193         status = chip->waitfunc(mtd, chip);
194
195         return status & NAND_STATUS_FAIL ? -1 : 0;
196 }
197
198 static int davinci_std_read_oob_syndrome(struct mtd_info *mtd,
199         struct nand_chip *chip, int page, int sndcmd)
200 {
201         struct nand_chip *this = mtd->priv;
202         uint8_t *buf = chip->oob_poi;
203         uint8_t *bufpoi = buf;
204
205         chip->cmdfunc(mtd, NAND_CMD_READOOB, 0x0, page & this->pagemask);
206
207         chip->read_buf(mtd, bufpoi, mtd->oobsize);
208
209         return 1;
210 }
211
212 static void nand_dm365evm_select_chip(struct mtd_info *mtd, int chip)
213 {
214         struct nand_chip        *this = mtd->priv;
215         unsigned long           wbase = (unsigned long) this->IO_ADDR_W;
216         unsigned long           rbase = (unsigned long) this->IO_ADDR_R;
217
218         if (chip == 1) {
219                 __set_bit(14, &wbase);
220                 __set_bit(14, &rbase);
221         } else {
222                 __clear_bit(14, &wbase);
223                 __clear_bit(14, &rbase);
224         }
225         this->IO_ADDR_W = (void *)wbase;
226         this->IO_ADDR_R = (void *)rbase;
227 }
228
229 int board_nand_init(struct nand_chip *nand)
230 {
231         davinci_nand_init(nand);
232         nand->select_chip = nand_dm365evm_select_chip;
233
234         return 0;
235 }
236
237 struct nand_ecc_ctrl org_ecc;
238 static int notsaved = 1;
239
240 static int nand_switch_hw_func(int mode)
241 {
242         struct nand_chip *nand;
243         struct mtd_info *mtd;
244
245         if (nand_curr_device < 0 ||
246             nand_curr_device >= CONFIG_SYS_MAX_NAND_DEVICE ||
247             !nand_info[nand_curr_device].name) {
248                 printf("Error: Can't switch hw functions," \
249                         " no devices available\n");
250                 return -1;
251         }
252
253         mtd = &nand_info[nand_curr_device];
254         nand = mtd->priv;
255
256         if (mode == 0) {
257                 printf("switching to uboot hw functions.\n");
258                 memcpy(&nand->ecc, &org_ecc, sizeof(struct nand_ecc_ctrl));
259         } else {
260                 /* RBL */
261                 printf("switching to RBL hw functions.\n");
262                 if (notsaved == 1) {
263                         memcpy(&org_ecc, &nand->ecc,
264                                 sizeof(struct nand_ecc_ctrl));
265                         notsaved = 0;
266                 }
267                 nand->ecc.mode = NAND_ECC_HW_SYNDROME;
268                 nand->ecc.prepad = 6;
269                 nand->ecc.read_page = davinci_std_read_page_syndrome;
270                 nand->ecc.write_page = davinci_std_write_page_syndrome;
271                 nand->ecc.read_oob = davinci_std_read_oob_syndrome;
272                 nand->ecc.write_oob = davinci_std_write_oob_syndrome;
273         }
274         return mode;
275 }
276
277 static int hwmode;
278
279 static int do_switch_ecc(cmd_tbl_t *cmdtp, int flag, int argc,
280                 char *const argv[])
281 {
282         if (argc != 2)
283                 goto usage;
284         if (strncmp(argv[1], "rbl", 2) == 0)
285                 hwmode = nand_switch_hw_func(1);
286         else if (strncmp(argv[1], "uboot", 2) == 0)
287                 hwmode = nand_switch_hw_func(0);
288         else
289                 goto usage;
290
291         return 0;
292
293 usage:
294         printf("Usage: nandrbl %s\n", cmdtp->usage);
295         return 1;
296 }
297
298 U_BOOT_CMD(
299         nandrbl, 2, 1,  do_switch_ecc,
300         "switch between rbl/uboot NAND ECC calculation algorithm",
301         "[rbl/uboot] - Switch between rbl/uboot NAND ECC algorithm"
302 );
303
304
305 #endif /* #ifdef CONFIG_NAND_DAVINCI */
306
307 #ifdef CONFIG_DAVINCI_MMC
308 static struct davinci_mmc mmc_sd0 = {
309         .reg_base       = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
310         .input_clk      = 121500000,
311         .host_caps      = MMC_MODE_4BIT,
312         .voltages       = MMC_VDD_32_33 | MMC_VDD_33_34,
313         .version        = MMC_CTLR_VERSION_2,
314 };
315
316 int board_mmc_init(bd_t *bis)
317 {
318         int err;
319
320         /* Add slot-0 to mmc subsystem */
321         err = davinci_mmc_init(bis, &mmc_sd0);
322
323         return err;
324 }
325 #endif
326
327 int board_late_init(void)
328 {
329         struct davinci_gpio *gpio = davinci_gpio_bank45;
330
331         /* 24MHz InputClock / 15 prediv -> 1.6 MHz timer running */
332         while (get_timer_val() < 0x186a00)
333                 ;
334
335         /* 1 sec reached -> stop timer, clear all LED */
336         stop_timer();
337         clrbits_le32(&gpio->out_data, CONFIG_CAM_ENC_LED_MASK);
338         return 0;
339 }
340
341 void reset_phy(void)
342 {
343         char *name = "GENERIC @ 0x00";
344
345         /* reset the phy */
346         miiphy_reset(name, 0x0);
347 }
348
349 #else /* #ifndef CONFIG_SPL_BUILD */
350 static void cam_enc_4xx_set_all_led(void)
351 {
352         struct davinci_gpio *gpio = davinci_gpio_bank45;
353
354         setbits_le32(&gpio->out_data, CONFIG_CAM_ENC_LED_MASK);
355 }
356
357 /*
358  * TIMER 0 is used for tick
359  */
360 static struct davinci_timer *timer =
361         (struct davinci_timer *)DAVINCI_TIMER3_BASE;
362
363 #define TIMER_LOAD_VAL  0xffffffff
364 #define TIM_CLK_DIV     16
365
366 static int cam_enc_4xx_timer_init(void)
367 {
368         /* We are using timer34 in unchained 32-bit mode, full speed */
369         writel(0x0, &timer->tcr);
370         writel(0x0, &timer->tgcr);
371         writel(0x06 | ((TIM_CLK_DIV - 1) << 8), &timer->tgcr);
372         writel(0x0, &timer->tim34);
373         writel(TIMER_LOAD_VAL, &timer->prd34);
374         writel(2 << 22, &timer->tcr);
375         return 0;
376 }
377
378 void board_gpio_init(void)
379 {
380         struct davinci_gpio *gpio;
381
382         cam_enc_4xx_set_all_led();
383         cam_enc_4xx_timer_init();
384         gpio = davinci_gpio_bank01;
385         clrbits_le32(&gpio->dir, ~0xfdfffffe);
386         /* clear LED D14 = GPIO25 */
387         clrbits_le32(&gpio->out_data, 0x02000000);
388         gpio = davinci_gpio_bank23;
389         clrbits_le32(&gpio->dir, ~0x5ff0afef);
390         /* set GPIO61 to 1 -> intern UART0 as Console */
391         setbits_le32(&gpio->out_data, 0x20000000);
392         /*
393          * PHY out of reset GIO 50 = 1
394          * NAND WP off GIO 51 = 1
395          */
396         setbits_le32(&gpio->out_data, 0x000c0004);
397         gpio = davinci_gpio_bank45;
398         clrbits_le32(&gpio->dir, ~(0xdb2fffff) | CONFIG_CAM_ENC_LED_MASK);
399         /*
400          * clear LED:
401          * D17 = GPIO86
402          * D11 = GPIO87
403          * GPIO88
404          * GPIO89
405          * D13 = GPIO90
406          * GPIO91
407          */
408         clrbits_le32(&gpio->out_data, CONFIG_CAM_ENC_LED_MASK);
409         gpio = davinci_gpio_bank67;
410         clrbits_le32(&gpio->dir, ~0x000007ff);
411 }
412
413 /*
414  * functions for the post memory test.
415  */
416 int arch_memory_test_prepare(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
417 {
418         *vstart = CONFIG_SYS_SDRAM_BASE;
419         *size = PHYS_SDRAM_1_SIZE;
420         *phys_offset = 0;
421         return 0;
422 }
423
424 void arch_memory_failure_handle(void)
425 {
426         cam_enc_4xx_set_all_led();
427         puts("mem failure\n");
428         while (1)
429                 ;
430 }
431 #endif