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ddr: altera: sdram: Make sdram_start and sdram_end into u32
[karo-tx-uboot.git] / board / altera / socfpga / qts / sequencer_auto_inst_init.h
1 /*
2  * Copyright Altera Corporation (C) 2012-2015
3  *
4  * SPDX-License-Identifier:    BSD-3-Clause
5  */
6
7 #ifdef CONFIG_SOCFPGA_ARRIA5
8 /* The if..else... is not required if generated by tools */
9 const u32 inst_rom_init[] = {
10         0x80000,
11         0x80680,
12         0x8180,
13         0x8200,
14         0x8280,
15         0x8300,
16         0x8380,
17         0x8100,
18         0x8480,
19         0x8500,
20         0x8580,
21         0x8600,
22         0x8400,
23         0x800,
24         0x8680,
25         0x880,
26         0xa680,
27         0x80680,
28         0x900,
29         0x80680,
30         0x980,
31         0x8680,
32         0x80680,
33         0xb68,
34         0xcce8,
35         0xae8,
36         0x8ce8,
37         0xb88,
38         0xec88,
39         0xa08,
40         0xac88,
41         0x80680,
42         0xce00,
43         0xcd80,
44         0xe700,
45         0xc00,
46         0x20ce0,
47         0x20ce0,
48         0x20ce0,
49         0x20ce0,
50         0xd00,
51         0x680,
52         0x680,
53         0x680,
54         0x680,
55         0x60e80,
56         0x61080,
57         0x61080,
58         0x61080,
59         0xa680,
60         0x8680,
61         0x80680,
62         0xce00,
63         0xcd80,
64         0xe700,
65         0xc00,
66         0x30ce0,
67         0x30ce0,
68         0x30ce0,
69         0x30ce0,
70         0xd00,
71         0x680,
72         0x680,
73         0x680,
74         0x680,
75         0x70e80,
76         0x71080,
77         0x71080,
78         0x71080,
79         0xa680,
80         0x8680,
81         0x80680,
82         0x1158,
83         0x6d8,
84         0x80680,
85         0x1168,
86         0x7e8,
87         0x7e8,
88         0x87e8,
89         0x40fe8,
90         0x410e8,
91         0x410e8,
92         0x410e8,
93         0x1168,
94         0x7e8,
95         0x7e8,
96         0xa7e8,
97         0x80680,
98         0x40e88,
99         0x41088,
100         0x41088,
101         0x41088,
102         0x40f68,
103         0x410e8,
104         0x410e8,
105         0x410e8,
106         0xa680,
107         0x40fe8,
108         0x410e8,
109         0x410e8,
110         0x410e8,
111         0x41008,
112         0x41088,
113         0x41088,
114         0x41088,
115         0x1100,
116         0xc680,
117         0x8680,
118         0xe680,
119         0x80680,
120         0x0,
121         0x8000,
122         0xa000,
123         0xc000,
124         0x80000,
125         0x80,
126         0x8080,
127         0xa080,
128         0xc080,
129         0x80080,
130         0x9180,
131         0x8680,
132         0xa680,
133         0x80680,
134         0x40f08,
135         0x80680
136 };
137 #else
138 const u32 inst_rom_init[] = {
139         0x80000,
140         0x80680,
141         0x8180,
142         0x8200,
143         0x8280,
144         0x8300,
145         0x8380,
146         0x8100,
147         0x8480,
148         0x8500,
149         0x8580,
150         0x8600,
151         0x8400,
152         0x800,
153         0x8680,
154         0x880,
155         0xa680,
156         0x80680,
157         0x900,
158         0x80680,
159         0x980,
160         0x8680,
161         0x80680,
162         0xb68,
163         0xcce8,
164         0xae8,
165         0x8ce8,
166         0xb88,
167         0xec88,
168         0xa08,
169         0xac88,
170         0x80680,
171         0xce00,
172         0xcd80,
173         0xe700,
174         0xc00,
175         0x20ce0,
176         0x20ce0,
177         0x20ce0,
178         0x20ce0,
179         0xd00,
180         0x680,
181         0x680,
182         0x680,
183         0x680,
184         0x60e80,
185         0x61080,
186         0x61080,
187         0x61080,
188         0xa680,
189         0x8680,
190         0x80680,
191         0xce00,
192         0xcd80,
193         0xe700,
194         0xc00,
195         0x30ce0,
196         0x30ce0,
197         0x30ce0,
198         0x30ce0,
199         0xd00,
200         0x680,
201         0x680,
202         0x680,
203         0x680,
204         0x70e80,
205         0x71080,
206         0x71080,
207         0x71080,
208         0xa680,
209         0x8680,
210         0x80680,
211         0x1158,
212         0x6d8,
213         0x80680,
214         0x1168,
215         0x7e8,
216         0x7e8,
217         0x87e8,
218         0x40fe8,
219         0x410e8,
220         0x410e8,
221         0x410e8,
222         0x1168,
223         0x7e8,
224         0x7e8,
225         0xa7e8,
226         0x80680,
227         0x40e88,
228         0x41088,
229         0x41088,
230         0x41088,
231         0x40f68,
232         0x410e8,
233         0x410e8,
234         0x410e8,
235         0xa680,
236         0x40fe8,
237         0x410e8,
238         0x410e8,
239         0x410e8,
240         0x41008,
241         0x41088,
242         0x41088,
243         0x41088,
244         0x1100,
245         0xc680,
246         0x8680,
247         0xe680,
248         0x80680,
249         0x0,
250         0x0,
251         0xa000,
252         0x8000,
253         0x80000,
254         0x80,
255         0x80,
256         0x80,
257         0x80,
258         0xa080,
259         0x8080,
260         0x80080,
261         0x9180,
262         0x8680,
263         0xa680,
264         0x80680,
265         0x40f08,
266         0x80680
267 };
268 #endif /* CONFIG_SOCFPGA_ARRIA5 */