1 /********************************************************************
3 * Unless otherwise specified, Copyright (C) 2004-2005 Barco Control Rooms
10 * Last ChangeLog Entry
12 * Revision 1.1.5.1 2011-02-28 14:41:59 lothar
13 * imported Freescale specific U-Boot additions for i.MX28,... release L2.6.31_10.08.01
15 * Revision 1.2 2005/02/21 12:48:58 mleeman
16 * update of copyright years (feedback wd)
18 * Revision 1.1 2005/02/14 09:23:46 mleeman
19 * - moved 'barcohydra' directory to a more generic barco; since we will be
20 * supporting and adding multiple boards
22 * Revision 1.2 2005/02/09 12:56:23 mleeman
23 * add generic header to track changes in sources
26 *******************************************************************/
30 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
32 * See file CREDITS for list of people who contributed to this
35 * This program is free software; you can redistribute it and/or
36 * modify it under the terms of the GNU General Public License as
37 * published by the Free Software Foundation; either version 2 of
38 * the License, or (at your option) any later version.
40 * This program is distributed in the hope that it will be useful,
41 * but WITHOUT ANY WARRANTY; without even the implied warranty of
42 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
43 * GNU General Public License for more details.
45 * You should have received a copy of the GNU General Public License
46 * along with this program; if not, write to the Free Software
47 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
51 /*-----------------------------------------------------------------------
52 * Timer value for timer 2, ICLK = 10
54 * SPEED_FCOUNT2 = GCLK / (16 * (TIMER_TMR_PS + 1))
55 * SPEED_TMR3_PS = (GCLK / (16 * SPEED_FCOUNT3)) - 1
57 * SPEED_FCOUNT2 timer 2 counting frequency
59 * SPEED_TMR2_PS prescaler
61 #define SPEED_TMR2_PS (250 - 1) /* divide by 250 */
63 /*-----------------------------------------------------------------------
66 * PIT_TIME = SPEED_PITC / PITRTCLK
69 #define SPEED_PITC (82 << 16) /* start counting from 82 */
72 * The new value for PTA is calculated from
74 * PTA = (gclk * Trefresh) / (2 ^ (2 * DFBRG) * PTP * NCS)
76 * gclk CPU clock (not bus clock !)
77 * Trefresh Refresh cycle * 4 (four word bursts used)
78 * DFBRG For normal mode (no clock reduction) always 0
79 * PTP Prescaler (already adjusted for no. of banks and 4K / 8K refresh)
80 * NCS Number of SDRAM banks (chip selects) on this UPM.