board/chromebook-x86/dts/link.dts

   1 /dts-v1/;
   2
   3 /include/ ARCH_CPU_DTS
   4
   5 / {
   6         #address-cells = <1>;
   7         #size-cells = <1>;
   8         model = "Google Link";
   9         compatible = "google,link", "intel,celeron-ivybridge";
  10
  11         config {
  12                silent_console = <0>;
  13         };
  14
  15         gpio: gpio {};
  16
  17         serial {
  18                 reg = <0x3f8 8>;
  19                 clock-frequency = <115200>;
  20         };
  21
  22         chosen { };
  23         memory { device_type = "memory"; reg = <0 0>; };
  24
  25         spi {
  26                 #address-cells = <1>;
  27                 #size-cells = <0>;
  28                 compatible = "intel,ich9";
  29                 spi-flash@0 {
  30                         reg = <0>;
  31                         compatible = "winbond,w25q64", "spi-flash";
  32                         memory-map = <0xff800000 0x00800000>;
  33                 };
  34         };
  35 };