2 * Copyright (c) 2009 Freescale Semiconductor
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 #include <asm/arch/mx25-regs.h>
40 REG 0x53F80008, 0x20034000 // ARM clk = 399, AHB clk = 133
42 /* Init Debug Board CS5 */
43 REG 0xB8002050, 0x0000D843
44 REG 0xB8002054, 0x22252521
45 REG 0xB8002058, 0x22220A00
47 /* MAX (Multi-Layer AHB Crossbar Switch) setup */
48 /* MAX - priority for MX25 is (SDHC2/SDMA)>USBOTG>RTIC>IAHB>DAHB */
51 str r1, [r0, #0x000] /* for S0 */
52 str r1, [r0, #0x100] /* for S1 */
53 str r1, [r0, #0x200] /* for S2 */
54 str r1, [r0, #0x300] /* for S3 */
55 str r1, [r0, #0x400] /* for S4 */
56 /* SGPCR - always park on last master */
58 str r1, [r0, #0x010] /* for S0 */
59 str r1, [r0, #0x110] /* for S1 */
60 str r1, [r0, #0x210] /* for S2 */
61 str r1, [r0, #0x310] /* for S3 */
62 str r1, [r0, #0x410] /* for S4 */
63 /* MGPCR - restore default values */
65 str r1, [r0, #0x800] /* for M0 */
66 str r1, [r0, #0x900] /* for M1 */
67 str r1, [r0, #0xA00] /* for M2 */
68 str r1, [r0, #0xB00] /* for M3 */
69 str r1, [r0, #0xC00] /* for M4 */
74 str r0, [r1] /* M3IF control reg */
76 /* default CLKO to 1/32 of the ARM core */
79 bic r1, r1, #0x00F00000
80 bic r1, r1, #0x7F000000
82 add r2, r2, #0x00200000
86 /* enable all the clocks */