2 * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
14 #ifndef __BOARD_FREESCALE_BOARD_MX51_3STACK_H__
15 #define __BOARD_FREESCALE_BOARD_MX51_3STACK_H__
18 * @defgroup BRDCFG_MX51 Board Configuration Options
23 * @file mx51_3stack/board-mx51_3stack.h
25 * @brief This file contains all the board level configuration options.
27 * It currently hold the options defined for MX51 3Stack Platform.
29 * @ingroup BRDCFG_MX51
33 #define PBC_LED_CTRL (0x20000)
34 #define PBC_SB_STAT (0x20008)
35 #define PBC_ID_AAAA (0x20040)
36 #define PBC_ID_5555 (0x20048)
37 #define PBC_VERSION (0x20050)
38 #define PBC_ID_CAFE (0x20058)
39 #define PBC_INT_STAT (0x20010)
40 #define PBC_INT_MASK (0x20038)
41 #define PBC_INT_REST (0x20020)
42 #define PBC_SW_RESET (0x20060)
45 #define LED_SWITCH_REG 0x00
47 #define SWITCH_BUTTONS_REG 0x08
48 /* status, interrupt */
49 #define INTR_STATUS_REG 0x10
50 #define INTR_MASK_REG 0x38
51 #define INTR_RESET_REG 0x20
52 /* magic word for debug CPLD */
53 #define MAGIC_NUMBER1_REG 0x40
54 #define MAGIC_NUMBER2_REG 0x48
55 /* CPLD code version */
56 #define CPLD_CODE_VER_REG 0x50
57 /* magic word for debug CPLD */
58 #define MAGIC_NUMBER3_REG 0x58
59 /* module reset register*/
60 #define MODULE_RESET_REG 0x60
61 /* CPU ID and Personality ID */
62 #define MCU_BOARD_ID_REG 0x68
64 #endif /* __BOARD_FREESCALE_BOARD_MX51_3STACK_H__ */