board/highbank/highbank.c

   1 /*
   2  * Copyright 2010-2011 Calxeda, Inc.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <ahci.h>
   9 #include <netdev.h>
  10 #include <scsi.h>
  11
  12 #include <asm/sizes.h>
  13 #include <asm/io.h>
  14
  15 #define HB_AHCI_BASE                    0xffe08000
  16
  17 #define HB_SREG_A9_PWR_REQ              0xfff3cf00
  18 #define HB_SREG_A9_BOOT_SRC_STAT        0xfff3cf04
  19 #define HB_SREG_A9_PWRDOM_STAT          0xfff3cf20
  20
  21 #define HB_PWR_SUSPEND                  0
  22 #define HB_PWR_SOFT_RESET               1
  23 #define HB_PWR_HARD_RESET               2
  24 #define HB_PWR_SHUTDOWN                 3
  25
  26 #define PWRDOM_STAT_SATA                0x80000000
  27 #define PWRDOM_STAT_PCI                 0x40000000
  28 #define PWRDOM_STAT_EMMC                0x20000000
  29
  30 DECLARE_GLOBAL_DATA_PTR;
  31
  32 /*
  33  * Miscellaneous platform dependent initialisations
  34  */
  35 int board_init(void)
  36 {
  37         icache_enable();
  38
  39         return 0;
  40 }
  41
  42 /* We know all the init functions have been run now */
  43 int board_eth_init(bd_t *bis)
  44 {
  45         int rc = 0;
  46
  47 #ifdef CONFIG_CALXEDA_XGMAC
  48         rc += calxedaxgmac_initialize(0, 0xfff50000);
  49         rc += calxedaxgmac_initialize(1, 0xfff51000);
  50 #endif
  51         return rc;
  52 }
  53
  54 #ifdef CONFIG_MISC_INIT_R
  55 int misc_init_r(void)
  56 {
  57         char envbuffer[16];
  58         u32 boot_choice;
  59         u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
  60
  61         if (reg & PWRDOM_STAT_SATA) {
  62                 ahci_init(HB_AHCI_BASE);
  63                 scsi_scan(1);
  64         }
  65
  66         boot_choice = readl(HB_SREG_A9_BOOT_SRC_STAT) & 0xff;
  67         sprintf(envbuffer, "bootcmd%d", boot_choice);
  68         if (getenv(envbuffer)) {
  69                 sprintf(envbuffer, "run bootcmd%d", boot_choice);
  70                 setenv("bootcmd", envbuffer);
  71         } else
  72                 setenv("bootcmd", "");
  73
  74         return 0;
  75 }
  76 #endif
  77
  78 int dram_init(void)
  79 {
  80         gd->ram_size = SZ_512M;
  81         return 0;
  82 }
  83
  84 void dram_init_banksize(void)
  85 {
  86         gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
  87         gd->bd->bi_dram[0].size =  PHYS_SDRAM_1_SIZE;
  88 }
  89
  90 #if defined(CONFIG_OF_BOARD_SETUP)
  91 void ft_board_setup(void *fdt, bd_t *bd)
  92 {
  93         static const char disabled[] = "disabled";
  94         u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
  95
  96         if (!(reg & PWRDOM_STAT_SATA))
  97                 do_fixup_by_compat(fdt, "calxeda,hb-ahci", "status",
  98                         disabled, sizeof(disabled), 1);
  99
 100         if (!(reg & PWRDOM_STAT_EMMC))
 101                 do_fixup_by_compat(fdt, "calxeda,hb-sdhci", "status",
 102                         disabled, sizeof(disabled), 1);
 103 }
 104 #endif
 105
 106 void reset_cpu(ulong addr)
 107 {
 108         writel(HB_PWR_HARD_RESET, HB_SREG_A9_PWR_REQ);
 109
 110         wfi();
 111 }