karo: tx28: fix prototype of video_hw_init()
[karo-tx-uboot.git] / board / karo / tx28 / tx28.c
1 /*
2  * Copyright (C) 2011-2013 Lothar WaƟmann <LW@KARO-electronics.de>
3  * based on: board/freescale/mx28_evk.c (C) 2010 Freescale Semiconductor, Inc.
4  *
5  * See file CREDITS for list of people who contributed to this
6  * project.
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License
10  * version 2 as published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  */
18
19 #include <common.h>
20 #include <errno.h>
21 #include <libfdt.h>
22 #include <fdt_support.h>
23 #include <lcd.h>
24 #include <netdev.h>
25 #include <mmc.h>
26 #include <mxcfb.h>
27 #include <video_fb.h>
28 #include <linux/list.h>
29 #include <linux/fb.h>
30 #include <asm/io.h>
31 #include <asm/gpio.h>
32 #include <asm/arch/iomux-mx28.h>
33 #include <asm/arch/clock.h>
34 #include <asm/arch/imx-regs.h>
35 #include <asm/arch/sys_proto.h>
36
37 #include "../common/karo.h"
38
39 DECLARE_GLOBAL_DATA_PTR;
40
41 #define MXS_GPIO_NR(p, o)      (((p) << 5) | (o))
42
43 #define TX28_LCD_PWR_GPIO       MX28_PAD_LCD_ENABLE__GPIO_1_31
44 #define TX28_LCD_RST_GPIO       MX28_PAD_LCD_RESET__GPIO_3_30
45 #define TX28_LCD_BACKLIGHT_GPIO MX28_PAD_PWM0__GPIO_3_16
46
47 #define TX28_USBH_VBUSEN_GPIO   MX28_PAD_SPDIF__GPIO_3_27
48 #define TX28_USBH_OC_GPIO       MX28_PAD_JTAG_RTCK__GPIO_4_20
49 #define TX28_USBOTG_VBUSEN_GPIO MX28_PAD_GPMI_CE2N__GPIO_0_18
50 #define TX28_USBOTG_OC_GPIO     MX28_PAD_GPMI_CE3N__GPIO_0_19
51 #define TX28_USBOTG_ID_GPIO     MX28_PAD_PWM2__GPIO_3_18
52
53 #define TX28_LED_GPIO           MX28_PAD_ENET0_RXD3__GPIO_4_10
54
55 #define STK5_CAN_XCVR_GPIO      MX28_PAD_LCD_D00__GPIO_1_0
56
57 static const struct gpio tx28_gpios[] = {
58         { TX28_USBH_VBUSEN_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "USBH VBUSEN", },
59         { TX28_USBH_OC_GPIO, GPIOFLAG_INPUT, "USBH OC", },
60         { TX28_USBOTG_VBUSEN_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "USBOTG VBUSEN", },
61         { TX28_USBOTG_OC_GPIO, GPIOFLAG_INPUT, "USBOTG OC", },
62         { TX28_USBOTG_ID_GPIO, GPIOFLAG_INPUT, "USBOTG ID", },
63 };
64
65 static const iomux_cfg_t tx28_pads[] = {
66         /* UART pads */
67 #if CONFIG_CONS_INDEX == 0
68         MX28_PAD_AUART0_RX__DUART_CTS,
69         MX28_PAD_AUART0_TX__DUART_RTS,
70         MX28_PAD_AUART0_CTS__DUART_RX,
71         MX28_PAD_AUART0_RTS__DUART_TX,
72 #elif CONFIG_CONS_INDEX == 1
73         MX28_PAD_AUART1_RX__AUART1_RX,
74         MX28_PAD_AUART1_TX__AUART1_TX,
75         MX28_PAD_AUART1_CTS__AUART1_CTS,
76         MX28_PAD_AUART1_RTS__AUART1_RTS,
77 #elif CONFIG_CONS_INDEX == 2
78         MX28_PAD_AUART3_RX__AUART3_RX,
79         MX28_PAD_AUART3_TX__AUART3_TX,
80         MX28_PAD_AUART3_CTS__AUART3_CTS,
81         MX28_PAD_AUART3_RTS__AUART3_RTS,
82 #endif
83         /* I2C bus for internal DS1339, PCA9554 and on DIMM pins 40/41 */
84         MX28_PAD_I2C0_SCL__I2C0_SCL,
85         MX28_PAD_I2C0_SDA__I2C0_SDA,
86
87         /* USBH VBUSEN, OC */
88         MX28_PAD_SPDIF__GPIO_3_27,
89         MX28_PAD_JTAG_RTCK__GPIO_4_20,
90
91         /* USBOTG VBUSEN, OC, ID */
92         MX28_PAD_GPMI_CE2N__GPIO_0_18,
93         MX28_PAD_GPMI_CE3N__GPIO_0_19,
94         MX28_PAD_PWM2__GPIO_3_18,
95 };
96
97 /*
98  * Functions
99  */
100
101 /* provide at least _some_ sort of randomness */
102 #define MAX_LOOPS       100
103
104 static u32 random __attribute__((section("data")));
105
106 static inline void random_init(void)
107 {
108         struct mxs_digctl_regs *digctl_regs = (void *)MXS_DIGCTL_BASE;
109         u32 seed = 0;
110         int i;
111
112         for (i = 0; i < MAX_LOOPS; i++) {
113                 u32 hclk = readl(&digctl_regs->hw_digctl_hclkcount);
114                 u32 entropy = readl(&digctl_regs->hw_digctl_entropy);
115                 u32 usec = readl(&digctl_regs->hw_digctl_microseconds);
116
117                 seed = get_timer(hclk ^ entropy ^ usec ^ random ^ seed);
118                 srand(seed);
119                 random = rand();
120         }
121 }
122
123 #define RTC_PERSISTENT0_CLK32_MASK      (RTC_PERSISTENT0_CLOCKSOURCE |  \
124                                         RTC_PERSISTENT0_XTAL32KHZ_PWRUP)
125 static u32 boot_cause __attribute__((section("data")));
126
127 int board_early_init_f(void)
128 {
129         struct mxs_rtc_regs *rtc_regs = (void *)MXS_RTC_BASE;
130         u32 rtc_stat;
131         int timeout = 5000;
132
133         random_init();
134
135         /* IO0 clock at 480MHz */
136         mxs_set_ioclk(MXC_IOCLK0, 480000);
137         /* IO1 clock at 480MHz */
138         mxs_set_ioclk(MXC_IOCLK1, 480000);
139
140         /* SSP0 clock at 96MHz */
141         mxs_set_sspclk(MXC_SSPCLK0, 96000, 0);
142         /* SSP2 clock at 96MHz */
143         mxs_set_sspclk(MXC_SSPCLK2, 96000, 0);
144
145         gpio_request_array(tx28_gpios, ARRAY_SIZE(tx28_gpios));
146         mxs_iomux_setup_multiple_pads(tx28_pads, ARRAY_SIZE(tx28_pads));
147
148         while ((rtc_stat = readl(&rtc_regs->hw_rtc_stat)) &
149                 RTC_STAT_STALE_REGS_PERSISTENT0) {
150                 if (timeout-- < 0)
151                         return 1;
152                 udelay(1);
153         }
154         boot_cause = readl(&rtc_regs->hw_rtc_persistent0);
155         if ((boot_cause & RTC_PERSISTENT0_CLK32_MASK) !=
156                 RTC_PERSISTENT0_CLK32_MASK) {
157                 if (boot_cause & RTC_PERSISTENT0_CLOCKSOURCE)
158                         goto rtc_err;
159                 writel(RTC_PERSISTENT0_CLK32_MASK,
160                         &rtc_regs->hw_rtc_persistent0_set);
161         }
162         return 0;
163
164 rtc_err:
165         serial_puts("Inconsistent value in RTC_PERSISTENT0 register; power-on-reset required\n");
166         return 1;
167 }
168
169 int board_init(void)
170 {
171         if (ctrlc())
172                 printf("CTRL-C detected; safeboot enabled\n");
173
174         /* Address of boot parameters */
175 #ifdef CONFIG_OF_LIBFDT
176         gd->bd->bi_arch_number = -1;
177 #endif
178         gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x1000;
179         return 0;
180 }
181
182 int dram_init(void)
183 {
184         return mxs_dram_init();
185 }
186
187 #ifdef  CONFIG_CMD_MMC
188 static int tx28_mmc_wp(int dev_no)
189 {
190         return 0;
191 }
192
193 int board_mmc_init(bd_t *bis)
194 {
195         return mxsmmc_initialize(bis, 0, tx28_mmc_wp, NULL);
196 }
197 #endif /* CONFIG_CMD_MMC */
198
199 #ifdef CONFIG_FEC_MXC
200 #ifdef CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
201
202 #ifndef CONFIG_TX28_S
203 #define FEC_MAX_IDX                     1
204 #else
205 #define FEC_MAX_IDX                     0
206 #endif
207 #ifndef ETH_ALEN
208 #define ETH_ALEN                        6
209 #endif
210
211 static int fec_get_mac_addr(int index)
212 {
213         int timeout = 1000;
214         struct mxs_ocotp_regs *ocotp_regs =
215                 (struct mxs_ocotp_regs *)MXS_OCOTP_BASE;
216         u32 *cust = &ocotp_regs->hw_ocotp_cust0;
217         u8 mac[ETH_ALEN];
218         char env_name[] = "eth.addr";
219         u32 val = 0;
220         int i;
221
222         if (index < 0 || index > FEC_MAX_IDX)
223                 return -EINVAL;
224
225         /* set this bit to open the OTP banks for reading */
226         writel(OCOTP_CTRL_RD_BANK_OPEN,
227                 &ocotp_regs->hw_ocotp_ctrl_set);
228
229         /* wait until OTP contents are readable */
230         while (OCOTP_CTRL_BUSY & readl(&ocotp_regs->hw_ocotp_ctrl)) {
231                 if (timeout-- < 0)
232                         return -ETIMEDOUT;
233                 udelay(100);
234         }
235
236         for (i = 0; i < sizeof(mac); i++) {
237                 int shift = 24 - i % 4 * 8;
238
239                 if (i % 4 == 0)
240                         val = readl(&cust[index * 8 + i]);
241                 mac[i] = val >> shift;
242         }
243         if (!is_valid_ethaddr(mac)) {
244                 if (index == 0)
245                         printf("No valid MAC address programmed\n");
246                 return 0;
247         }
248
249         if (index == 0) {
250                 printf("MAC addr from fuse: %pM\n", mac);
251                 snprintf(env_name, sizeof(env_name), "ethaddr");
252         } else {
253                 snprintf(env_name, sizeof(env_name), "eth%daddr", index);
254         }
255         eth_setenv_enetaddr(env_name, mac);
256         return 0;
257 }
258
259 static inline int tx28_fec1_enabled(void)
260 {
261         const char *status;
262         int off;
263
264         if (!gd->fdt_blob)
265                 return 0;
266
267         off = fdt_path_offset(gd->fdt_blob, "ethernet1");
268         if (off < 0)
269                 return 0;
270
271         status = fdt_getprop(gd->fdt_blob, off, "status", NULL);
272         return status && (strcmp(status, "okay") == 0);
273 }
274
275 static void tx28_init_mac(void)
276 {
277         int ret;
278
279         ret = fec_get_mac_addr(0);
280         if (ret < 0) {
281                 printf("Failed to read FEC0 MAC address from OCOTP\n");
282                 return;
283         }
284 #ifdef CONFIG_TX28_S
285         if (tx28_fec1_enabled()) {
286                 ret = fec_get_mac_addr(1);
287                 if (ret < 0) {
288                         printf("Failed to read FEC1 MAC address from OCOTP\n");
289                         return;
290                 }
291         }
292 #endif
293 }
294 #else
295 static inline void tx28_init_mac(void)
296 {
297 }
298 #endif /* CONFIG_GET_FEC_MAC_ADDR_FROM_IIM */
299
300 static const iomux_cfg_t tx28_fec_pads[] = {
301         MX28_PAD_ENET0_RX_EN__ENET0_RX_EN,
302         MX28_PAD_ENET0_RXD0__ENET0_RXD0,
303         MX28_PAD_ENET0_RXD1__ENET0_RXD1,
304 };
305
306 int board_eth_init(bd_t *bis)
307 {
308         int ret;
309
310         /* Reset the external phy */
311         gpio_direction_output(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 0);
312
313         /* Power on the external phy */
314         gpio_direction_output(MX28_PAD_PWM4__GPIO_3_29, 1);
315
316         /* Pull strap pins to high */
317         gpio_direction_output(MX28_PAD_ENET0_RX_EN__GPIO_4_2, 1);
318         gpio_direction_output(MX28_PAD_ENET0_RXD0__GPIO_4_3, 1);
319         gpio_direction_output(MX28_PAD_ENET0_RXD1__GPIO_4_4, 1);
320         gpio_direction_input(MX28_PAD_ENET0_TX_CLK__GPIO_4_5);
321
322         udelay(25000);
323         gpio_set_value(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 1);
324         udelay(100);
325
326         mxs_iomux_setup_multiple_pads(tx28_fec_pads, ARRAY_SIZE(tx28_fec_pads));
327
328         ret = cpu_eth_init(bis);
329         if (ret) {
330                 printf("cpu_eth_init() failed: %d\n", ret);
331                 return ret;
332         }
333
334 #ifndef CONFIG_TX28_S
335         if (getenv("ethaddr")) {
336                 ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE);
337                 if (ret) {
338                         printf("FEC MXS: Unable to init FEC0\n");
339                         return ret;
340                 }
341         }
342
343         if (getenv("eth1addr")) {
344                 ret = fecmxc_initialize_multi(bis, 1, 1, MXS_ENET1_BASE);
345                 if (ret) {
346                         printf("FEC MXS: Unable to init FEC1\n");
347                         return ret;
348                 }
349         }
350 #else
351         if (getenv("ethaddr")) {
352                 ret = fecmxc_initialize(bis);
353                 if (ret) {
354                         printf("FEC MXS: Unable to init FEC\n");
355                         return ret;
356                 }
357         }
358 #endif
359         return 0;
360 }
361 #else
362 static inline void tx28_init_mac(void)
363 {
364 }
365 #endif /* CONFIG_FEC_MXC */
366
367 enum {
368         LED_STATE_INIT = -1,
369         LED_STATE_OFF,
370         LED_STATE_ON,
371 };
372
373 void show_activity(int arg)
374 {
375         static int led_state = LED_STATE_INIT;
376         static ulong last;
377
378         if (led_state == LED_STATE_INIT) {
379                 last = get_timer(0);
380                 gpio_set_value(TX28_LED_GPIO, 1);
381                 led_state = LED_STATE_ON;
382         } else {
383                 if (get_timer(last) > CONFIG_SYS_HZ) {
384                         last = get_timer(0);
385                         if (led_state == LED_STATE_ON) {
386                                 gpio_set_value(TX28_LED_GPIO, 0);
387                         } else {
388                                 gpio_set_value(TX28_LED_GPIO, 1);
389                         }
390                         led_state = 1 - led_state;
391                 }
392         }
393 }
394
395 static const iomux_cfg_t stk5_pads[] = {
396         /* SW controlled LED on STK5 baseboard */
397         MX28_PAD_ENET0_RXD3__GPIO_4_10,
398 };
399
400 static const struct gpio stk5_gpios[] = {
401 };
402
403 #ifdef CONFIG_LCD
404 static ushort tx28_cmap[256];
405 vidinfo_t panel_info = {
406         /* set to max. size supported by SoC */
407         .vl_col = 1600,
408         .vl_row = 1200,
409
410         .vl_bpix = LCD_COLOR32,    /* Bits per pixel, 0: 1bpp, 1: 2bpp, 2: 4bpp, 3: 8bpp ... */
411         .cmap = tx28_cmap,
412 };
413
414 static struct fb_videomode tx28_fb_modes[] = {
415         {
416                 /* Standard VGA timing */
417                 .name           = "VGA",
418                 .refresh        = 60,
419                 .xres           = 640,
420                 .yres           = 480,
421                 .pixclock       = KHZ2PICOS(25175),
422                 .left_margin    = 48,
423                 .hsync_len      = 96,
424                 .right_margin   = 16,
425                 .upper_margin   = 31,
426                 .vsync_len      = 2,
427                 .lower_margin   = 12,
428                 .vmode          = FB_VMODE_NONINTERLACED,
429         },
430         {
431                 /* Emerging ETV570 640 x 480 display. Syncs low active,
432                  * DE high active, 115.2 mm x 86.4 mm display area
433                  * VGA compatible timing
434                  */
435                 .name           = "ETV570",
436                 .refresh        = 60,
437                 .xres           = 640,
438                 .yres           = 480,
439                 .pixclock       = KHZ2PICOS(25175),
440                 .left_margin    = 114,
441                 .hsync_len      = 30,
442                 .right_margin   = 16,
443                 .upper_margin   = 32,
444                 .vsync_len      = 3,
445                 .lower_margin   = 10,
446                 .vmode          = FB_VMODE_NONINTERLACED,
447         },
448         {
449                 /* Emerging ET0350G0DH6 320 x 240 display.
450                  * 70.08 mm x 52.56 mm display area.
451                  */
452                 .name           = "ET0350",
453                 .refresh        = 60,
454                 .xres           = 320,
455                 .yres           = 240,
456                 .pixclock       = KHZ2PICOS(6500),
457                 .left_margin    = 68 - 34,
458                 .hsync_len      = 34,
459                 .right_margin   = 20,
460                 .upper_margin   = 18 - 3,
461                 .vsync_len      = 3,
462                 .lower_margin   = 4,
463                 .vmode          = FB_VMODE_NONINTERLACED,
464         },
465         {
466                 /* Emerging ET0430G0DH6 480 x 272 display.
467                  * 95.04 mm x 53.856 mm display area.
468                  */
469                 .name           = "ET0430",
470                 .refresh        = 60,
471                 .xres           = 480,
472                 .yres           = 272,
473                 .pixclock       = KHZ2PICOS(9000),
474                 .left_margin    = 2,
475                 .hsync_len      = 41,
476                 .right_margin   = 2,
477                 .upper_margin   = 2,
478                 .vsync_len      = 10,
479                 .lower_margin   = 2,
480                 .sync           = FB_SYNC_CLK_LAT_FALL,
481                 .vmode          = FB_VMODE_NONINTERLACED,
482         },
483         {
484                 /* Emerging ET0500G0DH6 800 x 480 display.
485                  * 109.6 mm x 66.4 mm display area.
486                  */
487                 .name           = "ET0500",
488                 .refresh        = 60,
489                 .xres           = 800,
490                 .yres           = 480,
491                 .pixclock       = KHZ2PICOS(33260),
492                 .left_margin    = 216 - 128,
493                 .hsync_len      = 128,
494                 .right_margin   = 1056 - 800 - 216,
495                 .upper_margin   = 35 - 2,
496                 .vsync_len      = 2,
497                 .lower_margin   = 525 - 480 - 35,
498                 .vmode          = FB_VMODE_NONINTERLACED,
499         },
500         {
501                 /* Emerging ETQ570G0DH6 320 x 240 display.
502                  * 115.2 mm x 86.4 mm display area.
503                  */
504                 .name           = "ETQ570",
505                 .refresh        = 60,
506                 .xres           = 320,
507                 .yres           = 240,
508                 .pixclock       = KHZ2PICOS(6400),
509                 .left_margin    = 38,
510                 .hsync_len      = 30,
511                 .right_margin   = 30,
512                 .upper_margin   = 16, /* 15 according to datasheet */
513                 .vsync_len      = 3, /* TVP -> 1>x>5 */
514                 .lower_margin   = 4, /* 4.5 according to datasheet */
515                 .vmode          = FB_VMODE_NONINTERLACED,
516         },
517         {
518                 /* Emerging ET0700G0DH6 800 x 480 display.
519                  * 152.4 mm x 91.44 mm display area.
520                  */
521                 .name           = "ET0700",
522                 .refresh        = 60,
523                 .xres           = 800,
524                 .yres           = 480,
525                 .pixclock       = KHZ2PICOS(33260),
526                 .left_margin    = 216 - 128,
527                 .hsync_len      = 128,
528                 .right_margin   = 1056 - 800 - 216,
529                 .upper_margin   = 35 - 2,
530                 .vsync_len      = 2,
531                 .lower_margin   = 525 - 480 - 35,
532                 .vmode          = FB_VMODE_NONINTERLACED,
533         },
534         {
535                 /* unnamed entry for assigning parameters parsed from 'video_mode' string */
536                 .vmode          = FB_VMODE_NONINTERLACED,
537         },
538 };
539
540 static int lcd_enabled = 1;
541 static int lcd_bl_polarity;
542
543 static int lcd_backlight_polarity(void)
544 {
545         return lcd_bl_polarity;
546 }
547
548 void lcd_enable(void)
549 {
550         /* HACK ALERT:
551          * global variable from common/lcd.c
552          * Set to 0 here to prevent messages from going to LCD
553          * rather than serial console
554          */
555         lcd_is_enabled = 0;
556
557         karo_load_splashimage(1);
558         if (lcd_enabled) {
559                 debug("Switching LCD on\n");
560                 gpio_set_value(TX28_LCD_PWR_GPIO, 1);
561                 udelay(100);
562                 gpio_set_value(TX28_LCD_RST_GPIO, 1);
563                 udelay(300000);
564                 gpio_set_value(TX28_LCD_BACKLIGHT_GPIO,
565                         lcd_backlight_polarity());
566         }
567 }
568
569 void lcd_disable(void)
570 {
571 }
572
573 void lcd_panel_disable(void)
574 {
575         if (lcd_enabled) {
576                 debug("Switching LCD off\n");
577                 gpio_set_value(TX28_LCD_BACKLIGHT_GPIO,
578                         !lcd_backlight_polarity());
579                 gpio_set_value(TX28_LCD_RST_GPIO, 0);
580                 gpio_set_value(TX28_LCD_PWR_GPIO, 0);
581         }
582 }
583
584 static const iomux_cfg_t stk5_lcd_pads[] = {
585         /* LCD RESET */
586         MX28_PAD_LCD_RESET__GPIO_3_30 | MXS_PAD_CTRL,
587         /* LCD POWER_ENABLE */
588         MX28_PAD_LCD_ENABLE__GPIO_1_31 | MXS_PAD_CTRL,
589         /* LCD Backlight (PWM) */
590         MX28_PAD_PWM0__GPIO_3_16 | MXS_PAD_CTRL,
591
592         /* Display */
593         MX28_PAD_LCD_D00__LCD_D0 | MXS_PAD_CTRL,
594         MX28_PAD_LCD_D01__LCD_D1 | MXS_PAD_CTRL,
595         MX28_PAD_LCD_D02__LCD_D2 | MXS_PAD_CTRL,
596         MX28_PAD_LCD_D03__LCD_D3 | MXS_PAD_CTRL,
597         MX28_PAD_LCD_D04__LCD_D4 | MXS_PAD_CTRL,
598         MX28_PAD_LCD_D05__LCD_D5 | MXS_PAD_CTRL,
599         MX28_PAD_LCD_D06__LCD_D6 | MXS_PAD_CTRL,
600         MX28_PAD_LCD_D07__LCD_D7 | MXS_PAD_CTRL,
601         MX28_PAD_LCD_D08__LCD_D8 | MXS_PAD_CTRL,
602         MX28_PAD_LCD_D09__LCD_D9 | MXS_PAD_CTRL,
603         MX28_PAD_LCD_D10__LCD_D10 | MXS_PAD_CTRL,
604         MX28_PAD_LCD_D11__LCD_D11 | MXS_PAD_CTRL,
605         MX28_PAD_LCD_D12__LCD_D12 | MXS_PAD_CTRL,
606         MX28_PAD_LCD_D13__LCD_D13 | MXS_PAD_CTRL,
607         MX28_PAD_LCD_D14__LCD_D14 | MXS_PAD_CTRL,
608         MX28_PAD_LCD_D15__LCD_D15 | MXS_PAD_CTRL,
609         MX28_PAD_LCD_D16__LCD_D16 | MXS_PAD_CTRL,
610         MX28_PAD_LCD_D17__LCD_D17 | MXS_PAD_CTRL,
611         MX28_PAD_LCD_D18__LCD_D18 | MXS_PAD_CTRL,
612         MX28_PAD_LCD_D19__LCD_D19 | MXS_PAD_CTRL,
613         MX28_PAD_LCD_D20__LCD_D20 | MXS_PAD_CTRL,
614         MX28_PAD_LCD_D21__LCD_D21 | MXS_PAD_CTRL,
615         MX28_PAD_LCD_D22__LCD_D22 | MXS_PAD_CTRL,
616         MX28_PAD_LCD_D23__LCD_D23 | MXS_PAD_CTRL,
617         MX28_PAD_LCD_RD_E__LCD_VSYNC | MXS_PAD_CTRL,
618         MX28_PAD_LCD_WR_RWN__LCD_HSYNC | MXS_PAD_CTRL,
619         MX28_PAD_LCD_RS__LCD_DOTCLK | MXS_PAD_CTRL,
620         MX28_PAD_LCD_CS__LCD_CS | MXS_PAD_CTRL,
621 };
622
623 static const struct gpio stk5_lcd_gpios[] = {
624         { TX28_LCD_RST_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "LCD RESET", },
625         { TX28_LCD_PWR_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "LCD POWER", },
626         { TX28_LCD_BACKLIGHT_GPIO, GPIOFLAG_OUTPUT_INIT_HIGH, "LCD BACKLIGHT", },
627 };
628
629 void lcd_ctrl_init(void *lcdbase)
630 {
631         int color_depth = 24;
632         const char *video_mode = karo_get_vmode(getenv("video_mode"));
633         const char *vm;
634         unsigned long val;
635         int refresh = 60;
636         struct fb_videomode *p = tx28_fb_modes;
637         struct fb_videomode fb_mode;
638         int xres_set = 0, yres_set = 0, bpp_set = 0, refresh_set = 0;
639
640         if (!lcd_enabled) {
641                 debug("LCD disabled\n");
642                 return;
643         }
644
645         if (had_ctrlc()) {
646                 debug("Disabling LCD\n");
647                 lcd_enabled = 0;
648                 setenv("splashimage", NULL);
649                 return;
650         }
651
652         karo_fdt_move_fdt();
653         lcd_bl_polarity = karo_fdt_get_backlight_polarity(working_fdt);
654
655         if (video_mode == NULL) {
656                 debug("Disabling LCD\n");
657                 lcd_enabled = 0;
658                 return;
659         }
660         vm = video_mode;
661         if (karo_fdt_get_fb_mode(working_fdt, video_mode, &fb_mode) == 0) {
662                 p = &fb_mode;
663                 debug("Using video mode from FDT\n");
664                 vm += strlen(vm);
665                 if (fb_mode.xres > panel_info.vl_col ||
666                         fb_mode.yres > panel_info.vl_row) {
667                         printf("video resolution from DT: %dx%d exceeds hardware limits: %dx%d\n",
668                                 fb_mode.xres, fb_mode.yres,
669                                 panel_info.vl_col, panel_info.vl_row);
670                         lcd_enabled = 0;
671                         return;
672                 }
673         }
674         if (p->name != NULL)
675                 debug("Trying compiled-in video modes\n");
676         while (p->name != NULL) {
677                 if (strcmp(p->name, vm) == 0) {
678                         debug("Using video mode: '%s'\n", p->name);
679                         vm += strlen(vm);
680                         break;
681                 }
682                 p++;
683         }
684         if (*vm != '\0')
685                 debug("Trying to decode video_mode: '%s'\n", vm);
686         while (*vm != '\0') {
687                 if (*vm >= '0' && *vm <= '9') {
688                         char *end;
689
690                         val = simple_strtoul(vm, &end, 0);
691                         if (end > vm) {
692                                 if (!xres_set) {
693                                         if (val > panel_info.vl_col)
694                                                 val = panel_info.vl_col;
695                                         p->xres = val;
696                                         panel_info.vl_col = val;
697                                         xres_set = 1;
698                                 } else if (!yres_set) {
699                                         if (val > panel_info.vl_row)
700                                                 val = panel_info.vl_row;
701                                         p->yres = val;
702                                         panel_info.vl_row = val;
703                                         yres_set = 1;
704                                 } else if (!bpp_set) {
705                                         switch (val) {
706                                         case 8:
707                                         case 16:
708                                         case 18:
709                                         case 24:
710                                                 color_depth = val;
711                                                 break;
712
713                                         default:
714                                                 printf("Invalid color depth: '%.*s' in video_mode; using default: '%u'\n",
715                                                         end - vm, vm, color_depth);
716                                         }
717                                         bpp_set = 1;
718                                 } else if (!refresh_set) {
719                                         refresh = val;
720                                         refresh_set = 1;
721                                 }
722                         }
723                         vm = end;
724                 }
725                 switch (*vm) {
726                 case '@':
727                         bpp_set = 1;
728                         /* fallthru */
729                 case '-':
730                         yres_set = 1;
731                         /* fallthru */
732                 case 'x':
733                         xres_set = 1;
734                         /* fallthru */
735                 case 'M':
736                 case 'R':
737                         vm++;
738                         break;
739
740                 default:
741                         if (*vm != '\0')
742                                 vm++;
743                 }
744         }
745         if (p->xres == 0 || p->yres == 0) {
746                 printf("Invalid video mode: %s\n", getenv("video_mode"));
747                 lcd_enabled = 0;
748                 printf("Supported video modes are:");
749                 for (p = &tx28_fb_modes[0]; p->name != NULL; p++) {
750                         printf(" %s", p->name);
751                 }
752                 printf("\n");
753                 return;
754         }
755         if (p->xres > panel_info.vl_col || p->yres > panel_info.vl_row) {
756                 printf("video resolution: %dx%d exceeds hardware limits: %dx%d\n",
757                         p->xres, p->yres, panel_info.vl_col, panel_info.vl_row);
758                 lcd_enabled = 0;
759                 return;
760         }
761         panel_info.vl_col = p->xres;
762         panel_info.vl_row = p->yres;
763
764         switch (color_depth) {
765         case 8:
766                 panel_info.vl_bpix = LCD_COLOR8;
767                 break;
768         case 16:
769                 panel_info.vl_bpix = LCD_COLOR16;
770                 break;
771         default:
772                 panel_info.vl_bpix = LCD_COLOR32;
773         }
774
775         p->pixclock = KHZ2PICOS(refresh *
776                 (p->xres + p->left_margin + p->right_margin + p->hsync_len) *
777                 (p->yres + p->upper_margin + p->lower_margin + p->vsync_len) /
778                                 1000);
779         debug("Pixel clock set to %lu.%03lu MHz\n",
780                 PICOS2KHZ(p->pixclock) / 1000, PICOS2KHZ(p->pixclock) % 1000);
781
782         if (p != &fb_mode) {
783                 int ret;
784
785                 debug("Creating new display-timing node from '%s'\n",
786                         video_mode);
787                 ret = karo_fdt_create_fb_mode(working_fdt, video_mode, p);
788                 if (ret)
789                         printf("Failed to create new display-timing node from '%s': %d\n",
790                                 video_mode, ret);
791         }
792
793         gpio_request_array(stk5_lcd_gpios, ARRAY_SIZE(stk5_lcd_gpios));
794         mxs_iomux_setup_multiple_pads(stk5_lcd_pads,
795                                 ARRAY_SIZE(stk5_lcd_pads));
796
797         debug("video format: %ux%u-%u@%u\n", p->xres, p->yres,
798                 color_depth, refresh);
799
800         if (karo_load_splashimage(0) == 0) {
801                 char vmode[128];
802
803                 /* setup env variable for mxsfb display driver */
804                 snprintf(vmode, sizeof(vmode),
805                         "x:%d,y:%d,le:%d,ri:%d,up:%d,lo:%d,hs:%d,vs:%d,sync:%d,pclk:%d,depth:%d",
806                         p->xres, p->yres, p->left_margin, p->right_margin,
807                         p->upper_margin, p->lower_margin, p->hsync_len,
808                         p->vsync_len, p->sync, p->pixclock, color_depth);
809                 setenv("videomode", vmode);
810
811                 debug("Initializing LCD controller\n");
812                 video_hw_init();
813                 setenv("videomode", NULL);
814         } else {
815                 debug("Skipping initialization of LCD controller\n");
816         }
817 }
818 #else
819 #define lcd_enabled 0
820 #endif /* CONFIG_LCD */
821
822 static void stk5_board_init(void)
823 {
824         gpio_request_array(stk5_gpios, ARRAY_SIZE(stk5_gpios));
825         mxs_iomux_setup_multiple_pads(stk5_pads, ARRAY_SIZE(stk5_pads));
826 }
827
828 static void stk5v3_board_init(void)
829 {
830         stk5_board_init();
831 }
832
833 static void stk5v5_board_init(void)
834 {
835         stk5_board_init();
836
837         /* init flexcan transceiver enable GPIO */
838         gpio_request_one(STK5_CAN_XCVR_GPIO, GPIOFLAG_OUTPUT_INIT_HIGH,
839                         "Flexcan Transceiver");
840         mxs_iomux_setup_pad(STK5_CAN_XCVR_GPIO);
841 }
842
843 int board_late_init(void)
844 {
845         int ret = 0;
846         const char *baseboard;
847
848         env_cleanup();
849
850         if (had_ctrlc())
851                 setenv_ulong("safeboot", 1);
852         else
853                 karo_fdt_move_fdt();
854
855         baseboard = getenv("baseboard");
856         if (!baseboard)
857                 goto exit;
858
859         printf("Baseboard: %s\n", baseboard);
860
861         if (strncmp(baseboard, "stk5", 4) == 0) {
862                 if ((strlen(baseboard) == 4) ||
863                         strcmp(baseboard, "stk5-v3") == 0) {
864                         stk5v3_board_init();
865                 } else if (strcmp(baseboard, "stk5-v5") == 0) {
866                         const char *otg_mode = getenv("otg_mode");
867
868                         if (otg_mode && strcmp(otg_mode, "host") == 0) {
869                                 printf("otg_mode='%s' is incompatible with baseboard %s; setting to 'none'\n",
870                                         otg_mode, baseboard);
871                                 setenv("otg_mode", "none");
872                         }
873                         stk5v5_board_init();
874                 } else {
875                         printf("WARNING: Unsupported STK5 board rev.: %s\n",
876                                 baseboard + 4);
877                 }
878         } else {
879                 printf("WARNING: Unsupported baseboard: '%s'\n",
880                         baseboard);
881                 if (!had_ctrlc())
882                         ret = -EINVAL;
883         }
884
885 exit:
886         tx28_init_mac();
887         clear_ctrlc();
888         return ret;
889 }
890
891 #define BOOT_CAUSE_MASK         (RTC_PERSISTENT0_EXTERNAL_RESET |       \
892                                 RTC_PERSISTENT0_ALARM_WAKE |            \
893                                 RTC_PERSISTENT0_THERMAL_RESET)
894
895 static void thermal_init(void)
896 {
897         struct mxs_power_regs *power_regs = (void *)MXS_POWER_BASE;
898         struct mxs_clkctrl_regs *clkctrl_regs = (void *)MXS_CLKCTRL_BASE;
899
900         writel(POWER_THERMAL_LOW_POWER | POWER_THERMAL_OFFSET_ADJ_ENABLE |
901                 POWER_THERMAL_OFFSET_ADJ_OFFSET(3),
902                 &power_regs->hw_power_thermal);
903
904         writel(CLKCTRL_RESET_EXTERNAL_RESET_ENABLE |
905                 CLKCTRL_RESET_THERMAL_RESET_ENABLE,
906                 &clkctrl_regs->hw_clkctrl_reset);
907 }
908
909 int checkboard(void)
910 {
911         struct mxs_power_regs *power_regs = (void *)MXS_POWER_BASE;
912         u32 pwr_sts = readl(&power_regs->hw_power_sts);
913         u32 pwrup_src = (pwr_sts >> 24) & 0x3f;
914         const char *dlm = "";
915
916         printf("Board: Ka-Ro TX28-4%sx%d\n", TX28_MOD_SUFFIX,
917                 CONFIG_SYS_SDRAM_SIZE / SZ_128M +
918                 CONFIG_SYS_NAND_BLOCKS / 2048 * 2);
919
920         printf("POWERUP Source: ");
921         if (pwrup_src & (3 << 0)) {
922                 printf("%sPSWITCH %s voltage", dlm,
923                         pwrup_src & (1 << 1) ? "HIGH" : "MID");
924                 dlm = " | ";
925         }
926         if (pwrup_src & (1 << 4)) {
927                 printf("%sRTC", dlm);
928                 dlm = " | ";
929         }
930         if (pwrup_src & (1 << 5)) {
931                 printf("%s5V", dlm);
932                 dlm = " | ";
933         }
934         printf("\n");
935
936         if (boot_cause & BOOT_CAUSE_MASK) {
937                 dlm="";
938                 printf("Last boot cause: ");
939                 if (boot_cause & RTC_PERSISTENT0_EXTERNAL_RESET) {
940                         printf("%sEXTERNAL", dlm);
941                         dlm = " | ";
942                 }
943                 if (boot_cause & RTC_PERSISTENT0_THERMAL_RESET) {
944                         printf("%sTHERMAL", dlm);
945                         dlm = " | ";
946                 }
947                 if (*dlm != '\0')
948                         printf(" RESET");
949                 if (boot_cause & RTC_PERSISTENT0_ALARM_WAKE) {
950                         printf("%sALARM WAKE", dlm);
951                         dlm = " | ";
952                 }
953                 printf("\n");
954         }
955
956         while (pwr_sts & POWER_STS_THERMAL_WARNING) {
957                 static int first = 1;
958
959                 if (first) {
960                         printf("CPU too hot to boot\n");
961                         first = 0;
962                 }
963                 if (tstc())
964                         break;
965                 pwr_sts = readl(&power_regs->hw_power_sts);
966         }
967
968         if (!(boot_cause & RTC_PERSISTENT0_THERMAL_RESET))
969                 thermal_init();
970
971         return 0;
972 }
973
974 #if defined(CONFIG_OF_BOARD_SETUP)
975 #ifdef CONFIG_FDT_FIXUP_PARTITIONS
976 #include <jffs2/jffs2.h>
977 #include <mtd_node.h>
978 static struct node_info tx28_nand_nodes[] = {
979         { "fsl,imx28-gpmi-nand", MTD_DEV_TYPE_NAND, },
980 };
981 #else
982 #define fdt_fixup_mtdparts(b,n,c) do { } while (0)
983 #endif
984
985 static const char *tx28_touchpanels[] = {
986         "ti,tsc2007",
987         "edt,edt-ft5x06",
988         "fsl,imx28-lradc",
989 };
990
991 int ft_board_setup(void *blob, bd_t *bd)
992 {
993         const char *baseboard = getenv("baseboard");
994         int stk5_v5 = baseboard != NULL && (strcmp(baseboard, "stk5-v5") == 0);
995         const char *video_mode = karo_get_vmode(getenv("video_mode"));
996         int ret;
997
998         ret = fdt_increase_size(blob, 4096);
999         if (ret) {
1000                 printf("Failed to increase FDT size: %s\n", fdt_strerror(ret));
1001                 return ret;
1002         }
1003 #ifdef CONFIG_TX28_S
1004         /* TX28-41xx (aka TX28S) has no external RTC
1005          * and no I2C GPIO extender
1006          */
1007         karo_fdt_remove_node(blob, "ds1339");
1008         karo_fdt_remove_node(blob, "gpio5");
1009 #endif
1010         if (stk5_v5)
1011                 karo_fdt_enable_node(blob, "stk5led", 0);
1012
1013         fdt_fixup_mtdparts(blob, tx28_nand_nodes, ARRAY_SIZE(tx28_nand_nodes));
1014
1015         karo_fdt_fixup_touchpanel(blob, tx28_touchpanels,
1016                                 ARRAY_SIZE(tx28_touchpanels));
1017         karo_fdt_fixup_usb_otg(blob, "usbotg", "fsl,usbphy", "vbus-supply");
1018         karo_fdt_fixup_flexcan(blob, stk5_v5);
1019         karo_fdt_update_fb_mode(blob, video_mode);
1020
1021         return 0;
1022 }
1023 #endif /* CONFIG_OF_BOARD_SETUP */