karo: tx28: enable U-Boot build with different (or none) console UART
[karo-tx-uboot.git] / board / karo / tx28 / tx28.c
1 /*
2  * Copyright (C) 2011-2013 Lothar WaƟmann <LW@KARO-electronics.de>
3  * based on: board/freescale/mx28_evk.c (C) 2010 Freescale Semiconductor, Inc.
4  *
5  * See file CREDITS for list of people who contributed to this
6  * project.
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License
10  * version 2 as published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  */
18
19 #include <common.h>
20 #include <errno.h>
21 #include <libfdt.h>
22 #include <fdt_support.h>
23 #include <lcd.h>
24 #include <netdev.h>
25 #include <mmc.h>
26 #include <mxcfb.h>
27 #include <video_fb.h>
28 #include <linux/list.h>
29 #include <linux/fb.h>
30 #include <asm/io.h>
31 #include <asm/gpio.h>
32 #include <asm/arch/iomux-mx28.h>
33 #include <asm/arch/clock.h>
34 #include <asm/arch/imx-regs.h>
35 #include <asm/arch/sys_proto.h>
36
37 #include "../common/karo.h"
38
39 DECLARE_GLOBAL_DATA_PTR;
40
41 #define MXS_GPIO_NR(p, o)      (((p) << 5) | (o))
42
43 #define TX28_LCD_PWR_GPIO       MX28_PAD_LCD_ENABLE__GPIO_1_31
44 #define TX28_LCD_RST_GPIO       MX28_PAD_LCD_RESET__GPIO_3_30
45 #define TX28_LCD_BACKLIGHT_GPIO MX28_PAD_PWM0__GPIO_3_16
46
47 #define TX28_USBH_VBUSEN_GPIO   MX28_PAD_SPDIF__GPIO_3_27
48 #define TX28_USBH_OC_GPIO       MX28_PAD_JTAG_RTCK__GPIO_4_20
49 #define TX28_USBOTG_VBUSEN_GPIO MX28_PAD_GPMI_CE2N__GPIO_0_18
50 #define TX28_USBOTG_OC_GPIO     MX28_PAD_GPMI_CE3N__GPIO_0_19
51 #define TX28_USBOTG_ID_GPIO     MX28_PAD_PWM2__GPIO_3_18
52
53 #define TX28_LED_GPIO           MX28_PAD_ENET0_RXD3__GPIO_4_10
54
55 #define STK5_CAN_XCVR_GPIO      MX28_PAD_LCD_D00__GPIO_1_0
56
57 #define ENET_PAD_CTRL           (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_PULLUP)
58 #define GPIO_PAD_CTRL           (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_PULLUP)
59 #define I2C_PAD_CTRL            (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_PULLUP)
60
61 #ifndef CONFIG_CONS_INDEX
62 struct serial_device *default_serial_console(void)
63 {
64         return NULL;
65 }
66 #endif
67
68 static const struct gpio tx28_gpios[] = {
69         { TX28_USBH_VBUSEN_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "USBH VBUSEN", },
70         { TX28_USBH_OC_GPIO, GPIOFLAG_INPUT, "USBH OC", },
71         { TX28_USBOTG_VBUSEN_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "USBOTG VBUSEN", },
72         { TX28_USBOTG_OC_GPIO, GPIOFLAG_INPUT, "USBOTG OC", },
73         { TX28_USBOTG_ID_GPIO, GPIOFLAG_INPUT, "USBOTG ID", },
74 };
75
76 static const iomux_cfg_t tx28_pads[] = {
77         /* I2C bus for internal DS1339, PCA9554 and on DIMM pins 40/41 */
78         MX28_PAD_I2C0_SCL__I2C0_SCL | I2C_PAD_CTRL,
79         MX28_PAD_I2C0_SDA__I2C0_SDA | I2C_PAD_CTRL,
80
81         /* USBH VBUSEN, OC */
82         MX28_PAD_SPDIF__GPIO_3_27,
83         MX28_PAD_JTAG_RTCK__GPIO_4_20,
84
85         /* USBOTG VBUSEN, OC, ID */
86         MX28_PAD_GPMI_CE2N__GPIO_0_18,
87         MX28_PAD_GPMI_CE3N__GPIO_0_19,
88         MX28_PAD_PWM2__GPIO_3_18,
89 };
90
91 /*
92  * Functions
93  */
94
95 /* provide at least _some_ sort of randomness */
96 #define MAX_LOOPS       100
97
98 static u32 random __attribute__((section("data")));
99
100 static inline void random_init(void)
101 {
102         struct mxs_digctl_regs *digctl_regs = (void *)MXS_DIGCTL_BASE;
103         u32 seed = 0;
104         int i;
105
106         for (i = 0; i < MAX_LOOPS; i++) {
107                 u32 hclk = readl(&digctl_regs->hw_digctl_hclkcount);
108                 u32 entropy = readl(&digctl_regs->hw_digctl_entropy);
109                 u32 usec = readl(&digctl_regs->hw_digctl_microseconds);
110
111                 seed = get_timer(hclk ^ entropy ^ usec ^ random ^ seed);
112                 srand(seed);
113                 random = rand();
114         }
115 }
116
117 #define RTC_PERSISTENT0_CLK32_MASK      (RTC_PERSISTENT0_CLOCKSOURCE |  \
118                                         RTC_PERSISTENT0_XTAL32KHZ_PWRUP)
119 static u32 boot_cause __attribute__((section("data")));
120
121 int board_early_init_f(void)
122 {
123         struct mxs_rtc_regs *rtc_regs = (void *)MXS_RTC_BASE;
124         u32 rtc_stat;
125         int timeout = 5000;
126
127         random_init();
128
129         /* IO0 clock at 480MHz */
130         mxs_set_ioclk(MXC_IOCLK0, 480000);
131         /* IO1 clock at 480MHz */
132         mxs_set_ioclk(MXC_IOCLK1, 480000);
133
134         /* SSP0 clock at 96MHz */
135         mxs_set_sspclk(MXC_SSPCLK0, 96000, 0);
136         /* SSP2 clock at 96MHz */
137         mxs_set_sspclk(MXC_SSPCLK2, 96000, 0);
138
139         gpio_request_array(tx28_gpios, ARRAY_SIZE(tx28_gpios));
140         mxs_iomux_setup_multiple_pads(tx28_pads, ARRAY_SIZE(tx28_pads));
141
142         while ((rtc_stat = readl(&rtc_regs->hw_rtc_stat)) &
143                 RTC_STAT_STALE_REGS_PERSISTENT0) {
144                 if (timeout-- < 0)
145                         return 1;
146                 udelay(1);
147         }
148         boot_cause = readl(&rtc_regs->hw_rtc_persistent0);
149         if ((boot_cause & RTC_PERSISTENT0_CLK32_MASK) !=
150                 RTC_PERSISTENT0_CLK32_MASK) {
151                 if (boot_cause & RTC_PERSISTENT0_CLOCKSOURCE)
152                         goto rtc_err;
153                 writel(RTC_PERSISTENT0_CLK32_MASK,
154                         &rtc_regs->hw_rtc_persistent0_set);
155         }
156         return 0;
157
158 rtc_err:
159         serial_puts("Inconsistent value in RTC_PERSISTENT0 register; power-on-reset required\n");
160         return 1;
161 }
162
163 int board_init(void)
164 {
165         if (ctrlc())
166                 printf("CTRL-C detected; safeboot enabled\n");
167
168         /* Address of boot parameters */
169 #ifdef CONFIG_OF_LIBFDT
170         gd->bd->bi_arch_number = -1;
171 #endif
172         gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x1000;
173         return 0;
174 }
175
176 int dram_init(void)
177 {
178         return mxs_dram_init();
179 }
180
181 #ifdef  CONFIG_CMD_MMC
182 static int tx28_mmc_wp(int dev_no)
183 {
184         return 0;
185 }
186
187 int board_mmc_init(bd_t *bis)
188 {
189         return mxsmmc_initialize(bis, 0, tx28_mmc_wp, NULL);
190 }
191 #endif /* CONFIG_CMD_MMC */
192
193 #ifdef CONFIG_FEC_MXC
194 #ifdef CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
195
196 #ifndef CONFIG_TX28_S
197 #define FEC_MAX_IDX                     1
198 #else
199 #define FEC_MAX_IDX                     0
200 #endif
201 #ifndef ETH_ALEN
202 #define ETH_ALEN                        6
203 #endif
204
205 static int fec_get_mac_addr(int index)
206 {
207         int timeout = 1000;
208         struct mxs_ocotp_regs *ocotp_regs =
209                 (struct mxs_ocotp_regs *)MXS_OCOTP_BASE;
210         u32 *cust = &ocotp_regs->hw_ocotp_cust0;
211         u8 mac[ETH_ALEN];
212         char env_name[] = "eth.addr";
213         u32 val = 0;
214         int i;
215
216         if (index < 0 || index > FEC_MAX_IDX)
217                 return -EINVAL;
218
219         /* set this bit to open the OTP banks for reading */
220         writel(OCOTP_CTRL_RD_BANK_OPEN,
221                 &ocotp_regs->hw_ocotp_ctrl_set);
222
223         /* wait until OTP contents are readable */
224         while (OCOTP_CTRL_BUSY & readl(&ocotp_regs->hw_ocotp_ctrl)) {
225                 if (timeout-- < 0)
226                         return -ETIMEDOUT;
227                 udelay(100);
228         }
229
230         for (i = 0; i < sizeof(mac); i++) {
231                 int shift = 24 - i % 4 * 8;
232
233                 if (i % 4 == 0)
234                         val = readl(&cust[index * 8 + i]);
235                 mac[i] = val >> shift;
236         }
237         if (!is_valid_ethaddr(mac)) {
238                 if (index == 0)
239                         printf("No valid MAC address programmed\n");
240                 return 0;
241         }
242
243         if (index == 0) {
244                 printf("MAC addr from fuse: %pM\n", mac);
245                 snprintf(env_name, sizeof(env_name), "ethaddr");
246         } else {
247                 snprintf(env_name, sizeof(env_name), "eth%daddr", index);
248         }
249         eth_setenv_enetaddr(env_name, mac);
250         return 0;
251 }
252
253 static inline int tx28_fec1_enabled(void)
254 {
255         const char *status;
256         int off;
257
258         if (!gd->fdt_blob)
259                 return 0;
260
261         off = fdt_path_offset(gd->fdt_blob, "ethernet1");
262         if (off < 0)
263                 return 0;
264
265         status = fdt_getprop(gd->fdt_blob, off, "status", NULL);
266         return status && (strcmp(status, "okay") == 0);
267 }
268
269 static void tx28_init_mac(void)
270 {
271         int ret;
272
273         ret = fec_get_mac_addr(0);
274         if (ret < 0) {
275                 printf("Failed to read FEC0 MAC address from OCOTP\n");
276                 return;
277         }
278 #ifdef CONFIG_TX28_S
279         if (tx28_fec1_enabled()) {
280                 ret = fec_get_mac_addr(1);
281                 if (ret < 0) {
282                         printf("Failed to read FEC1 MAC address from OCOTP\n");
283                         return;
284                 }
285         }
286 #endif
287 }
288 #else
289 static inline void tx28_init_mac(void)
290 {
291 }
292 #endif /* CONFIG_GET_FEC_MAC_ADDR_FROM_IIM */
293
294 static const iomux_cfg_t tx28_fec_pads[] = {
295         MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | ENET_PAD_CTRL,
296         MX28_PAD_ENET0_RXD0__ENET0_RXD0 | ENET_PAD_CTRL,
297         MX28_PAD_ENET0_RXD1__ENET0_RXD1 | ENET_PAD_CTRL,
298 };
299
300 int board_eth_init(bd_t *bis)
301 {
302         int ret;
303
304         /* Reset the external phy */
305         gpio_direction_output(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 0);
306
307         /* Power on the external phy */
308         gpio_direction_output(MX28_PAD_PWM4__GPIO_3_29, 1);
309
310         /* Pull strap pins to high */
311         gpio_direction_output(MX28_PAD_ENET0_RX_EN__GPIO_4_2, 1);
312         gpio_direction_output(MX28_PAD_ENET0_RXD0__GPIO_4_3, 1);
313         gpio_direction_output(MX28_PAD_ENET0_RXD1__GPIO_4_4, 1);
314         gpio_direction_input(MX28_PAD_ENET0_TX_CLK__GPIO_4_5);
315
316         udelay(25000);
317         gpio_set_value(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 1);
318         udelay(100);
319
320         mxs_iomux_setup_multiple_pads(tx28_fec_pads, ARRAY_SIZE(tx28_fec_pads));
321
322         ret = cpu_eth_init(bis);
323         if (ret) {
324                 printf("cpu_eth_init() failed: %d\n", ret);
325                 return ret;
326         }
327
328 #ifndef CONFIG_TX28_S
329         if (getenv("ethaddr")) {
330                 ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE);
331                 if (ret) {
332                         printf("FEC MXS: Unable to init FEC0\n");
333                         return ret;
334                 }
335         }
336
337         if (getenv("eth1addr")) {
338                 ret = fecmxc_initialize_multi(bis, 1, 1, MXS_ENET1_BASE);
339                 if (ret) {
340                         printf("FEC MXS: Unable to init FEC1\n");
341                         return ret;
342                 }
343         }
344 #else
345         if (getenv("ethaddr")) {
346                 ret = fecmxc_initialize(bis);
347                 if (ret) {
348                         printf("FEC MXS: Unable to init FEC\n");
349                         return ret;
350                 }
351         }
352 #endif
353         return 0;
354 }
355 #else
356 static inline void tx28_init_mac(void)
357 {
358 }
359 #endif /* CONFIG_FEC_MXC */
360
361 enum {
362         LED_STATE_INIT = -1,
363         LED_STATE_OFF,
364         LED_STATE_ON,
365 };
366
367 void show_activity(int arg)
368 {
369         static int led_state = LED_STATE_INIT;
370         static ulong last;
371
372         if (led_state == LED_STATE_INIT) {
373                 last = get_timer(0);
374                 gpio_set_value(TX28_LED_GPIO, 1);
375                 led_state = LED_STATE_ON;
376         } else {
377                 if (get_timer(last) > CONFIG_SYS_HZ) {
378                         last = get_timer(0);
379                         if (led_state == LED_STATE_ON) {
380                                 gpio_set_value(TX28_LED_GPIO, 0);
381                         } else {
382                                 gpio_set_value(TX28_LED_GPIO, 1);
383                         }
384                         led_state = 1 - led_state;
385                 }
386         }
387 }
388
389 static const iomux_cfg_t stk5_pads[] = {
390         /* SW controlled LED on STK5 baseboard */
391         MX28_PAD_ENET0_RXD3__GPIO_4_10 | GPIO_PAD_CTRL,
392 };
393
394 static const struct gpio stk5_gpios[] = {
395 };
396
397 #ifdef CONFIG_LCD
398 vidinfo_t panel_info = {
399         /* set to max. size supported by SoC */
400         .vl_col = 1600,
401         .vl_row = 1200,
402
403         .vl_bpix = LCD_COLOR32,    /* Bits per pixel, 0: 1bpp, 1: 2bpp, 2: 4bpp, 3: 8bpp ... */
404 };
405
406 static struct fb_videomode tx28_fb_modes[] = {
407         {
408                 /* Standard VGA timing */
409                 .name           = "VGA",
410                 .refresh        = 60,
411                 .xres           = 640,
412                 .yres           = 480,
413                 .pixclock       = KHZ2PICOS(25175),
414                 .left_margin    = 48,
415                 .hsync_len      = 96,
416                 .right_margin   = 16,
417                 .upper_margin   = 31,
418                 .vsync_len      = 2,
419                 .lower_margin   = 12,
420                 .vmode          = FB_VMODE_NONINTERLACED,
421         },
422         {
423                 /* Emerging ETV570 640 x 480 display. Syncs low active,
424                  * DE high active, 115.2 mm x 86.4 mm display area
425                  * VGA compatible timing
426                  */
427                 .name           = "ETV570",
428                 .refresh        = 60,
429                 .xres           = 640,
430                 .yres           = 480,
431                 .pixclock       = KHZ2PICOS(25175),
432                 .left_margin    = 114,
433                 .hsync_len      = 30,
434                 .right_margin   = 16,
435                 .upper_margin   = 32,
436                 .vsync_len      = 3,
437                 .lower_margin   = 10,
438                 .vmode          = FB_VMODE_NONINTERLACED,
439         },
440         {
441                 /* Emerging ET0350G0DH6 320 x 240 display.
442                  * 70.08 mm x 52.56 mm display area.
443                  */
444                 .name           = "ET0350",
445                 .refresh        = 60,
446                 .xres           = 320,
447                 .yres           = 240,
448                 .pixclock       = KHZ2PICOS(6500),
449                 .left_margin    = 68 - 34,
450                 .hsync_len      = 34,
451                 .right_margin   = 20,
452                 .upper_margin   = 18 - 3,
453                 .vsync_len      = 3,
454                 .lower_margin   = 4,
455                 .vmode          = FB_VMODE_NONINTERLACED,
456         },
457         {
458                 /* Emerging ET0430G0DH6 480 x 272 display.
459                  * 95.04 mm x 53.856 mm display area.
460                  */
461                 .name           = "ET0430",
462                 .refresh        = 60,
463                 .xres           = 480,
464                 .yres           = 272,
465                 .pixclock       = KHZ2PICOS(9000),
466                 .left_margin    = 2,
467                 .hsync_len      = 41,
468                 .right_margin   = 2,
469                 .upper_margin   = 2,
470                 .vsync_len      = 10,
471                 .lower_margin   = 2,
472                 .sync           = FB_SYNC_CLK_LAT_FALL,
473                 .vmode          = FB_VMODE_NONINTERLACED,
474         },
475         {
476                 /* Emerging ET0500G0DH6 800 x 480 display.
477                  * 109.6 mm x 66.4 mm display area.
478                  */
479                 .name           = "ET0500",
480                 .refresh        = 60,
481                 .xres           = 800,
482                 .yres           = 480,
483                 .pixclock       = KHZ2PICOS(33260),
484                 .left_margin    = 216 - 128,
485                 .hsync_len      = 128,
486                 .right_margin   = 1056 - 800 - 216,
487                 .upper_margin   = 35 - 2,
488                 .vsync_len      = 2,
489                 .lower_margin   = 525 - 480 - 35,
490                 .vmode          = FB_VMODE_NONINTERLACED,
491         },
492         {
493                 /* Emerging ETQ570G0DH6 320 x 240 display.
494                  * 115.2 mm x 86.4 mm display area.
495                  */
496                 .name           = "ETQ570",
497                 .refresh        = 60,
498                 .xres           = 320,
499                 .yres           = 240,
500                 .pixclock       = KHZ2PICOS(6400),
501                 .left_margin    = 38,
502                 .hsync_len      = 30,
503                 .right_margin   = 30,
504                 .upper_margin   = 16, /* 15 according to datasheet */
505                 .vsync_len      = 3, /* TVP -> 1>x>5 */
506                 .lower_margin   = 4, /* 4.5 according to datasheet */
507                 .vmode          = FB_VMODE_NONINTERLACED,
508         },
509         {
510                 /* Emerging ET0700G0DH6 800 x 480 display.
511                  * 152.4 mm x 91.44 mm display area.
512                  */
513                 .name           = "ET0700",
514                 .refresh        = 60,
515                 .xres           = 800,
516                 .yres           = 480,
517                 .pixclock       = KHZ2PICOS(33260),
518                 .left_margin    = 216 - 128,
519                 .hsync_len      = 128,
520                 .right_margin   = 1056 - 800 - 216,
521                 .upper_margin   = 35 - 2,
522                 .vsync_len      = 2,
523                 .lower_margin   = 525 - 480 - 35,
524                 .vmode          = FB_VMODE_NONINTERLACED,
525         },
526         {
527                 /* unnamed entry for assigning parameters parsed from 'video_mode' string */
528                 .vmode          = FB_VMODE_NONINTERLACED,
529         },
530 };
531
532 static int lcd_enabled = 1;
533 static int lcd_bl_polarity;
534
535 static int lcd_backlight_polarity(void)
536 {
537         return lcd_bl_polarity;
538 }
539
540 void lcd_enable(void)
541 {
542         /* HACK ALERT:
543          * global variable from common/lcd.c
544          * Set to 0 here to prevent messages from going to LCD
545          * rather than serial console
546          */
547         lcd_is_enabled = 0;
548
549         karo_load_splashimage(1);
550         if (lcd_enabled) {
551                 debug("Switching LCD on\n");
552                 gpio_set_value(TX28_LCD_PWR_GPIO, 1);
553                 udelay(100);
554                 gpio_set_value(TX28_LCD_RST_GPIO, 1);
555                 udelay(300000);
556                 gpio_set_value(TX28_LCD_BACKLIGHT_GPIO,
557                         lcd_backlight_polarity());
558         }
559 }
560
561 void lcd_disable(void)
562 {
563 }
564
565 void lcd_panel_disable(void)
566 {
567         if (lcd_enabled) {
568                 debug("Switching LCD off\n");
569                 gpio_set_value(TX28_LCD_BACKLIGHT_GPIO,
570                         !lcd_backlight_polarity());
571                 gpio_set_value(TX28_LCD_RST_GPIO, 0);
572                 gpio_set_value(TX28_LCD_PWR_GPIO, 0);
573         }
574 }
575
576 static const iomux_cfg_t stk5_lcd_pads[] = {
577         /* LCD RESET */
578         MX28_PAD_LCD_RESET__GPIO_3_30 | MXS_PAD_CTRL,
579         /* LCD POWER_ENABLE */
580         MX28_PAD_LCD_ENABLE__GPIO_1_31 | MXS_PAD_CTRL,
581         /* LCD Backlight (PWM) */
582         MX28_PAD_PWM0__GPIO_3_16 | MXS_PAD_CTRL,
583
584         /* Display */
585         MX28_PAD_LCD_D00__LCD_D0 | MXS_PAD_CTRL,
586         MX28_PAD_LCD_D01__LCD_D1 | MXS_PAD_CTRL,
587         MX28_PAD_LCD_D02__LCD_D2 | MXS_PAD_CTRL,
588         MX28_PAD_LCD_D03__LCD_D3 | MXS_PAD_CTRL,
589         MX28_PAD_LCD_D04__LCD_D4 | MXS_PAD_CTRL,
590         MX28_PAD_LCD_D05__LCD_D5 | MXS_PAD_CTRL,
591         MX28_PAD_LCD_D06__LCD_D6 | MXS_PAD_CTRL,
592         MX28_PAD_LCD_D07__LCD_D7 | MXS_PAD_CTRL,
593         MX28_PAD_LCD_D08__LCD_D8 | MXS_PAD_CTRL,
594         MX28_PAD_LCD_D09__LCD_D9 | MXS_PAD_CTRL,
595         MX28_PAD_LCD_D10__LCD_D10 | MXS_PAD_CTRL,
596         MX28_PAD_LCD_D11__LCD_D11 | MXS_PAD_CTRL,
597         MX28_PAD_LCD_D12__LCD_D12 | MXS_PAD_CTRL,
598         MX28_PAD_LCD_D13__LCD_D13 | MXS_PAD_CTRL,
599         MX28_PAD_LCD_D14__LCD_D14 | MXS_PAD_CTRL,
600         MX28_PAD_LCD_D15__LCD_D15 | MXS_PAD_CTRL,
601         MX28_PAD_LCD_D16__LCD_D16 | MXS_PAD_CTRL,
602         MX28_PAD_LCD_D17__LCD_D17 | MXS_PAD_CTRL,
603         MX28_PAD_LCD_D18__LCD_D18 | MXS_PAD_CTRL,
604         MX28_PAD_LCD_D19__LCD_D19 | MXS_PAD_CTRL,
605         MX28_PAD_LCD_D20__LCD_D20 | MXS_PAD_CTRL,
606         MX28_PAD_LCD_D21__LCD_D21 | MXS_PAD_CTRL,
607         MX28_PAD_LCD_D22__LCD_D22 | MXS_PAD_CTRL,
608         MX28_PAD_LCD_D23__LCD_D23 | MXS_PAD_CTRL,
609         MX28_PAD_LCD_RD_E__LCD_VSYNC | MXS_PAD_CTRL,
610         MX28_PAD_LCD_WR_RWN__LCD_HSYNC | MXS_PAD_CTRL,
611         MX28_PAD_LCD_RS__LCD_DOTCLK | MXS_PAD_CTRL,
612         MX28_PAD_LCD_CS__LCD_CS | MXS_PAD_CTRL,
613 };
614
615 static const struct gpio stk5_lcd_gpios[] = {
616         { TX28_LCD_RST_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "LCD RESET", },
617         { TX28_LCD_PWR_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "LCD POWER", },
618         { TX28_LCD_BACKLIGHT_GPIO, GPIOFLAG_OUTPUT_INIT_HIGH, "LCD BACKLIGHT", },
619 };
620
621 void lcd_ctrl_init(void *lcdbase)
622 {
623         int color_depth = 24;
624         const char *video_mode = karo_get_vmode(getenv("video_mode"));
625         const char *vm;
626         unsigned long val;
627         int refresh = 60;
628         struct fb_videomode *p = tx28_fb_modes;
629         struct fb_videomode fb_mode;
630         int xres_set = 0, yres_set = 0, bpp_set = 0, refresh_set = 0;
631
632         if (!lcd_enabled) {
633                 debug("LCD disabled\n");
634                 return;
635         }
636
637         if (had_ctrlc()) {
638                 debug("Disabling LCD\n");
639                 lcd_enabled = 0;
640                 setenv("splashimage", NULL);
641                 return;
642         }
643
644         karo_fdt_move_fdt();
645         lcd_bl_polarity = karo_fdt_get_backlight_polarity(working_fdt);
646
647         if (video_mode == NULL) {
648                 debug("Disabling LCD\n");
649                 lcd_enabled = 0;
650                 return;
651         }
652         vm = video_mode;
653         if (karo_fdt_get_fb_mode(working_fdt, video_mode, &fb_mode) == 0) {
654                 p = &fb_mode;
655                 debug("Using video mode from FDT\n");
656                 vm += strlen(vm);
657                 if (fb_mode.xres > panel_info.vl_col ||
658                         fb_mode.yres > panel_info.vl_row) {
659                         printf("video resolution from DT: %dx%d exceeds hardware limits: %dx%d\n",
660                                 fb_mode.xres, fb_mode.yres,
661                                 panel_info.vl_col, panel_info.vl_row);
662                         lcd_enabled = 0;
663                         return;
664                 }
665         }
666         if (p->name != NULL)
667                 debug("Trying compiled-in video modes\n");
668         while (p->name != NULL) {
669                 if (strcmp(p->name, vm) == 0) {
670                         debug("Using video mode: '%s'\n", p->name);
671                         vm += strlen(vm);
672                         break;
673                 }
674                 p++;
675         }
676         if (*vm != '\0')
677                 debug("Trying to decode video_mode: '%s'\n", vm);
678         while (*vm != '\0') {
679                 if (*vm >= '0' && *vm <= '9') {
680                         char *end;
681
682                         val = simple_strtoul(vm, &end, 0);
683                         if (end > vm) {
684                                 if (!xres_set) {
685                                         if (val > panel_info.vl_col)
686                                                 val = panel_info.vl_col;
687                                         p->xres = val;
688                                         panel_info.vl_col = val;
689                                         xres_set = 1;
690                                 } else if (!yres_set) {
691                                         if (val > panel_info.vl_row)
692                                                 val = panel_info.vl_row;
693                                         p->yres = val;
694                                         panel_info.vl_row = val;
695                                         yres_set = 1;
696                                 } else if (!bpp_set) {
697                                         switch (val) {
698                                         case 8:
699                                         case 16:
700                                         case 18:
701                                         case 24:
702                                                 color_depth = val;
703                                                 break;
704
705                                         default:
706                                                 printf("Invalid color depth: '%.*s' in video_mode; using default: '%u'\n",
707                                                         end - vm, vm, color_depth);
708                                         }
709                                         bpp_set = 1;
710                                 } else if (!refresh_set) {
711                                         refresh = val;
712                                         refresh_set = 1;
713                                 }
714                         }
715                         vm = end;
716                 }
717                 switch (*vm) {
718                 case '@':
719                         bpp_set = 1;
720                         /* fallthru */
721                 case '-':
722                         yres_set = 1;
723                         /* fallthru */
724                 case 'x':
725                         xres_set = 1;
726                         /* fallthru */
727                 case 'M':
728                 case 'R':
729                         vm++;
730                         break;
731
732                 default:
733                         if (*vm != '\0')
734                                 vm++;
735                 }
736         }
737         if (p->xres == 0 || p->yres == 0) {
738                 printf("Invalid video mode: %s\n", getenv("video_mode"));
739                 lcd_enabled = 0;
740                 printf("Supported video modes are:");
741                 for (p = &tx28_fb_modes[0]; p->name != NULL; p++) {
742                         printf(" %s", p->name);
743                 }
744                 printf("\n");
745                 return;
746         }
747         if (p->xres > panel_info.vl_col || p->yres > panel_info.vl_row) {
748                 printf("video resolution: %dx%d exceeds hardware limits: %dx%d\n",
749                         p->xres, p->yres, panel_info.vl_col, panel_info.vl_row);
750                 lcd_enabled = 0;
751                 return;
752         }
753         panel_info.vl_col = p->xres;
754         panel_info.vl_row = p->yres;
755
756         switch (color_depth) {
757         case 8:
758                 panel_info.vl_bpix = LCD_COLOR8;
759                 break;
760         case 16:
761                 panel_info.vl_bpix = LCD_COLOR16;
762                 break;
763         default:
764                 panel_info.vl_bpix = LCD_COLOR32;
765         }
766
767         p->pixclock = KHZ2PICOS(refresh *
768                 (p->xres + p->left_margin + p->right_margin + p->hsync_len) *
769                 (p->yres + p->upper_margin + p->lower_margin + p->vsync_len) /
770                                 1000);
771         debug("Pixel clock set to %lu.%03lu MHz\n",
772                 PICOS2KHZ(p->pixclock) / 1000, PICOS2KHZ(p->pixclock) % 1000);
773
774         if (p != &fb_mode) {
775                 int ret;
776
777                 debug("Creating new display-timing node from '%s'\n",
778                         video_mode);
779                 ret = karo_fdt_create_fb_mode(working_fdt, video_mode, p);
780                 if (ret)
781                         printf("Failed to create new display-timing node from '%s': %d\n",
782                                 video_mode, ret);
783         }
784
785         gpio_request_array(stk5_lcd_gpios, ARRAY_SIZE(stk5_lcd_gpios));
786         mxs_iomux_setup_multiple_pads(stk5_lcd_pads,
787                                 ARRAY_SIZE(stk5_lcd_pads));
788
789         debug("video format: %ux%u-%u@%u\n", p->xres, p->yres,
790                 color_depth, refresh);
791
792         if (karo_load_splashimage(0) == 0) {
793                 char vmode[128];
794
795                 /* setup env variable for mxsfb display driver */
796                 snprintf(vmode, sizeof(vmode),
797                         "x:%d,y:%d,le:%d,ri:%d,up:%d,lo:%d,hs:%d,vs:%d,sync:%d,pclk:%d,depth:%d",
798                         p->xres, p->yres, p->left_margin, p->right_margin,
799                         p->upper_margin, p->lower_margin, p->hsync_len,
800                         p->vsync_len, p->sync, p->pixclock, color_depth);
801                 setenv("videomode", vmode);
802
803                 debug("Initializing LCD controller\n");
804                 video_hw_init();
805                 setenv("videomode", NULL);
806         } else {
807                 debug("Skipping initialization of LCD controller\n");
808         }
809 }
810 #else
811 #define lcd_enabled 0
812 #endif /* CONFIG_LCD */
813
814 static void stk5_board_init(void)
815 {
816         gpio_request_array(stk5_gpios, ARRAY_SIZE(stk5_gpios));
817         mxs_iomux_setup_multiple_pads(stk5_pads, ARRAY_SIZE(stk5_pads));
818 }
819
820 static void stk5v3_board_init(void)
821 {
822         stk5_board_init();
823 }
824
825 static void stk5v5_board_init(void)
826 {
827         stk5_board_init();
828
829         /* init flexcan transceiver enable GPIO */
830         gpio_request_one(STK5_CAN_XCVR_GPIO, GPIOFLAG_OUTPUT_INIT_HIGH,
831                         "Flexcan Transceiver");
832         mxs_iomux_setup_pad(STK5_CAN_XCVR_GPIO);
833 }
834
835 int board_late_init(void)
836 {
837         int ret = 0;
838         const char *baseboard;
839
840         env_cleanup();
841
842         if (had_ctrlc())
843                 setenv_ulong("safeboot", 1);
844         else
845                 karo_fdt_move_fdt();
846
847         baseboard = getenv("baseboard");
848         if (!baseboard)
849                 goto exit;
850
851         printf("Baseboard: %s\n", baseboard);
852
853         if (strncmp(baseboard, "stk5", 4) == 0) {
854                 if ((strlen(baseboard) == 4) ||
855                         strcmp(baseboard, "stk5-v3") == 0) {
856                         stk5v3_board_init();
857                 } else if (strcmp(baseboard, "stk5-v5") == 0) {
858                         const char *otg_mode = getenv("otg_mode");
859
860                         if (otg_mode && strcmp(otg_mode, "host") == 0) {
861                                 printf("otg_mode='%s' is incompatible with baseboard %s; setting to 'none'\n",
862                                         otg_mode, baseboard);
863                                 setenv("otg_mode", "none");
864                         }
865                         stk5v5_board_init();
866                 } else {
867                         printf("WARNING: Unsupported STK5 board rev.: %s\n",
868                                 baseboard + 4);
869                 }
870         } else {
871                 printf("WARNING: Unsupported baseboard: '%s'\n",
872                         baseboard);
873                 if (!had_ctrlc())
874                         ret = -EINVAL;
875         }
876
877 exit:
878         tx28_init_mac();
879         clear_ctrlc();
880         return ret;
881 }
882
883 #define BOOT_CAUSE_MASK         (RTC_PERSISTENT0_EXTERNAL_RESET |       \
884                                 RTC_PERSISTENT0_ALARM_WAKE |            \
885                                 RTC_PERSISTENT0_THERMAL_RESET)
886
887 static void thermal_init(void)
888 {
889         struct mxs_power_regs *power_regs = (void *)MXS_POWER_BASE;
890         struct mxs_clkctrl_regs *clkctrl_regs = (void *)MXS_CLKCTRL_BASE;
891
892         writel(POWER_THERMAL_LOW_POWER | POWER_THERMAL_OFFSET_ADJ_ENABLE |
893                 POWER_THERMAL_OFFSET_ADJ_OFFSET(3),
894                 &power_regs->hw_power_thermal);
895
896         writel(CLKCTRL_RESET_EXTERNAL_RESET_ENABLE |
897                 CLKCTRL_RESET_THERMAL_RESET_ENABLE,
898                 &clkctrl_regs->hw_clkctrl_reset);
899 }
900
901 int checkboard(void)
902 {
903         struct mxs_power_regs *power_regs = (void *)MXS_POWER_BASE;
904         u32 pwr_sts = readl(&power_regs->hw_power_sts);
905         u32 pwrup_src = (pwr_sts >> 24) & 0x3f;
906         const char *dlm = "";
907
908         printf("Board: Ka-Ro TX28-4%sx%d\n", TX28_MOD_SUFFIX,
909                 CONFIG_SYS_SDRAM_SIZE / SZ_128M +
910                 CONFIG_SYS_NAND_BLOCKS / 2048 * 2);
911
912         printf("POWERUP Source: ");
913         if (pwrup_src & (3 << 0)) {
914                 printf("%sPSWITCH %s voltage", dlm,
915                         pwrup_src & (1 << 1) ? "HIGH" : "MID");
916                 dlm = " | ";
917         }
918         if (pwrup_src & (1 << 4)) {
919                 printf("%sRTC", dlm);
920                 dlm = " | ";
921         }
922         if (pwrup_src & (1 << 5)) {
923                 printf("%s5V", dlm);
924                 dlm = " | ";
925         }
926         printf("\n");
927
928         if (boot_cause & BOOT_CAUSE_MASK) {
929                 dlm="";
930                 printf("Last boot cause: ");
931                 if (boot_cause & RTC_PERSISTENT0_EXTERNAL_RESET) {
932                         printf("%sEXTERNAL", dlm);
933                         dlm = " | ";
934                 }
935                 if (boot_cause & RTC_PERSISTENT0_THERMAL_RESET) {
936                         printf("%sTHERMAL", dlm);
937                         dlm = " | ";
938                 }
939                 if (*dlm != '\0')
940                         printf(" RESET");
941                 if (boot_cause & RTC_PERSISTENT0_ALARM_WAKE) {
942                         printf("%sALARM WAKE", dlm);
943                         dlm = " | ";
944                 }
945                 printf("\n");
946         }
947
948         while (pwr_sts & POWER_STS_THERMAL_WARNING) {
949                 static int first = 1;
950
951                 if (first) {
952                         printf("CPU too hot to boot\n");
953                         first = 0;
954                 }
955                 if (tstc())
956                         break;
957                 pwr_sts = readl(&power_regs->hw_power_sts);
958         }
959
960         if (!(boot_cause & RTC_PERSISTENT0_THERMAL_RESET))
961                 thermal_init();
962
963         return 0;
964 }
965
966 #if defined(CONFIG_OF_BOARD_SETUP)
967 #ifdef CONFIG_FDT_FIXUP_PARTITIONS
968 #include <jffs2/jffs2.h>
969 #include <mtd_node.h>
970 static struct node_info tx28_nand_nodes[] = {
971         { "fsl,imx28-gpmi-nand", MTD_DEV_TYPE_NAND, },
972 };
973 #else
974 #define fdt_fixup_mtdparts(b,n,c) do { } while (0)
975 #endif
976
977 static const char *tx28_touchpanels[] = {
978         "ti,tsc2007",
979         "edt,edt-ft5x06",
980         "fsl,imx28-lradc",
981 };
982
983 int ft_board_setup(void *blob, bd_t *bd)
984 {
985         const char *baseboard = getenv("baseboard");
986         int stk5_v5 = baseboard != NULL && (strcmp(baseboard, "stk5-v5") == 0);
987         const char *video_mode = karo_get_vmode(getenv("video_mode"));
988         int ret;
989
990         ret = fdt_increase_size(blob, 4096);
991         if (ret) {
992                 printf("Failed to increase FDT size: %s\n", fdt_strerror(ret));
993                 return ret;
994         }
995 #ifdef CONFIG_TX28_S
996         /* TX28-41xx (aka TX28S) has no external RTC
997          * and no I2C GPIO extender
998          */
999         karo_fdt_remove_node(blob, "ds1339");
1000         karo_fdt_remove_node(blob, "gpio5");
1001 #endif
1002         if (stk5_v5)
1003                 karo_fdt_enable_node(blob, "stk5led", 0);
1004
1005         fdt_fixup_mtdparts(blob, tx28_nand_nodes, ARRAY_SIZE(tx28_nand_nodes));
1006
1007         karo_fdt_fixup_touchpanel(blob, tx28_touchpanels,
1008                                 ARRAY_SIZE(tx28_touchpanels));
1009         karo_fdt_fixup_usb_otg(blob, "usbotg", "fsl,usbphy", "vbus-supply");
1010         karo_fdt_fixup_flexcan(blob, stk5_v5);
1011         karo_fdt_update_fb_mode(blob, video_mode);
1012
1013         return 0;
1014 }
1015 #endif /* CONFIG_OF_BOARD_SETUP */