Merge branch 'tx6-bugfix'
[karo-tx-uboot.git] / board / karo / tx28 / tx28.c
1 /*
2  * Copyright (C) 2011-2013 Lothar WaƟmann <LW@KARO-electronics.de>
3  * based on: board/freescale/mx28_evk.c (C) 2010 Freescale Semiconductor, Inc.
4  *
5  * See file CREDITS for list of people who contributed to this
6  * project.
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License
10  * version 2 as published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  */
18
19 #include <common.h>
20 #include <errno.h>
21 #include <libfdt.h>
22 #include <fdt_support.h>
23 #include <lcd.h>
24 #include <netdev.h>
25 #include <mmc.h>
26 #include <mxcfb.h>
27 #include <video_fb.h>
28 #include <linux/list.h>
29 #include <linux/fb.h>
30 #include <asm/io.h>
31 #include <asm/gpio.h>
32 #include <asm/arch/iomux.h>
33 #include <asm/arch/iomux-mx28.h>
34 #include <asm/arch/clock.h>
35 #include <asm/arch/imx-regs.h>
36 #include <asm/arch/sys_proto.h>
37
38 #include "../common/karo.h"
39
40 DECLARE_GLOBAL_DATA_PTR;
41
42 #define TX28_LCD_PWR_GPIO       MXS_PAD_TO_GPIO(MX28_PAD_LCD_ENABLE__GPIO_1_31)
43 #define TX28_LCD_RST_GPIO       MXS_PAD_TO_GPIO(MX28_PAD_LCD_RESET__GPIO_3_30)
44 #define TX28_LCD_BACKLIGHT_GPIO MXS_PAD_TO_GPIO(MX28_PAD_PWM0__GPIO_3_16)
45
46 #define TX28_USBH_VBUSEN_GPIO   MXS_PAD_TO_GPIO(MX28_PAD_SPDIF__GPIO_3_27)
47 #define TX28_USBH_OC_GPIO       MXS_PAD_TO_GPIO(MX28_PAD_JTAG_RTCK__GPIO_4_20)
48 #define TX28_USBOTG_VBUSEN_GPIO MXS_PAD_TO_GPIO(MX28_PAD_GPMI_CE2N__GPIO_0_18)
49 #define TX28_USBOTG_OC_GPIO     MXS_PAD_TO_GPIO(MX28_PAD_GPMI_CE3N__GPIO_0_19)
50 #define TX28_USBOTG_ID_GPIO     MXS_PAD_TO_GPIO(MX28_PAD_PWM2__GPIO_3_18)
51
52 #define TX28_LED_GPIO           MXS_PAD_TO_GPIO(MX28_PAD_ENET0_RXD3__GPIO_4_10)
53
54 #define STK5_CAN_XCVR_PAD       MX28_PAD_LCD_D00__GPIO_1_0
55 #define STK5_CAN_XCVR_GPIO      MXS_PAD_TO_GPIO(STK5_CAN_XCVR_PAD)
56
57 #define ENET_PAD_CTRL           (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_PULLUP)
58 #define GPIO_PAD_CTRL           (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_PULLUP)
59 #define I2C_PAD_CTRL            (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_PULLUP)
60
61 #ifndef CONFIG_CONS_INDEX
62 struct serial_device *default_serial_console(void)
63 {
64         return NULL;
65 }
66 #endif
67
68 static const struct gpio tx28_gpios[] = {
69         { TX28_USBH_VBUSEN_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "USBH VBUSEN", },
70         { TX28_USBH_OC_GPIO, GPIOFLAG_INPUT, "USBH OC", },
71         { TX28_USBOTG_VBUSEN_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "USBOTG VBUSEN", },
72         { TX28_USBOTG_OC_GPIO, GPIOFLAG_INPUT, "USBOTG OC", },
73         { TX28_USBOTG_ID_GPIO, GPIOFLAG_INPUT, "USBOTG ID", },
74 };
75
76 static const iomux_cfg_t tx28_pads[] = {
77         /* I2C bus for internal DS1339, PCA9554 and on DIMM pins 40/41 */
78         MX28_PAD_I2C0_SCL__I2C0_SCL | I2C_PAD_CTRL,
79         MX28_PAD_I2C0_SDA__I2C0_SDA | I2C_PAD_CTRL,
80
81         /* USBH VBUSEN, OC */
82         MX28_PAD_SPDIF__GPIO_3_27,
83         MX28_PAD_JTAG_RTCK__GPIO_4_20,
84
85         /* USBOTG VBUSEN, OC, ID */
86         MX28_PAD_GPMI_CE2N__GPIO_0_18,
87         MX28_PAD_GPMI_CE3N__GPIO_0_19,
88         MX28_PAD_PWM2__GPIO_3_18,
89 };
90
91 /*
92  * Functions
93  */
94
95 /* provide at least _some_ sort of randomness */
96 #define MAX_LOOPS       100
97
98 static u32 random __attribute__((section("data")));
99
100 static inline void random_init(void)
101 {
102         struct mxs_digctl_regs *digctl_regs = (void *)MXS_DIGCTL_BASE;
103         u32 seed = 0;
104         int i;
105
106         for (i = 0; i < MAX_LOOPS; i++) {
107                 u32 hclk = readl(&digctl_regs->hw_digctl_hclkcount);
108                 u32 entropy = readl(&digctl_regs->hw_digctl_entropy);
109                 u32 usec = readl(&digctl_regs->hw_digctl_microseconds);
110
111                 seed = get_timer(hclk ^ entropy ^ usec ^ random ^ seed);
112                 srand(seed);
113                 random = rand();
114         }
115 }
116
117 #define RTC_PERSISTENT0_CLK32_MASK      (RTC_PERSISTENT0_CLOCKSOURCE |  \
118                                         RTC_PERSISTENT0_XTAL32KHZ_PWRUP)
119 static u32 boot_cause __attribute__((section("data")));
120
121 int board_early_init_f(void)
122 {
123         struct mxs_rtc_regs *rtc_regs = (void *)MXS_RTC_BASE;
124         u32 rtc_stat;
125         int timeout = 5000;
126
127         random_init();
128
129         /* IO0 clock at 480MHz */
130         mxs_set_ioclk(MXC_IOCLK0, 480000);
131         /* IO1 clock at 480MHz */
132         mxs_set_ioclk(MXC_IOCLK1, 480000);
133
134         /* SSP0 clock at 96MHz */
135         mxs_set_sspclk(MXC_SSPCLK0, 96000, 0);
136         /* SSP2 clock at 96MHz */
137         mxs_set_sspclk(MXC_SSPCLK2, 96000, 0);
138
139         gpio_request_array(tx28_gpios, ARRAY_SIZE(tx28_gpios));
140         mxs_iomux_setup_multiple_pads(tx28_pads, ARRAY_SIZE(tx28_pads));
141
142         while ((rtc_stat = readl(&rtc_regs->hw_rtc_stat)) &
143                 RTC_STAT_STALE_REGS_PERSISTENT0) {
144                 if (timeout-- < 0)
145                         return 1;
146                 udelay(1);
147         }
148         boot_cause = readl(&rtc_regs->hw_rtc_persistent0);
149         if ((boot_cause & RTC_PERSISTENT0_CLK32_MASK) !=
150                 RTC_PERSISTENT0_CLK32_MASK) {
151                 if (boot_cause & RTC_PERSISTENT0_CLOCKSOURCE)
152                         goto rtc_err;
153                 writel(RTC_PERSISTENT0_CLK32_MASK,
154                         &rtc_regs->hw_rtc_persistent0_set);
155         }
156         return 0;
157
158 rtc_err:
159         serial_puts("Inconsistent value in RTC_PERSISTENT0 register; power-on-reset required\n");
160         return 1;
161 }
162
163 int board_init(void)
164 {
165         if (ctrlc())
166                 printf("CTRL-C detected; safeboot enabled\n");
167
168         /* Address of boot parameters */
169 #ifdef CONFIG_OF_LIBFDT
170         gd->bd->bi_arch_number = -1;
171 #endif
172         gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x1000;
173         return 0;
174 }
175
176 int dram_init(void)
177 {
178         return mxs_dram_init();
179 }
180
181 #ifdef  CONFIG_CMD_MMC
182 static int tx28_mmc_wp(int dev_no)
183 {
184         return 0;
185 }
186
187 int board_mmc_init(bd_t *bis)
188 {
189         return mxsmmc_initialize(bis, 0, tx28_mmc_wp, NULL);
190 }
191 #endif /* CONFIG_CMD_MMC */
192
193 #ifdef CONFIG_FEC_MXC
194 #ifdef CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
195
196 #ifndef CONFIG_TX28_S
197 #define FEC_MAX_IDX                     1
198 #else
199 #define FEC_MAX_IDX                     0
200 #endif
201 #ifndef ETH_ALEN
202 #define ETH_ALEN                        6
203 #endif
204
205 static int fec_get_mac_addr(int index)
206 {
207         int timeout = 1000;
208         struct mxs_ocotp_regs *ocotp_regs =
209                 (struct mxs_ocotp_regs *)MXS_OCOTP_BASE;
210         u32 *cust = &ocotp_regs->hw_ocotp_cust0;
211         u8 mac[ETH_ALEN];
212         char env_name[] = "eth.addr";
213         u32 val = 0;
214         int i;
215
216         if (index < 0 || index > FEC_MAX_IDX)
217                 return -EINVAL;
218
219         /* set this bit to open the OTP banks for reading */
220         writel(OCOTP_CTRL_RD_BANK_OPEN,
221                 &ocotp_regs->hw_ocotp_ctrl_set);
222
223         /* wait until OTP contents are readable */
224         while (OCOTP_CTRL_BUSY & readl(&ocotp_regs->hw_ocotp_ctrl)) {
225                 if (timeout-- < 0)
226                         return -ETIMEDOUT;
227                 udelay(100);
228         }
229
230         for (i = 0; i < sizeof(mac); i++) {
231                 int shift = 24 - i % 4 * 8;
232
233                 if (i % 4 == 0)
234                         val = readl(&cust[index * 8 + i]);
235                 mac[i] = val >> shift;
236         }
237         if (!is_valid_ethaddr(mac)) {
238                 if (index == 0)
239                         printf("No valid MAC address programmed\n");
240                 return 0;
241         }
242
243         if (index == 0) {
244                 printf("MAC addr from fuse: %pM\n", mac);
245                 snprintf(env_name, sizeof(env_name), "ethaddr");
246         } else {
247                 snprintf(env_name, sizeof(env_name), "eth%daddr", index);
248         }
249         eth_setenv_enetaddr(env_name, mac);
250         return 0;
251 }
252
253 static inline int tx28_fec1_enabled(void)
254 {
255         const char *status;
256         int off;
257
258         if (!gd->fdt_blob)
259                 return 0;
260
261         off = fdt_path_offset(gd->fdt_blob, "ethernet1");
262         if (off < 0)
263                 return 0;
264
265         status = fdt_getprop(gd->fdt_blob, off, "status", NULL);
266         return status && (strcmp(status, "okay") == 0);
267 }
268
269 static void tx28_init_mac(void)
270 {
271         int ret;
272
273         ret = fec_get_mac_addr(0);
274         if (ret < 0) {
275                 printf("Failed to read FEC0 MAC address from OCOTP\n");
276                 return;
277         }
278 #ifdef CONFIG_TX28_S
279         if (tx28_fec1_enabled()) {
280                 ret = fec_get_mac_addr(1);
281                 if (ret < 0) {
282                         printf("Failed to read FEC1 MAC address from OCOTP\n");
283                         return;
284                 }
285         }
286 #endif
287 }
288 #else
289 static inline void tx28_init_mac(void)
290 {
291 }
292 #endif /* CONFIG_GET_FEC_MAC_ADDR_FROM_IIM */
293
294 static const iomux_cfg_t tx28_fec_pads[] = {
295         MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | ENET_PAD_CTRL,
296         MX28_PAD_ENET0_RXD0__ENET0_RXD0 | ENET_PAD_CTRL,
297         MX28_PAD_ENET0_RXD1__ENET0_RXD1 | ENET_PAD_CTRL,
298 };
299
300 static struct gpio tx28_fec_strap_gpios[] = {
301         /* first entry must be RESET pin */
302         { MXS_PAD_TO_GPIO(MX28_PAD_ENET0_RX_CLK__GPIO_4_13),
303           GPIOFLAG_OUTPUT_INIT_LOW, "PHY Reset", },
304
305         { MXS_PAD_TO_GPIO(MX28_PAD_PWM4__GPIO_3_29),
306           GPIOFLAG_OUTPUT_INIT_HIGH, "PHY Power", },
307
308         /* Pull strap pins to high */
309         { MXS_PAD_TO_GPIO(MX28_PAD_ENET0_RX_EN__GPIO_4_2),
310           GPIOFLAG_OUTPUT_INIT_HIGH, "PHY Mode0", },
311         { MXS_PAD_TO_GPIO(MX28_PAD_ENET0_RXD0__GPIO_4_3),
312           GPIOFLAG_OUTPUT_INIT_HIGH, "PHY Mode1", },
313         { MXS_PAD_TO_GPIO(MX28_PAD_ENET0_RXD1__GPIO_4_4),
314           GPIOFLAG_OUTPUT_INIT_HIGH, "PHY Mode2", },
315
316         { MXS_PAD_TO_GPIO(MX28_PAD_ENET0_TX_CLK__GPIO_4_5),
317           GPIOFLAG_INPUT, "PHY INT", },
318 };
319
320 int board_eth_init(bd_t *bis)
321 {
322         int ret;
323
324         /* Reset the external phy */
325         ret = gpio_request_array(tx28_fec_strap_gpios,
326                                 ARRAY_SIZE(tx28_fec_strap_gpios));
327         if (ret)
328                 printf("Failed to request FEC GPIOs: %d\n", ret);
329
330         udelay(25000);
331         gpio_set_value(tx28_fec_strap_gpios[0].gpio, 1);
332         udelay(100);
333
334         mxs_iomux_setup_multiple_pads(tx28_fec_pads, ARRAY_SIZE(tx28_fec_pads));
335
336         ret = cpu_eth_init(bis);
337         if (ret) {
338                 printf("cpu_eth_init() failed: %d\n", ret);
339                 return ret;
340         }
341
342 #ifndef CONFIG_TX28_S
343         if (getenv("ethaddr")) {
344                 ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE);
345                 if (ret) {
346                         printf("FEC MXS: Unable to init FEC0\n");
347                         return ret;
348                 }
349         }
350
351         if (getenv("eth1addr")) {
352                 ret = fecmxc_initialize_multi(bis, 1, 1, MXS_ENET1_BASE);
353                 if (ret) {
354                         printf("FEC MXS: Unable to init FEC1\n");
355                         return ret;
356                 }
357         }
358 #else
359         if (getenv("ethaddr")) {
360                 ret = fecmxc_initialize(bis);
361                 if (ret) {
362                         printf("FEC MXS: Unable to init FEC\n");
363                         return ret;
364                 }
365         }
366 #endif
367         return 0;
368 }
369 #else
370 static inline void tx28_init_mac(void)
371 {
372 }
373 #endif /* CONFIG_FEC_MXC */
374
375 enum {
376         LED_STATE_INIT = -1,
377         LED_STATE_OFF,
378         LED_STATE_ON,
379         LED_STATE_DISABLED,
380 };
381
382 static int led_state = LED_STATE_DISABLED;
383
384 void show_activity(int arg)
385 {
386         static ulong last;
387         int ret;
388
389         if (led_state == LED_STATE_DISABLED) {
390                 return;
391         } else if (led_state == LED_STATE_INIT) {
392                 last = get_timer(0);
393                 ret = gpio_request_one(TX28_LED_GPIO,
394                                 GPIOFLAG_OUTPUT_INIT_HIGH, "Activity");
395                 if (ret == 0)
396                         led_state = LED_STATE_ON;
397                 else
398                         led_state = LED_STATE_DISABLED;
399         } else {
400                 if (get_timer(last) > CONFIG_SYS_HZ) {
401                         last = get_timer(0);
402                         if (led_state == LED_STATE_ON) {
403                                 gpio_set_value(TX28_LED_GPIO, 0);
404                                 led_state = LED_STATE_OFF;
405                         } else {
406                                 gpio_set_value(TX28_LED_GPIO, 1);
407                                 led_state = LED_STATE_ON;
408                         }
409                 }
410         }
411 }
412
413 static const iomux_cfg_t stk5_pads[] = {
414         /* SW controlled LED on STK5 baseboard */
415         MX28_PAD_ENET0_RXD3__GPIO_4_10 | GPIO_PAD_CTRL,
416 };
417
418 static const struct gpio stk5_gpios[] = {
419 };
420
421 #ifdef CONFIG_LCD
422 vidinfo_t panel_info = {
423         /* set to max. size supported by SoC */
424         .vl_col = 1600,
425         .vl_row = 1200,
426
427         .vl_bpix = LCD_COLOR32,    /* Bits per pixel, 0: 1bpp, 1: 2bpp, 2: 4bpp, 3: 8bpp ... */
428 };
429
430 static struct fb_videomode tx28_fb_modes[] = {
431         {
432                 /* Standard VGA timing */
433                 .name           = "VGA",
434                 .refresh        = 60,
435                 .xres           = 640,
436                 .yres           = 480,
437                 .pixclock       = KHZ2PICOS(25175),
438                 .left_margin    = 48,
439                 .hsync_len      = 96,
440                 .right_margin   = 16,
441                 .upper_margin   = 31,
442                 .vsync_len      = 2,
443                 .lower_margin   = 12,
444                 .vmode          = FB_VMODE_NONINTERLACED,
445         },
446         {
447                 /* Emerging ETV570 640 x 480 display. Syncs low active,
448                  * DE high active, 115.2 mm x 86.4 mm display area
449                  * VGA compatible timing
450                  */
451                 .name           = "ETV570",
452                 .refresh        = 60,
453                 .xres           = 640,
454                 .yres           = 480,
455                 .pixclock       = KHZ2PICOS(25175),
456                 .left_margin    = 114,
457                 .hsync_len      = 30,
458                 .right_margin   = 16,
459                 .upper_margin   = 32,
460                 .vsync_len      = 3,
461                 .lower_margin   = 10,
462                 .vmode          = FB_VMODE_NONINTERLACED,
463         },
464         {
465                 /* Emerging ET0350G0DH6 320 x 240 display.
466                  * 70.08 mm x 52.56 mm display area.
467                  */
468                 .name           = "ET0350",
469                 .refresh        = 60,
470                 .xres           = 320,
471                 .yres           = 240,
472                 .pixclock       = KHZ2PICOS(6500),
473                 .left_margin    = 68 - 34,
474                 .hsync_len      = 34,
475                 .right_margin   = 20,
476                 .upper_margin   = 18 - 3,
477                 .vsync_len      = 3,
478                 .lower_margin   = 4,
479                 .vmode          = FB_VMODE_NONINTERLACED,
480         },
481         {
482                 /* Emerging ET0430G0DH6 480 x 272 display.
483                  * 95.04 mm x 53.856 mm display area.
484                  */
485                 .name           = "ET0430",
486                 .refresh        = 60,
487                 .xres           = 480,
488                 .yres           = 272,
489                 .pixclock       = KHZ2PICOS(9000),
490                 .left_margin    = 2,
491                 .hsync_len      = 41,
492                 .right_margin   = 2,
493                 .upper_margin   = 2,
494                 .vsync_len      = 10,
495                 .lower_margin   = 2,
496                 .sync           = FB_SYNC_CLK_LAT_FALL,
497                 .vmode          = FB_VMODE_NONINTERLACED,
498         },
499         {
500                 /* Emerging ET0500G0DH6 800 x 480 display.
501                  * 109.6 mm x 66.4 mm display area.
502                  */
503                 .name           = "ET0500",
504                 .refresh        = 60,
505                 .xres           = 800,
506                 .yres           = 480,
507                 .pixclock       = KHZ2PICOS(33260),
508                 .left_margin    = 216 - 128,
509                 .hsync_len      = 128,
510                 .right_margin   = 1056 - 800 - 216,
511                 .upper_margin   = 35 - 2,
512                 .vsync_len      = 2,
513                 .lower_margin   = 525 - 480 - 35,
514                 .vmode          = FB_VMODE_NONINTERLACED,
515         },
516         {
517                 /* Emerging ETQ570G0DH6 320 x 240 display.
518                  * 115.2 mm x 86.4 mm display area.
519                  */
520                 .name           = "ETQ570",
521                 .refresh        = 60,
522                 .xres           = 320,
523                 .yres           = 240,
524                 .pixclock       = KHZ2PICOS(6400),
525                 .left_margin    = 38,
526                 .hsync_len      = 30,
527                 .right_margin   = 30,
528                 .upper_margin   = 16, /* 15 according to datasheet */
529                 .vsync_len      = 3, /* TVP -> 1>x>5 */
530                 .lower_margin   = 4, /* 4.5 according to datasheet */
531                 .vmode          = FB_VMODE_NONINTERLACED,
532         },
533         {
534                 /* Emerging ET0700G0DH6 800 x 480 display.
535                  * 152.4 mm x 91.44 mm display area.
536                  */
537                 .name           = "ET0700",
538                 .refresh        = 60,
539                 .xres           = 800,
540                 .yres           = 480,
541                 .pixclock       = KHZ2PICOS(33260),
542                 .left_margin    = 216 - 128,
543                 .hsync_len      = 128,
544                 .right_margin   = 1056 - 800 - 216,
545                 .upper_margin   = 35 - 2,
546                 .vsync_len      = 2,
547                 .lower_margin   = 525 - 480 - 35,
548                 .vmode          = FB_VMODE_NONINTERLACED,
549         },
550         {
551                 /* unnamed entry for assigning parameters parsed from 'video_mode' string */
552                 .vmode          = FB_VMODE_NONINTERLACED,
553         },
554 };
555
556 static int lcd_enabled = 1;
557 static int lcd_bl_polarity;
558
559 static int lcd_backlight_polarity(void)
560 {
561         return lcd_bl_polarity;
562 }
563
564 void lcd_enable(void)
565 {
566         /* HACK ALERT:
567          * global variable from common/lcd.c
568          * Set to 0 here to prevent messages from going to LCD
569          * rather than serial console
570          */
571         lcd_is_enabled = 0;
572
573         karo_load_splashimage(1);
574         if (lcd_enabled) {
575                 debug("Switching LCD on\n");
576                 gpio_set_value(TX28_LCD_PWR_GPIO, 1);
577                 udelay(100);
578                 gpio_set_value(TX28_LCD_RST_GPIO, 1);
579                 udelay(300000);
580                 gpio_set_value(TX28_LCD_BACKLIGHT_GPIO,
581                         lcd_backlight_polarity());
582         }
583 }
584
585 void lcd_disable(void)
586 {
587 }
588
589 void lcd_panel_disable(void)
590 {
591         if (lcd_enabled) {
592                 debug("Switching LCD off\n");
593                 gpio_set_value(TX28_LCD_BACKLIGHT_GPIO,
594                         !lcd_backlight_polarity());
595                 gpio_set_value(TX28_LCD_RST_GPIO, 0);
596                 gpio_set_value(TX28_LCD_PWR_GPIO, 0);
597         }
598 }
599
600 static const iomux_cfg_t stk5_lcd_pads[] = {
601         /* LCD RESET */
602         MX28_PAD_LCD_RESET__GPIO_3_30 | MXS_PAD_CTRL,
603         /* LCD POWER_ENABLE */
604         MX28_PAD_LCD_ENABLE__GPIO_1_31 | MXS_PAD_CTRL,
605         /* LCD Backlight (PWM) */
606         MX28_PAD_PWM0__GPIO_3_16 | MXS_PAD_CTRL,
607
608         /* Display */
609         MX28_PAD_LCD_D00__LCD_D0 | MXS_PAD_CTRL,
610         MX28_PAD_LCD_D01__LCD_D1 | MXS_PAD_CTRL,
611         MX28_PAD_LCD_D02__LCD_D2 | MXS_PAD_CTRL,
612         MX28_PAD_LCD_D03__LCD_D3 | MXS_PAD_CTRL,
613         MX28_PAD_LCD_D04__LCD_D4 | MXS_PAD_CTRL,
614         MX28_PAD_LCD_D05__LCD_D5 | MXS_PAD_CTRL,
615         MX28_PAD_LCD_D06__LCD_D6 | MXS_PAD_CTRL,
616         MX28_PAD_LCD_D07__LCD_D7 | MXS_PAD_CTRL,
617         MX28_PAD_LCD_D08__LCD_D8 | MXS_PAD_CTRL,
618         MX28_PAD_LCD_D09__LCD_D9 | MXS_PAD_CTRL,
619         MX28_PAD_LCD_D10__LCD_D10 | MXS_PAD_CTRL,
620         MX28_PAD_LCD_D11__LCD_D11 | MXS_PAD_CTRL,
621         MX28_PAD_LCD_D12__LCD_D12 | MXS_PAD_CTRL,
622         MX28_PAD_LCD_D13__LCD_D13 | MXS_PAD_CTRL,
623         MX28_PAD_LCD_D14__LCD_D14 | MXS_PAD_CTRL,
624         MX28_PAD_LCD_D15__LCD_D15 | MXS_PAD_CTRL,
625         MX28_PAD_LCD_D16__LCD_D16 | MXS_PAD_CTRL,
626         MX28_PAD_LCD_D17__LCD_D17 | MXS_PAD_CTRL,
627         MX28_PAD_LCD_D18__LCD_D18 | MXS_PAD_CTRL,
628         MX28_PAD_LCD_D19__LCD_D19 | MXS_PAD_CTRL,
629         MX28_PAD_LCD_D20__LCD_D20 | MXS_PAD_CTRL,
630         MX28_PAD_LCD_D21__LCD_D21 | MXS_PAD_CTRL,
631         MX28_PAD_LCD_D22__LCD_D22 | MXS_PAD_CTRL,
632         MX28_PAD_LCD_D23__LCD_D23 | MXS_PAD_CTRL,
633         MX28_PAD_LCD_RD_E__LCD_VSYNC | MXS_PAD_CTRL,
634         MX28_PAD_LCD_WR_RWN__LCD_HSYNC | MXS_PAD_CTRL,
635         MX28_PAD_LCD_RS__LCD_DOTCLK | MXS_PAD_CTRL,
636         MX28_PAD_LCD_CS__LCD_CS | MXS_PAD_CTRL,
637 };
638
639 static const struct gpio stk5_lcd_gpios[] = {
640         { TX28_LCD_RST_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "LCD RESET", },
641         { TX28_LCD_PWR_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "LCD POWER", },
642         { TX28_LCD_BACKLIGHT_GPIO, GPIOFLAG_OUTPUT_INIT_HIGH, "LCD BACKLIGHT", },
643 };
644
645 void lcd_ctrl_init(void *lcdbase)
646 {
647         int color_depth = 24;
648         const char *video_mode = karo_get_vmode(getenv("video_mode"));
649         const char *vm;
650         unsigned long val;
651         int refresh = 60;
652         struct fb_videomode *p = tx28_fb_modes;
653         struct fb_videomode fb_mode;
654         int xres_set = 0, yres_set = 0, bpp_set = 0, refresh_set = 0;
655
656         if (!lcd_enabled) {
657                 debug("LCD disabled\n");
658                 return;
659         }
660
661         if (had_ctrlc()) {
662                 debug("Disabling LCD\n");
663                 lcd_enabled = 0;
664                 setenv("splashimage", NULL);
665                 return;
666         }
667
668         karo_fdt_move_fdt();
669         lcd_bl_polarity = karo_fdt_get_backlight_polarity(working_fdt);
670
671         if (video_mode == NULL) {
672                 debug("Disabling LCD\n");
673                 lcd_enabled = 0;
674                 return;
675         }
676         vm = video_mode;
677         if (karo_fdt_get_fb_mode(working_fdt, video_mode, &fb_mode) == 0) {
678                 p = &fb_mode;
679                 debug("Using video mode from FDT\n");
680                 vm += strlen(vm);
681                 if (fb_mode.xres > panel_info.vl_col ||
682                         fb_mode.yres > panel_info.vl_row) {
683                         printf("video resolution from DT: %dx%d exceeds hardware limits: %dx%d\n",
684                                 fb_mode.xres, fb_mode.yres,
685                                 panel_info.vl_col, panel_info.vl_row);
686                         lcd_enabled = 0;
687                         return;
688                 }
689         }
690         if (p->name != NULL)
691                 debug("Trying compiled-in video modes\n");
692         while (p->name != NULL) {
693                 if (strcmp(p->name, vm) == 0) {
694                         debug("Using video mode: '%s'\n", p->name);
695                         vm += strlen(vm);
696                         break;
697                 }
698                 p++;
699         }
700         if (*vm != '\0')
701                 debug("Trying to decode video_mode: '%s'\n", vm);
702         while (*vm != '\0') {
703                 if (*vm >= '0' && *vm <= '9') {
704                         char *end;
705
706                         val = simple_strtoul(vm, &end, 0);
707                         if (end > vm) {
708                                 if (!xres_set) {
709                                         if (val > panel_info.vl_col)
710                                                 val = panel_info.vl_col;
711                                         p->xres = val;
712                                         panel_info.vl_col = val;
713                                         xres_set = 1;
714                                 } else if (!yres_set) {
715                                         if (val > panel_info.vl_row)
716                                                 val = panel_info.vl_row;
717                                         p->yres = val;
718                                         panel_info.vl_row = val;
719                                         yres_set = 1;
720                                 } else if (!bpp_set) {
721                                         switch (val) {
722                                         case 8:
723                                         case 16:
724                                         case 18:
725                                         case 24:
726                                                 color_depth = val;
727                                                 break;
728
729                                         default:
730                                                 printf("Invalid color depth: '%.*s' in video_mode; using default: '%u'\n",
731                                                         end - vm, vm, color_depth);
732                                         }
733                                         bpp_set = 1;
734                                 } else if (!refresh_set) {
735                                         refresh = val;
736                                         refresh_set = 1;
737                                 }
738                         }
739                         vm = end;
740                 }
741                 switch (*vm) {
742                 case '@':
743                         bpp_set = 1;
744                         /* fallthru */
745                 case '-':
746                         yres_set = 1;
747                         /* fallthru */
748                 case 'x':
749                         xres_set = 1;
750                         /* fallthru */
751                 case 'M':
752                 case 'R':
753                         vm++;
754                         break;
755
756                 default:
757                         if (*vm != '\0')
758                                 vm++;
759                 }
760         }
761         if (p->xres == 0 || p->yres == 0) {
762                 printf("Invalid video mode: %s\n", getenv("video_mode"));
763                 lcd_enabled = 0;
764                 printf("Supported video modes are:");
765                 for (p = &tx28_fb_modes[0]; p->name != NULL; p++) {
766                         printf(" %s", p->name);
767                 }
768                 printf("\n");
769                 return;
770         }
771         if (p->xres > panel_info.vl_col || p->yres > panel_info.vl_row) {
772                 printf("video resolution: %dx%d exceeds hardware limits: %dx%d\n",
773                         p->xres, p->yres, panel_info.vl_col, panel_info.vl_row);
774                 lcd_enabled = 0;
775                 return;
776         }
777         panel_info.vl_col = p->xres;
778         panel_info.vl_row = p->yres;
779
780         switch (color_depth) {
781         case 8:
782                 panel_info.vl_bpix = LCD_COLOR8;
783                 break;
784         case 16:
785                 panel_info.vl_bpix = LCD_COLOR16;
786                 break;
787         default:
788                 panel_info.vl_bpix = LCD_COLOR32;
789         }
790
791         p->pixclock = KHZ2PICOS(refresh *
792                 (p->xres + p->left_margin + p->right_margin + p->hsync_len) *
793                 (p->yres + p->upper_margin + p->lower_margin + p->vsync_len) /
794                                 1000);
795         debug("Pixel clock set to %lu.%03lu MHz\n",
796                 PICOS2KHZ(p->pixclock) / 1000, PICOS2KHZ(p->pixclock) % 1000);
797
798         if (p != &fb_mode) {
799                 int ret;
800
801                 debug("Creating new display-timing node from '%s'\n",
802                         video_mode);
803                 ret = karo_fdt_create_fb_mode(working_fdt, video_mode, p);
804                 if (ret)
805                         printf("Failed to create new display-timing node from '%s': %d\n",
806                                 video_mode, ret);
807         }
808
809         gpio_request_array(stk5_lcd_gpios, ARRAY_SIZE(stk5_lcd_gpios));
810         mxs_iomux_setup_multiple_pads(stk5_lcd_pads,
811                                 ARRAY_SIZE(stk5_lcd_pads));
812
813         debug("video format: %ux%u-%u@%u\n", p->xres, p->yres,
814                 color_depth, refresh);
815
816         if (karo_load_splashimage(0) == 0) {
817                 char vmode[128];
818
819                 /* setup env variable for mxsfb display driver */
820                 snprintf(vmode, sizeof(vmode),
821                         "x:%d,y:%d,le:%d,ri:%d,up:%d,lo:%d,hs:%d,vs:%d,sync:%d,pclk:%d,depth:%d",
822                         p->xres, p->yres, p->left_margin, p->right_margin,
823                         p->upper_margin, p->lower_margin, p->hsync_len,
824                         p->vsync_len, p->sync, p->pixclock, color_depth);
825                 setenv("videomode", vmode);
826
827                 debug("Initializing LCD controller\n");
828                 video_hw_init();
829                 setenv("videomode", NULL);
830         } else {
831                 debug("Skipping initialization of LCD controller\n");
832         }
833 }
834 #else
835 #define lcd_enabled 0
836 #endif /* CONFIG_LCD */
837
838 static void stk5_board_init(void)
839 {
840         gpio_request_array(stk5_gpios, ARRAY_SIZE(stk5_gpios));
841         mxs_iomux_setup_multiple_pads(stk5_pads, ARRAY_SIZE(stk5_pads));
842 }
843
844 static void stk5v3_board_init(void)
845 {
846         led_state = LED_STATE_INIT;
847         stk5_board_init();
848 }
849
850 static void stk5v5_board_init(void)
851 {
852         stk5_board_init();
853
854         /* init flexcan transceiver enable GPIO */
855         gpio_request_one(STK5_CAN_XCVR_GPIO, GPIOFLAG_OUTPUT_INIT_HIGH,
856                         "Flexcan Transceiver");
857         mxs_iomux_setup_pad(STK5_CAN_XCVR_PAD);
858 }
859
860 int board_late_init(void)
861 {
862         int ret = 0;
863         const char *baseboard;
864
865         env_cleanup();
866
867         if (had_ctrlc())
868                 setenv_ulong("safeboot", 1);
869         else
870                 karo_fdt_move_fdt();
871
872         baseboard = getenv("baseboard");
873         if (!baseboard)
874                 goto exit;
875
876         printf("Baseboard: %s\n", baseboard);
877
878         if (strncmp(baseboard, "stk5", 4) == 0) {
879                 if ((strlen(baseboard) == 4) ||
880                         strcmp(baseboard, "stk5-v3") == 0) {
881                         stk5v3_board_init();
882                 } else if (strcmp(baseboard, "stk5-v5") == 0) {
883                         const char *otg_mode = getenv("otg_mode");
884
885                         if (otg_mode && strcmp(otg_mode, "host") == 0) {
886                                 printf("otg_mode='%s' is incompatible with baseboard %s; setting to 'none'\n",
887                                         otg_mode, baseboard);
888                                 setenv("otg_mode", "none");
889                         }
890                         stk5v5_board_init();
891                 } else {
892                         printf("WARNING: Unsupported STK5 board rev.: %s\n",
893                                 baseboard + 4);
894                 }
895         } else {
896                 printf("WARNING: Unsupported baseboard: '%s'\n",
897                         baseboard);
898                 if (!had_ctrlc())
899                         ret = -EINVAL;
900         }
901
902 exit:
903         tx28_init_mac();
904         clear_ctrlc();
905         return ret;
906 }
907
908 #define BOOT_CAUSE_MASK         (RTC_PERSISTENT0_EXTERNAL_RESET |       \
909                                 RTC_PERSISTENT0_ALARM_WAKE |            \
910                                 RTC_PERSISTENT0_THERMAL_RESET)
911
912 static void thermal_init(void)
913 {
914         struct mxs_power_regs *power_regs = (void *)MXS_POWER_BASE;
915         struct mxs_clkctrl_regs *clkctrl_regs = (void *)MXS_CLKCTRL_BASE;
916
917         writel(POWER_THERMAL_LOW_POWER | POWER_THERMAL_OFFSET_ADJ_ENABLE |
918                 POWER_THERMAL_OFFSET_ADJ_OFFSET(3),
919                 &power_regs->hw_power_thermal);
920
921         writel(CLKCTRL_RESET_EXTERNAL_RESET_ENABLE |
922                 CLKCTRL_RESET_THERMAL_RESET_ENABLE,
923                 &clkctrl_regs->hw_clkctrl_reset);
924 }
925
926 int checkboard(void)
927 {
928         struct mxs_power_regs *power_regs = (void *)MXS_POWER_BASE;
929         u32 pwr_sts = readl(&power_regs->hw_power_sts);
930         u32 pwrup_src = (pwr_sts >> 24) & 0x3f;
931         const char *dlm = "";
932
933         printf("Board: Ka-Ro TX28-4%sx%d\n", TX28_MOD_SUFFIX,
934                 CONFIG_SYS_SDRAM_SIZE / SZ_128M +
935                 CONFIG_SYS_NAND_BLOCKS / 2048 * 2);
936
937         printf("POWERUP Source: ");
938         if (pwrup_src & (3 << 0)) {
939                 printf("%sPSWITCH %s voltage", dlm,
940                         pwrup_src & (1 << 1) ? "HIGH" : "MID");
941                 dlm = " | ";
942         }
943         if (pwrup_src & (1 << 4)) {
944                 printf("%sRTC", dlm);
945                 dlm = " | ";
946         }
947         if (pwrup_src & (1 << 5)) {
948                 printf("%s5V", dlm);
949                 dlm = " | ";
950         }
951         printf("\n");
952
953         if (boot_cause & BOOT_CAUSE_MASK) {
954                 dlm="";
955                 printf("Last boot cause: ");
956                 if (boot_cause & RTC_PERSISTENT0_EXTERNAL_RESET) {
957                         printf("%sEXTERNAL", dlm);
958                         dlm = " | ";
959                 }
960                 if (boot_cause & RTC_PERSISTENT0_THERMAL_RESET) {
961                         printf("%sTHERMAL", dlm);
962                         dlm = " | ";
963                 }
964                 if (*dlm != '\0')
965                         printf(" RESET");
966                 if (boot_cause & RTC_PERSISTENT0_ALARM_WAKE) {
967                         printf("%sALARM WAKE", dlm);
968                         dlm = " | ";
969                 }
970                 printf("\n");
971         }
972
973         while (pwr_sts & POWER_STS_THERMAL_WARNING) {
974                 static int first = 1;
975
976                 if (first) {
977                         printf("CPU too hot to boot\n");
978                         first = 0;
979                 }
980                 if (tstc())
981                         break;
982                 pwr_sts = readl(&power_regs->hw_power_sts);
983         }
984
985         if (!(boot_cause & RTC_PERSISTENT0_THERMAL_RESET))
986                 thermal_init();
987
988         return 0;
989 }
990
991 #if defined(CONFIG_OF_BOARD_SETUP)
992 #ifdef CONFIG_FDT_FIXUP_PARTITIONS
993 #include <jffs2/jffs2.h>
994 #include <mtd_node.h>
995 static struct node_info tx28_nand_nodes[] = {
996         { "fsl,imx28-gpmi-nand", MTD_DEV_TYPE_NAND, },
997 };
998 #else
999 #define fdt_fixup_mtdparts(b,n,c) do { } while (0)
1000 #endif
1001
1002 static const char *tx28_touchpanels[] = {
1003         "ti,tsc2007",
1004         "edt,edt-ft5x06",
1005         "fsl,imx28-lradc",
1006 };
1007
1008 int ft_board_setup(void *blob, bd_t *bd)
1009 {
1010         const char *baseboard = getenv("baseboard");
1011         int stk5_v5 = baseboard != NULL && (strcmp(baseboard, "stk5-v5") == 0);
1012         const char *video_mode = karo_get_vmode(getenv("video_mode"));
1013         int ret;
1014
1015         ret = fdt_increase_size(blob, 4096);
1016         if (ret) {
1017                 printf("Failed to increase FDT size: %s\n", fdt_strerror(ret));
1018                 return ret;
1019         }
1020 #ifdef CONFIG_TX28_S
1021         /* TX28-41xx (aka TX28S) has no external RTC
1022          * and no I2C GPIO extender
1023          */
1024         karo_fdt_remove_node(blob, "ds1339");
1025         karo_fdt_remove_node(blob, "gpio5");
1026 #endif
1027         if (stk5_v5)
1028                 karo_fdt_enable_node(blob, "stk5led", 0);
1029
1030         fdt_fixup_mtdparts(blob, tx28_nand_nodes, ARRAY_SIZE(tx28_nand_nodes));
1031
1032         karo_fdt_fixup_touchpanel(blob, tx28_touchpanels,
1033                                 ARRAY_SIZE(tx28_touchpanels));
1034         karo_fdt_fixup_usb_otg(blob, "usbotg", "fsl,usbphy", "vbus-supply");
1035         karo_fdt_fixup_flexcan(blob, stk5_v5);
1036         karo_fdt_update_fb_mode(blob, video_mode);
1037
1038         return 0;
1039 }
1040 #endif /* CONFIG_OF_BOARD_SETUP */