board/karo/tx28/tx28.c

   1 /*
   2  * Copyright (C) 2011-2013 Lothar Waßmann <LW@KARO-electronics.de>
   3  * based on: board/freescale/mx28_evk.c (C) 2010 Freescale Semiconductor, Inc.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License
  10  * version 2 as published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  */
  18
  19 #include <common.h>
  20 #include <errno.h>
  21 #include <libfdt.h>
  22 #include <fdt_support.h>
  23 #include <lcd.h>
  24 #include <netdev.h>
  25 #include <mmc.h>
  26 #include <mxcfb.h>
  27 #include <linux/list.h>
  28 #include <linux/fb.h>
  29 #include <asm/io.h>
  30 #include <asm/gpio.h>
  31 #include <asm/arch/iomux-mx28.h>
  32 #include <asm/arch/clock.h>
  33 #include <asm/arch/imx-regs.h>
  34 #include <asm/arch/sys_proto.h>
  35
  36 #include "../common/karo.h"
  37
  38 DECLARE_GLOBAL_DATA_PTR;
  39
  40 #define MXS_GPIO_NR(p, o)      (((p) << 5) | (o))
  41
  42 #define TX28_LCD_PWR_GPIO       MX28_PAD_LCD_ENABLE__GPIO_1_31
  43 #define TX28_LCD_RST_GPIO       MX28_PAD_LCD_RESET__GPIO_3_30
  44 #define TX28_LCD_BACKLIGHT_GPIO MX28_PAD_PWM0__GPIO_3_16
  45
  46 #define TX28_USBH_VBUSEN_GPIO   MX28_PAD_SPDIF__GPIO_3_27
  47 #define TX28_USBH_OC_GPIO       MX28_PAD_JTAG_RTCK__GPIO_4_20
  48 #define TX28_USBOTG_VBUSEN_GPIO MX28_PAD_GPMI_CE2N__GPIO_0_18
  49 #define TX28_USBOTG_OC_GPIO     MX28_PAD_GPMI_CE3N__GPIO_0_19
  50 #define TX28_USBOTG_ID_GPIO     MX28_PAD_PWM2__GPIO_3_18
  51
  52 #define TX28_LED_GPIO           MX28_PAD_ENET0_RXD3__GPIO_4_10
  53
  54 #define STK5_CAN_XCVR_GPIO      MX28_PAD_LCD_D00__GPIO_1_0
  55
  56 static const struct gpio tx28_gpios[] = {
  57         { TX28_USBH_VBUSEN_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "USBH VBUSEN", },
  58         { TX28_USBH_OC_GPIO, GPIOFLAG_INPUT, "USBH OC", },
  59         { TX28_USBOTG_VBUSEN_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "USBOTG VBUSEN", },
  60         { TX28_USBOTG_OC_GPIO, GPIOFLAG_INPUT, "USBOTG OC", },
  61         { TX28_USBOTG_ID_GPIO, GPIOFLAG_INPUT, "USBOTG ID", },
  62 };
  63
  64 static const iomux_cfg_t tx28_pads[] = {
  65         /* UART pads */
  66 #if CONFIG_CONS_INDEX == 0
  67         MX28_PAD_AUART0_RX__DUART_CTS,
  68         MX28_PAD_AUART0_TX__DUART_RTS,
  69         MX28_PAD_AUART0_CTS__DUART_RX,
  70         MX28_PAD_AUART0_RTS__DUART_TX,
  71 #elif CONFIG_CONS_INDEX == 1
  72         MX28_PAD_AUART1_RX__AUART1_RX,
  73         MX28_PAD_AUART1_TX__AUART1_TX,
  74         MX28_PAD_AUART1_CTS__AUART1_CTS,
  75         MX28_PAD_AUART1_RTS__AUART1_RTS,
  76 #elif CONFIG_CONS_INDEX == 2
  77         MX28_PAD_AUART3_RX__AUART3_RX,
  78         MX28_PAD_AUART3_TX__AUART3_TX,
  79         MX28_PAD_AUART3_CTS__AUART3_CTS,
  80         MX28_PAD_AUART3_RTS__AUART3_RTS,
  81 #endif
  82         /* I2C bus for internal DS1339, PCA9554 and on DIMM pins 40/41 */
  83         MX28_PAD_I2C0_SCL__I2C0_SCL,
  84         MX28_PAD_I2C0_SDA__I2C0_SDA,
  85
  86         /* USBH VBUSEN, OC */
  87         MX28_PAD_SPDIF__GPIO_3_27,
  88         MX28_PAD_JTAG_RTCK__GPIO_4_20,
  89
  90         /* USBOTG VBUSEN, OC, ID */
  91         MX28_PAD_GPMI_CE2N__GPIO_0_18,
  92         MX28_PAD_GPMI_CE3N__GPIO_0_19,
  93         MX28_PAD_PWM2__GPIO_3_18,
  94 };
  95
  96 /*
  97  * Functions
  98  */
  99
 100 /* provide at least _some_ sort of randomness */
 101 #define MAX_LOOPS       100
 102
 103 static u32 random;
 104
 105 static inline void random_init(void)
 106 {
 107         struct mxs_digctl_regs *digctl_regs = (void *)MXS_DIGCTL_BASE;
 108         u32 seed = 0;
 109         int i;
 110
 111         for (i = 0; i < MAX_LOOPS; i++) {
 112                 u32 hclk = readl(&digctl_regs->hw_digctl_hclkcount);
 113                 u32 entropy = readl(&digctl_regs->hw_digctl_entropy);
 114                 u32 usec = readl(&digctl_regs->hw_digctl_microseconds);
 115
 116                 seed = get_timer(hclk ^ entropy ^ usec ^ random ^ seed);
 117                 srand(seed);
 118                 random = rand();
 119         }
 120 }
 121
 122 #define RTC_PERSISTENT0_CLK32_MASK      (RTC_PERSISTENT0_CLOCKSOURCE |  \
 123                                         RTC_PERSISTENT0_XTAL32KHZ_PWRUP)
 124 static u32 boot_cause __attribute__((section("data")));
 125
 126 int board_early_init_f(void)
 127 {
 128         struct mxs_rtc_regs *rtc_regs = (void *)MXS_RTC_BASE;
 129         u32 rtc_stat;
 130         int timeout = 5000;
 131
 132         random_init();
 133
 134         /* IO0 clock at 480MHz */
 135         mxs_set_ioclk(MXC_IOCLK0, 480000);
 136         /* IO1 clock at 480MHz */
 137         mxs_set_ioclk(MXC_IOCLK1, 480000);
 138
 139         /* SSP0 clock at 96MHz */
 140         mxs_set_sspclk(MXC_SSPCLK0, 96000, 0);
 141         /* SSP2 clock at 96MHz */
 142         mxs_set_sspclk(MXC_SSPCLK2, 96000, 0);
 143
 144         gpio_request_array(tx28_gpios, ARRAY_SIZE(tx28_gpios));
 145         mxs_iomux_setup_multiple_pads(tx28_pads, ARRAY_SIZE(tx28_pads));
 146
 147         while ((rtc_stat = readl(&rtc_regs->hw_rtc_stat)) &
 148                 RTC_STAT_STALE_REGS_PERSISTENT0) {
 149                 if (timeout-- < 0)
 150                         return 1;
 151                 udelay(1);
 152         }
 153         boot_cause = readl(&rtc_regs->hw_rtc_persistent0);
 154         if ((boot_cause & RTC_PERSISTENT0_CLK32_MASK) !=
 155                 RTC_PERSISTENT0_CLK32_MASK) {
 156                 if (boot_cause & RTC_PERSISTENT0_CLOCKSOURCE)
 157                         goto rtc_err;
 158                 writel(RTC_PERSISTENT0_CLK32_MASK,
 159                         &rtc_regs->hw_rtc_persistent0_set);
 160         }
 161         return 0;
 162
 163 rtc_err:
 164         serial_puts("Inconsistent value in RTC_PERSISTENT0 register; power-on-reset required\n");
 165         return 1;
 166 }
 167
 168 int board_init(void)
 169 {
 170         if (ctrlc()) {
 171                 printf("CTRL-C detected; safeboot enabled\n");
 172                 return 1;
 173         }
 174
 175         /* Address of boot parameters */
 176 #ifdef CONFIG_OF_LIBFDT
 177         gd->bd->bi_arch_number = -1;
 178 #endif
 179         gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x1000;
 180         return 0;
 181 }
 182
 183 int dram_init(void)
 184 {
 185         return mxs_dram_init();
 186 }
 187
 188 #ifdef  CONFIG_CMD_MMC
 189 static int tx28_mmc_wp(int dev_no)
 190 {
 191         return 0;
 192 }
 193
 194 int board_mmc_init(bd_t *bis)
 195 {
 196         return mxsmmc_initialize(bis, 0, tx28_mmc_wp, NULL);
 197 }
 198 #endif /* CONFIG_CMD_MMC */
 199
 200 #ifdef CONFIG_FEC_MXC
 201 #ifdef CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
 202
 203 #ifdef CONFIG_FEC_MXC_MULTI
 204 #define FEC_MAX_IDX                     1
 205 #else
 206 #define FEC_MAX_IDX                     0
 207 #endif
 208 #ifndef ETH_ALEN
 209 #define ETH_ALEN                        6
 210 #endif
 211
 212 static int fec_get_mac_addr(int index)
 213 {
 214         int timeout = 1000;
 215         struct mxs_ocotp_regs *ocotp_regs =
 216                 (struct mxs_ocotp_regs *)MXS_OCOTP_BASE;
 217         u32 *cust = &ocotp_regs->hw_ocotp_cust0;
 218         u8 mac[ETH_ALEN];
 219         char env_name[] = "eth.addr";
 220         u32 val = 0;
 221         int i;
 222
 223         if (index < 0 || index > FEC_MAX_IDX)
 224                 return -EINVAL;
 225
 226         /* set this bit to open the OTP banks for reading */
 227         writel(OCOTP_CTRL_RD_BANK_OPEN,
 228                 &ocotp_regs->hw_ocotp_ctrl_set);
 229
 230         /* wait until OTP contents are readable */
 231         while (OCOTP_CTRL_BUSY & readl(&ocotp_regs->hw_ocotp_ctrl)) {
 232                 if (timeout-- < 0)
 233                         return -ETIMEDOUT;
 234                 udelay(100);
 235         }
 236
 237         for (i = 0; i < sizeof(mac); i++) {
 238                 int shift = 24 - i % 4 * 8;
 239
 240                 if (i % 4 == 0)
 241                         val = readl(&cust[index * 8 + i]);
 242                 mac[i] = val >> shift;
 243         }
 244         if (!is_valid_ether_addr(mac)) {
 245                 if (index == 0)
 246                         printf("No valid MAC address programmed\n");
 247                 return 0;
 248         }
 249
 250         if (index == 0) {
 251                 printf("MAC addr from fuse: %pM\n", mac);
 252                 snprintf(env_name, sizeof(env_name), "ethaddr");
 253         } else {
 254                 snprintf(env_name, sizeof(env_name), "eth%daddr", index);
 255         }
 256         eth_setenv_enetaddr(env_name, mac);
 257         return 0;
 258 }
 259 #endif /* CONFIG_GET_FEC_MAC_ADDR_FROM_IIM */
 260
 261 static const iomux_cfg_t tx28_fec_pads[] = {
 262         MX28_PAD_ENET0_RX_EN__ENET0_RX_EN,
 263         MX28_PAD_ENET0_RXD0__ENET0_RXD0,
 264         MX28_PAD_ENET0_RXD1__ENET0_RXD1,
 265 };
 266
 267 int board_eth_init(bd_t *bis)
 268 {
 269         int ret;
 270
 271         /* Reset the external phy */
 272         gpio_direction_output(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 0);
 273
 274         /* Power on the external phy */
 275         gpio_direction_output(MX28_PAD_PWM4__GPIO_3_29, 1);
 276
 277         /* Pull strap pins to high */
 278         gpio_direction_output(MX28_PAD_ENET0_RX_EN__GPIO_4_2, 1);
 279         gpio_direction_output(MX28_PAD_ENET0_RXD0__GPIO_4_3, 1);
 280         gpio_direction_output(MX28_PAD_ENET0_RXD1__GPIO_4_4, 1);
 281         gpio_direction_input(MX28_PAD_ENET0_TX_CLK__GPIO_4_5);
 282
 283         udelay(25000);
 284         gpio_set_value(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 1);
 285         udelay(100);
 286
 287         mxs_iomux_setup_multiple_pads(tx28_fec_pads, ARRAY_SIZE(tx28_fec_pads));
 288
 289         ret = cpu_eth_init(bis);
 290         if (ret) {
 291                 printf("cpu_eth_init() failed: %d\n", ret);
 292                 return ret;
 293         }
 294
 295 #ifdef CONFIG_FEC_MXC_MULTI
 296         if (getenv("ethaddr")) {
 297                 ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE);
 298                 if (ret) {
 299                         printf("FEC MXS: Unable to init FEC0\n");
 300                         return ret;
 301                 }
 302         }
 303
 304         if (getenv("eth1addr")) {
 305                 ret = fecmxc_initialize_multi(bis, 1, 1, MXS_ENET1_BASE);
 306                 if (ret) {
 307                         printf("FEC MXS: Unable to init FEC1\n");
 308                         return ret;
 309                 }
 310         }
 311 #else
 312         if (getenv("ethaddr")) {
 313                 ret = fecmxc_initialize(bis);
 314                 if (ret) {
 315                         printf("FEC MXS: Unable to init FEC\n");
 316                         return ret;
 317                 }
 318         }
 319 #endif
 320         return 0;
 321 }
 322 #endif /* CONFIG_FEC_MXC */
 323
 324 enum {
 325         LED_STATE_INIT = -1,
 326         LED_STATE_OFF,
 327         LED_STATE_ON,
 328 };
 329
 330 void show_activity(int arg)
 331 {
 332         static int led_state = LED_STATE_INIT;
 333         static ulong last;
 334
 335         if (led_state == LED_STATE_INIT) {
 336                 last = get_timer(0);
 337                 gpio_set_value(TX28_LED_GPIO, 1);
 338                 led_state = LED_STATE_ON;
 339         } else {
 340                 if (get_timer(last) > CONFIG_SYS_HZ) {
 341                         last = get_timer(0);
 342                         if (led_state == LED_STATE_ON) {
 343                                 gpio_set_value(TX28_LED_GPIO, 0);
 344                         } else {
 345                                 gpio_set_value(TX28_LED_GPIO, 1);
 346                         }
 347                         led_state = 1 - led_state;
 348                 }
 349         }
 350 }
 351
 352 static const iomux_cfg_t stk5_pads[] = {
 353         /* SW controlled LED on STK5 baseboard */
 354         MX28_PAD_ENET0_RXD3__GPIO_4_10,
 355 };
 356
 357 static const struct gpio stk5_gpios[] = {
 358 };
 359
 360 #ifdef CONFIG_LCD
 361 static ushort tx28_cmap[256];
 362 vidinfo_t panel_info = {
 363         /* set to max. size supported by SoC */
 364         .vl_col = 1600,
 365         .vl_row = 1200,
 366
 367         .vl_bpix = LCD_COLOR32,    /* Bits per pixel, 0: 1bpp, 1: 2bpp, 2: 4bpp, 3: 8bpp ... */
 368         .cmap = tx28_cmap,
 369 };
 370
 371 static struct fb_videomode tx28_fb_modes[] = {
 372         {
 373                 /* Standard VGA timing */
 374                 .name           = "VGA",
 375                 .refresh        = 60,
 376                 .xres           = 640,
 377                 .yres           = 480,
 378                 .pixclock       = KHZ2PICOS(25175),
 379                 .left_margin    = 48,
 380                 .hsync_len      = 96,
 381                 .right_margin   = 16,
 382                 .upper_margin   = 31,
 383                 .vsync_len      = 2,
 384                 .lower_margin   = 12,
 385                 .vmode          = FB_VMODE_NONINTERLACED,
 386         },
 387         {
 388                 /* Emerging ETV570 640 x 480 display. Syncs low active,
 389                  * DE high active, 115.2 mm x 86.4 mm display area
 390                  * VGA compatible timing
 391                  */
 392                 .name           = "ETV570",
 393                 .refresh        = 60,
 394                 .xres           = 640,
 395                 .yres           = 480,
 396                 .pixclock       = KHZ2PICOS(25175),
 397                 .left_margin    = 114,
 398                 .hsync_len      = 30,
 399                 .right_margin   = 16,
 400                 .upper_margin   = 32,
 401                 .vsync_len      = 3,
 402                 .lower_margin   = 10,
 403                 .vmode          = FB_VMODE_NONINTERLACED,
 404         },
 405         {
 406                 /* Emerging ET0350G0DH6 320 x 240 display.
 407                  * 70.08 mm x 52.56 mm display area.
 408                  */
 409                 .name           = "ET0350",
 410                 .refresh        = 60,
 411                 .xres           = 320,
 412                 .yres           = 240,
 413                 .pixclock       = KHZ2PICOS(6500),
 414                 .left_margin    = 68 - 34,
 415                 .hsync_len      = 34,
 416                 .right_margin   = 20,
 417                 .upper_margin   = 18 - 3,
 418                 .vsync_len      = 3,
 419                 .lower_margin   = 4,
 420                 .vmode          = FB_VMODE_NONINTERLACED,
 421         },
 422         {
 423                 /* Emerging ET0430G0DH6 480 x 272 display.
 424                  * 95.04 mm x 53.856 mm display area.
 425                  */
 426                 .name           = "ET0430",
 427                 .refresh        = 60,
 428                 .xres           = 480,
 429                 .yres           = 272,
 430                 .pixclock       = KHZ2PICOS(9000),
 431                 .left_margin    = 2,
 432                 .hsync_len      = 41,
 433                 .right_margin   = 2,
 434                 .upper_margin   = 2,
 435                 .vsync_len      = 10,
 436                 .lower_margin   = 2,
 437                 .sync           = FB_SYNC_CLK_LAT_FALL,
 438                 .vmode          = FB_VMODE_NONINTERLACED,
 439         },
 440         {
 441                 /* Emerging ET0500G0DH6 800 x 480 display.
 442                  * 109.6 mm x 66.4 mm display area.
 443                  */
 444                 .name           = "ET0500",
 445                 .refresh        = 60,
 446                 .xres           = 800,
 447                 .yres           = 480,
 448                 .pixclock       = KHZ2PICOS(33260),
 449                 .left_margin    = 216 - 128,
 450                 .hsync_len      = 128,
 451                 .right_margin   = 1056 - 800 - 216,
 452                 .upper_margin   = 35 - 2,
 453                 .vsync_len      = 2,
 454                 .lower_margin   = 525 - 480 - 35,
 455                 .vmode          = FB_VMODE_NONINTERLACED,
 456         },
 457         {
 458                 /* Emerging ETQ570G0DH6 320 x 240 display.
 459                  * 115.2 mm x 86.4 mm display area.
 460                  */
 461                 .name           = "ETQ570",
 462                 .refresh        = 60,
 463                 .xres           = 320,
 464                 .yres           = 240,
 465                 .pixclock       = KHZ2PICOS(6400),
 466                 .left_margin    = 38,
 467                 .hsync_len      = 30,
 468                 .right_margin   = 30,
 469                 .upper_margin   = 16, /* 15 according to datasheet */
 470                 .vsync_len      = 3, /* TVP -> 1>x>5 */
 471                 .lower_margin   = 4, /* 4.5 according to datasheet */
 472                 .vmode          = FB_VMODE_NONINTERLACED,
 473         },
 474         {
 475                 /* Emerging ET0700G0DH6 800 x 480 display.
 476                  * 152.4 mm x 91.44 mm display area.
 477                  */
 478                 .name           = "ET0700",
 479                 .refresh        = 60,
 480                 .xres           = 800,
 481                 .yres           = 480,
 482                 .pixclock       = KHZ2PICOS(33260),
 483                 .left_margin    = 216 - 128,
 484                 .hsync_len      = 128,
 485                 .right_margin   = 1056 - 800 - 216,
 486                 .upper_margin   = 35 - 2,
 487                 .vsync_len      = 2,
 488                 .lower_margin   = 525 - 480 - 35,
 489                 .vmode          = FB_VMODE_NONINTERLACED,
 490         },
 491         {
 492                 /* unnamed entry for assigning parameters parsed from 'video_mode' string */
 493                 .vmode          = FB_VMODE_NONINTERLACED,
 494         },
 495 };
 496
 497 static int lcd_enabled = 1;
 498 static int lcd_bl_polarity;
 499
 500 static int lcd_backlight_polarity(void)
 501 {
 502         return lcd_bl_polarity;
 503 }
 504
 505 void lcd_enable(void)
 506 {
 507         /* HACK ALERT:
 508          * global variable from common/lcd.c
 509          * Set to 0 here to prevent messages from going to LCD
 510          * rather than serial console
 511          */
 512         lcd_is_enabled = 0;
 513
 514         karo_load_splashimage(1);
 515         if (lcd_enabled) {
 516                 debug("Switching LCD on\n");
 517                 gpio_set_value(TX28_LCD_PWR_GPIO, 1);
 518                 udelay(100);
 519                 gpio_set_value(TX28_LCD_RST_GPIO, 1);
 520                 udelay(300000);
 521                 gpio_set_value(TX28_LCD_BACKLIGHT_GPIO,
 522                         lcd_backlight_polarity());
 523         }
 524 }
 525
 526 void lcd_disable(void)
 527 {
 528 }
 529
 530 void lcd_panel_disable(void)
 531 {
 532         if (lcd_enabled) {
 533                 debug("Switching LCD off\n");
 534                 gpio_set_value(TX28_LCD_BACKLIGHT_GPIO,
 535                         !lcd_backlight_polarity());
 536                 gpio_set_value(TX28_LCD_RST_GPIO, 0);
 537                 gpio_set_value(TX28_LCD_PWR_GPIO, 0);
 538         }
 539 }
 540
 541 static const iomux_cfg_t stk5_lcd_pads[] = {
 542         /* LCD RESET */
 543         MX28_PAD_LCD_RESET__GPIO_3_30 | MXS_PAD_CTRL,
 544         /* LCD POWER_ENABLE */
 545         MX28_PAD_LCD_ENABLE__GPIO_1_31 | MXS_PAD_CTRL,
 546         /* LCD Backlight (PWM) */
 547         MX28_PAD_PWM0__GPIO_3_16 | MXS_PAD_CTRL,
 548
 549         /* Display */
 550         MX28_PAD_LCD_D00__LCD_D0 | MXS_PAD_CTRL,
 551         MX28_PAD_LCD_D01__LCD_D1 | MXS_PAD_CTRL,
 552         MX28_PAD_LCD_D02__LCD_D2 | MXS_PAD_CTRL,
 553         MX28_PAD_LCD_D03__LCD_D3 | MXS_PAD_CTRL,
 554         MX28_PAD_LCD_D04__LCD_D4 | MXS_PAD_CTRL,
 555         MX28_PAD_LCD_D05__LCD_D5 | MXS_PAD_CTRL,
 556         MX28_PAD_LCD_D06__LCD_D6 | MXS_PAD_CTRL,
 557         MX28_PAD_LCD_D07__LCD_D7 | MXS_PAD_CTRL,
 558         MX28_PAD_LCD_D08__LCD_D8 | MXS_PAD_CTRL,
 559         MX28_PAD_LCD_D09__LCD_D9 | MXS_PAD_CTRL,
 560         MX28_PAD_LCD_D10__LCD_D10 | MXS_PAD_CTRL,
 561         MX28_PAD_LCD_D11__LCD_D11 | MXS_PAD_CTRL,
 562         MX28_PAD_LCD_D12__LCD_D12 | MXS_PAD_CTRL,
 563         MX28_PAD_LCD_D13__LCD_D13 | MXS_PAD_CTRL,
 564         MX28_PAD_LCD_D14__LCD_D14 | MXS_PAD_CTRL,
 565         MX28_PAD_LCD_D15__LCD_D15 | MXS_PAD_CTRL,
 566         MX28_PAD_LCD_D16__LCD_D16 | MXS_PAD_CTRL,
 567         MX28_PAD_LCD_D17__LCD_D17 | MXS_PAD_CTRL,
 568         MX28_PAD_LCD_D18__LCD_D18 | MXS_PAD_CTRL,
 569         MX28_PAD_LCD_D19__LCD_D19 | MXS_PAD_CTRL,
 570         MX28_PAD_LCD_D20__LCD_D20 | MXS_PAD_CTRL,
 571         MX28_PAD_LCD_D21__LCD_D21 | MXS_PAD_CTRL,
 572         MX28_PAD_LCD_D22__LCD_D22 | MXS_PAD_CTRL,
 573         MX28_PAD_LCD_D23__LCD_D23 | MXS_PAD_CTRL,
 574         MX28_PAD_LCD_RD_E__LCD_VSYNC | MXS_PAD_CTRL,
 575         MX28_PAD_LCD_WR_RWN__LCD_HSYNC | MXS_PAD_CTRL,
 576         MX28_PAD_LCD_RS__LCD_DOTCLK | MXS_PAD_CTRL,
 577         MX28_PAD_LCD_CS__LCD_CS | MXS_PAD_CTRL,
 578 };
 579
 580 static const struct gpio stk5_lcd_gpios[] = {
 581         { TX28_LCD_RST_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "LCD RESET", },
 582         { TX28_LCD_PWR_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "LCD POWER", },
 583         { TX28_LCD_BACKLIGHT_GPIO, GPIOFLAG_OUTPUT_INIT_HIGH, "LCD BACKLIGHT", },
 584 };
 585
 586 extern void video_hw_init(void *lcdbase);
 587
 588 void lcd_ctrl_init(void *lcdbase)
 589 {
 590         int color_depth = 24;
 591         const char *video_mode = karo_get_vmode(getenv("video_mode"));
 592         const char *vm;
 593         unsigned long val;
 594         int refresh = 60;
 595         struct fb_videomode *p = tx28_fb_modes;
 596         struct fb_videomode fb_mode;
 597         int xres_set = 0, yres_set = 0, bpp_set = 0, refresh_set = 0;
 598
 599         if (!lcd_enabled) {
 600                 debug("LCD disabled\n");
 601                 return;
 602         }
 603
 604         if (had_ctrlc()) {
 605                 debug("Disabling LCD\n");
 606                 lcd_enabled = 0;
 607                 setenv("splashimage", NULL);
 608                 return;
 609         }
 610
 611         karo_fdt_move_fdt();
 612         lcd_bl_polarity = karo_fdt_get_backlight_polarity(working_fdt);
 613
 614         if (video_mode == NULL) {
 615                 debug("Disabling LCD\n");
 616                 lcd_enabled = 0;
 617                 return;
 618         }
 619         vm = video_mode;
 620         if (karo_fdt_get_fb_mode(working_fdt, video_mode, &fb_mode) == 0) {
 621                 p = &fb_mode;
 622                 debug("Using video mode from FDT\n");
 623                 vm += strlen(vm);
 624                 if (fb_mode.xres > panel_info.vl_col ||
 625                         fb_mode.yres > panel_info.vl_row) {
 626                         printf("video resolution from DT: %dx%d exceeds hardware limits: %dx%d\n",
 627                                 fb_mode.xres, fb_mode.yres,
 628                                 panel_info.vl_col, panel_info.vl_row);
 629                         lcd_enabled = 0;
 630                         return;
 631                 }
 632         }
 633         if (p->name != NULL)
 634                 debug("Trying compiled-in video modes\n");
 635         while (p->name != NULL) {
 636                 if (strcmp(p->name, vm) == 0) {
 637                         debug("Using video mode: '%s'\n", p->name);
 638                         vm += strlen(vm);
 639                         break;
 640                 }
 641                 p++;
 642         }
 643         if (*vm != '\0')
 644                 debug("Trying to decode video_mode: '%s'\n", vm);
 645         while (*vm != '\0') {
 646                 if (*vm >= '0' && *vm <= '9') {
 647                         char *end;
 648
 649                         val = simple_strtoul(vm, &end, 0);
 650                         if (end > vm) {
 651                                 if (!xres_set) {
 652                                         if (val > panel_info.vl_col)
 653                                                 val = panel_info.vl_col;
 654                                         p->xres = val;
 655                                         panel_info.vl_col = val;
 656                                         xres_set = 1;
 657                                 } else if (!yres_set) {
 658                                         if (val > panel_info.vl_row)
 659                                                 val = panel_info.vl_row;
 660                                         p->yres = val;
 661                                         panel_info.vl_row = val;
 662                                         yres_set = 1;
 663                                 } else if (!bpp_set) {
 664                                         switch (val) {
 665                                         case 8:
 666                                         case 16:
 667                                         case 18:
 668                                         case 24:
 669                                                 color_depth = val;
 670                                                 break;
 671
 672                                         default:
 673                                                 printf("Invalid color depth: '%.*s' in video_mode; using default: '%u'\n",
 674                                                         end - vm, vm, color_depth);
 675                                         }
 676                                         bpp_set = 1;
 677                                 } else if (!refresh_set) {
 678                                         refresh = val;
 679                                         refresh_set = 1;
 680                                 }
 681                         }
 682                         vm = end;
 683                 }
 684                 switch (*vm) {
 685                 case '@':
 686                         bpp_set = 1;
 687                         /* fallthru */
 688                 case '-':
 689                         yres_set = 1;
 690                         /* fallthru */
 691                 case 'x':
 692                         xres_set = 1;
 693                         /* fallthru */
 694                 case 'M':
 695                 case 'R':
 696                         vm++;
 697                         break;
 698
 699                 default:
 700                         if (*vm != '\0')
 701                                 vm++;
 702                 }
 703         }
 704         if (p->xres == 0 || p->yres == 0) {
 705                 printf("Invalid video mode: %s\n", getenv("video_mode"));
 706                 lcd_enabled = 0;
 707                 printf("Supported video modes are:");
 708                 for (p = &tx28_fb_modes[0]; p->name != NULL; p++) {
 709                         printf(" %s", p->name);
 710                 }
 711                 printf("\n");
 712                 return;
 713         }
 714         if (p->xres > panel_info.vl_col || p->yres > panel_info.vl_row) {
 715                 printf("video resolution: %dx%d exceeds hardware limits: %dx%d\n",
 716                         p->xres, p->yres, panel_info.vl_col, panel_info.vl_row);
 717                 lcd_enabled = 0;
 718                 return;
 719         }
 720         panel_info.vl_col = p->xres;
 721         panel_info.vl_row = p->yres;
 722
 723         switch (color_depth) {
 724         case 8:
 725                 panel_info.vl_bpix = LCD_COLOR8;
 726                 break;
 727         case 16:
 728                 panel_info.vl_bpix = LCD_COLOR16;
 729                 break;
 730         default:
 731                 panel_info.vl_bpix = LCD_COLOR32;
 732         }
 733
 734         p->pixclock = KHZ2PICOS(refresh *
 735                 (p->xres + p->left_margin + p->right_margin + p->hsync_len) *
 736                 (p->yres + p->upper_margin + p->lower_margin + p->vsync_len) /
 737                                 1000);
 738         debug("Pixel clock set to %lu.%03lu MHz\n",
 739                 PICOS2KHZ(p->pixclock) / 1000, PICOS2KHZ(p->pixclock) % 1000);
 740
 741         if (p != &fb_mode) {
 742                 int ret;
 743
 744                 debug("Creating new display-timing node from '%s'\n",
 745                         video_mode);
 746                 ret = karo_fdt_create_fb_mode(working_fdt, video_mode, p);
 747                 if (ret)
 748                         printf("Failed to create new display-timing node from '%s': %d\n",
 749                                 video_mode, ret);
 750         }
 751
 752         gpio_request_array(stk5_lcd_gpios, ARRAY_SIZE(stk5_lcd_gpios));
 753         mxs_iomux_setup_multiple_pads(stk5_lcd_pads,
 754                                 ARRAY_SIZE(stk5_lcd_pads));
 755
 756         debug("video format: %ux%u-%u@%u\n", p->xres, p->yres,
 757                 color_depth, refresh);
 758
 759         if (karo_load_splashimage(0) == 0) {
 760                 char vmode[128];
 761
 762                 /* setup env variable for mxsfb display driver */
 763                 snprintf(vmode, sizeof(vmode),
 764                         "x:%d,y:%d,le:%d,ri:%d,up:%d,lo:%d,hs:%d,vs:%d,sync:%d,pclk:%d,depth:%d",
 765                         p->xres, p->yres, p->left_margin, p->right_margin,
 766                         p->upper_margin, p->lower_margin, p->hsync_len,
 767                         p->vsync_len, p->sync, p->pixclock, color_depth);
 768                 setenv("videomode", vmode);
 769
 770                 debug("Initializing LCD controller\n");
 771                 video_hw_init(lcdbase);
 772                 setenv("videomode", NULL);
 773         } else {
 774                 debug("Skipping initialization of LCD controller\n");
 775         }
 776 }
 777 #else
 778 #define lcd_enabled 0
 779 #endif /* CONFIG_LCD */
 780
 781 static void stk5_board_init(void)
 782 {
 783         gpio_request_array(stk5_gpios, ARRAY_SIZE(stk5_gpios));
 784         mxs_iomux_setup_multiple_pads(stk5_pads, ARRAY_SIZE(stk5_pads));
 785 }
 786
 787 static void stk5v3_board_init(void)
 788 {
 789         stk5_board_init();
 790 }
 791
 792 static void stk5v5_board_init(void)
 793 {
 794         stk5_board_init();
 795
 796         /* init flexcan transceiver enable GPIO */
 797         gpio_request_one(STK5_CAN_XCVR_GPIO, GPIOFLAG_OUTPUT_INIT_HIGH,
 798                         "Flexcan Transceiver");
 799         SETUP_IOMUX_PAD(STK5_CAN_XCVR_GPIO);
 800 }
 801
 802 int tx28_fec1_enabled(void)
 803 {
 804         const char *status;
 805         int off;
 806
 807         if (!gd->fdt_blob)
 808                 return 0;
 809
 810         off = fdt_path_offset(gd->fdt_blob, "ethernet1");
 811         if (off < 0)
 812                 return 0;
 813
 814         status = fdt_getprop(gd->fdt_blob, off, "status", NULL);
 815         return status && (strcmp(status, "okay") == 0);
 816 }
 817
 818 static void tx28_init_mac(void)
 819 {
 820         int ret;
 821
 822         ret = fec_get_mac_addr(0);
 823         if (ret < 0) {
 824                 printf("Failed to read FEC0 MAC address from OCOTP\n");
 825                 return;
 826         }
 827 #ifdef CONFIG_FEC_MXC_MULTI
 828         if (tx28_fec1_enabled()) {
 829                 ret = fec_get_mac_addr(1);
 830                 if (ret < 0) {
 831                         printf("Failed to read FEC1 MAC address from OCOTP\n");
 832                         return;
 833                 }
 834         }
 835 #endif
 836 }
 837
 838 int board_late_init(void)
 839 {
 840         int ret = 0;
 841         const char *baseboard;
 842
 843         env_cleanup();
 844
 845         if (had_ctrlc())
 846                 setenv_ulong("safeboot", 1);
 847         else
 848                 karo_fdt_move_fdt();
 849
 850         baseboard = getenv("baseboard");
 851         if (!baseboard)
 852                 goto exit;
 853
 854         printf("Baseboard: %s\n", baseboard);
 855
 856         if (strncmp(baseboard, "stk5", 4) == 0) {
 857                 if ((strlen(baseboard) == 4) ||
 858                         strcmp(baseboard, "stk5-v3") == 0) {
 859                         stk5v3_board_init();
 860                 } else if (strcmp(baseboard, "stk5-v5") == 0) {
 861                         const char *otg_mode = getenv("otg_mode");
 862
 863                         if (otg_mode && strcmp(otg_mode, "host") == 0) {
 864                                 printf("otg_mode='%s' is incompatible with baseboard %s; setting to 'none'\n",
 865                                         otg_mode, baseboard);
 866                                 setenv("otg_mode", "none");
 867                         }
 868                         stk5v5_board_init();
 869                 } else {
 870                         printf("WARNING: Unsupported STK5 board rev.: %s\n",
 871                                 baseboard + 4);
 872                 }
 873         } else {
 874                 printf("WARNING: Unsupported baseboard: '%s'\n",
 875                         baseboard);
 876                 ret = -EINVAL;
 877         }
 878
 879 exit:
 880         tx28_init_mac();
 881         clear_ctrlc();
 882         return ret;
 883 }
 884
 885 #define BOOT_CAUSE_MASK         (RTC_PERSISTENT0_EXTERNAL_RESET |       \
 886                                 RTC_PERSISTENT0_ALARM_WAKE |            \
 887                                 RTC_PERSISTENT0_THERMAL_RESET)
 888
 889 static void thermal_init(void)
 890 {
 891         struct mxs_power_regs *power_regs = (void *)MXS_POWER_BASE;
 892         struct mxs_clkctrl_regs *clkctrl_regs = (void *)MXS_CLKCTRL_BASE;
 893
 894         writel(POWER_THERMAL_LOW_POWER | POWER_THERMAL_OFFSET_ADJ_ENABLE |
 895                 POWER_THERMAL_OFFSET_ADJ_OFFSET(3),
 896                 &power_regs->hw_power_thermal);
 897
 898         writel(CLKCTRL_RESET_EXTERNAL_RESET_ENABLE |
 899                 CLKCTRL_RESET_THERMAL_RESET_ENABLE,
 900                 &clkctrl_regs->hw_clkctrl_reset);
 901 }
 902
 903 int checkboard(void)
 904 {
 905         struct mxs_power_regs *power_regs = (void *)MXS_POWER_BASE;
 906         u32 pwr_sts = readl(&power_regs->hw_power_sts);
 907         u32 pwrup_src = (pwr_sts >> 24) & 0x3f;
 908         const char *dlm = "";
 909
 910         printf("Board: Ka-Ro TX28-4%sx%d\n", TX28_MOD_SUFFIX,
 911                 CONFIG_SDRAM_SIZE / SZ_128M +
 912                 CONFIG_SYS_NAND_BLOCKS / 2048 * 2);
 913
 914         printf("POWERUP Source: ");
 915         if (pwrup_src & (3 << 0)) {
 916                 printf("%sPSWITCH %s voltage", dlm,
 917                         pwrup_src & (1 << 1) ? "HIGH" : "MID");
 918                 dlm = " | ";
 919         }
 920         if (pwrup_src & (1 << 4)) {
 921                 printf("%sRTC", dlm);
 922                 dlm = " | ";
 923         }
 924         if (pwrup_src & (1 << 5)) {
 925                 printf("%s5V", dlm);
 926                 dlm = " | ";
 927         }
 928         printf("\n");
 929
 930         if (boot_cause & BOOT_CAUSE_MASK) {
 931                 dlm="";
 932                 printf("Last boot cause: ");
 933                 if (boot_cause & RTC_PERSISTENT0_EXTERNAL_RESET) {
 934                         printf("%sEXTERNAL", dlm);
 935                         dlm = " | ";
 936                 }
 937                 if (boot_cause & RTC_PERSISTENT0_THERMAL_RESET) {
 938                         printf("%sTHERMAL", dlm);
 939                         dlm = " | ";
 940                 }
 941                 if (*dlm != '\0')
 942                         printf(" RESET");
 943                 if (boot_cause & RTC_PERSISTENT0_ALARM_WAKE) {
 944                         printf("%sALARM WAKE", dlm);
 945                         dlm = " | ";
 946                 }
 947                 printf("\n");
 948         }
 949
 950         while (pwr_sts & POWER_STS_THERMAL_WARNING) {
 951                 static int first = 1;
 952
 953                 if (first) {
 954                         printf("CPU too hot to boot\n");
 955                         first = 0;
 956                 }
 957                 if (tstc())
 958                         break;
 959                 pwr_sts = readl(&power_regs->hw_power_sts);
 960         }
 961
 962         if (!(boot_cause & RTC_PERSISTENT0_THERMAL_RESET))
 963                 thermal_init();
 964
 965         return 0;
 966 }
 967
 968 #if defined(CONFIG_OF_BOARD_SETUP)
 969 #ifdef CONFIG_FDT_FIXUP_PARTITIONS
 970 #include <jffs2/jffs2.h>
 971 #include <mtd_node.h>
 972 static struct node_info tx28_nand_nodes[] = {
 973         { "fsl,imx28-gpmi-nand", MTD_DEV_TYPE_NAND, },
 974 };
 975 #else
 976 #define fdt_fixup_mtdparts(b,n,c) do { } while (0)
 977 #endif
 978
 979 static const char *tx28_touchpanels[] = {
 980         "ti,tsc2007",
 981         "edt,edt-ft5x06",
 982         "fsl,imx28-lradc",
 983 };
 984
 985 int ft_board_setup(void *blob, bd_t *bd)
 986 {
 987         const char *baseboard = getenv("baseboard");
 988         int stk5_v5 = baseboard != NULL && (strcmp(baseboard, "stk5-v5") == 0);
 989         const char *video_mode = karo_get_vmode(getenv("video_mode"));
 990         int ret;
 991
 992         ret = fdt_increase_size(blob, 4096);
 993         if (ret) {
 994                 printf("Failed to increase FDT size: %s\n", fdt_strerror(ret));
 995                 return ret;
 996         }
 997 #ifdef CONFIG_TX28_S
 998         /* TX28-41xx (aka TX28S) has no external RTC
 999          * and no I2C GPIO extender
1000          */
1001         karo_fdt_remove_node(blob, "ds1339");
1002         karo_fdt_remove_node(blob, "gpio5");
1003 #endif
1004         if (stk5_v5)
1005                 karo_fdt_enable_node(blob, "stk5led", 0);
1006
1007         fdt_fixup_mtdparts(blob, tx28_nand_nodes, ARRAY_SIZE(tx28_nand_nodes));
1008         fdt_fixup_ethernet(blob);
1009
1010         karo_fdt_fixup_touchpanel(blob, tx28_touchpanels,
1011                                 ARRAY_SIZE(tx28_touchpanels));
1012         karo_fdt_fixup_usb_otg(blob, "usbotg", "fsl,usbphy", "vbus-supply");
1013         karo_fdt_fixup_flexcan(blob, stk5_v5);
1014         karo_fdt_update_fb_mode(blob, video_mode);
1015
1016         return 0;
1017 }
1018 #endif /* CONFIG_OF_BOARD_SETUP */