board/karo/tx28/tx28.c

   1 /*
   2  * Copyright (C) 2011-2013 Lothar Waßmann <LW@KARO-electronics.de>
   3  * based on: board/freescale/mx28_evk.c (C) 2010 Freescale Semiconductor, Inc.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License
  10  * version 2 as published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  */
  18
  19 #include <common.h>
  20 #include <errno.h>
  21 #include <libfdt.h>
  22 #include <fdt_support.h>
  23 #include <lcd.h>
  24 #include <netdev.h>
  25 #include <mmc.h>
  26 #include <mxcfb.h>
  27 #include <linux/list.h>
  28 #include <linux/fb.h>
  29 #include <asm/io.h>
  30 #include <asm/gpio.h>
  31 #include <asm/arch/iomux-mx28.h>
  32 #include <asm/arch/clock.h>
  33 #include <asm/arch/imx-regs.h>
  34 #include <asm/arch/sys_proto.h>
  35
  36 #include "../common/karo.h"
  37
  38 DECLARE_GLOBAL_DATA_PTR;
  39
  40 #define MXS_GPIO_NR(p, o)      (((p) << 5) | (o))
  41
  42 #define TX28_LCD_PWR_GPIO       MX28_PAD_LCD_ENABLE__GPIO_1_31
  43 #define TX28_LCD_RST_GPIO       MX28_PAD_LCD_RESET__GPIO_3_30
  44 #define TX28_LCD_BACKLIGHT_GPIO MX28_PAD_PWM0__GPIO_3_16
  45
  46 #define TX28_USBH_VBUSEN_GPIO   MX28_PAD_SPDIF__GPIO_3_27
  47 #define TX28_USBH_OC_GPIO       MX28_PAD_JTAG_RTCK__GPIO_4_20
  48 #define TX28_USBOTG_VBUSEN_GPIO MX28_PAD_GPMI_CE2N__GPIO_0_18
  49 #define TX28_USBOTG_OC_GPIO     MX28_PAD_GPMI_CE3N__GPIO_0_19
  50 #define TX28_USBOTG_ID_GPIO     MX28_PAD_PWM2__GPIO_3_18
  51
  52 #define TX28_LED_GPIO           MX28_PAD_ENET0_RXD3__GPIO_4_10
  53
  54 #define STK5_CAN_XCVR_GPIO      MX28_PAD_LCD_D00__GPIO_1_0
  55
  56 static const struct gpio tx28_gpios[] = {
  57         { TX28_USBH_VBUSEN_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "USBH VBUSEN", },
  58         { TX28_USBH_OC_GPIO, GPIOFLAG_INPUT, "USBH OC", },
  59         { TX28_USBOTG_VBUSEN_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "USBOTG VBUSEN", },
  60         { TX28_USBOTG_OC_GPIO, GPIOFLAG_INPUT, "USBOTG OC", },
  61         { TX28_USBOTG_ID_GPIO, GPIOFLAG_INPUT, "USBOTG ID", },
  62 };
  63
  64 static const iomux_cfg_t tx28_pads[] = {
  65         /* UART pads */
  66 #if CONFIG_CONS_INDEX == 0
  67         MX28_PAD_AUART0_RX__DUART_CTS,
  68         MX28_PAD_AUART0_TX__DUART_RTS,
  69         MX28_PAD_AUART0_CTS__DUART_RX,
  70         MX28_PAD_AUART0_RTS__DUART_TX,
  71 #elif CONFIG_CONS_INDEX == 1
  72         MX28_PAD_AUART1_RX__AUART1_RX,
  73         MX28_PAD_AUART1_TX__AUART1_TX,
  74         MX28_PAD_AUART1_CTS__AUART1_CTS,
  75         MX28_PAD_AUART1_RTS__AUART1_RTS,
  76 #elif CONFIG_CONS_INDEX == 2
  77         MX28_PAD_AUART3_RX__AUART3_RX,
  78         MX28_PAD_AUART3_TX__AUART3_TX,
  79         MX28_PAD_AUART3_CTS__AUART3_CTS,
  80         MX28_PAD_AUART3_RTS__AUART3_RTS,
  81 #endif
  82         /* I2C bus for internal DS1339, PCA9554 and on DIMM pins 40/41 */
  83         MX28_PAD_I2C0_SCL__I2C0_SCL,
  84         MX28_PAD_I2C0_SDA__I2C0_SDA,
  85
  86         /* USBH VBUSEN, OC */
  87         MX28_PAD_SPDIF__GPIO_3_27,
  88         MX28_PAD_JTAG_RTCK__GPIO_4_20,
  89
  90         /* USBOTG VBUSEN, OC, ID */
  91         MX28_PAD_GPMI_CE2N__GPIO_0_18,
  92         MX28_PAD_GPMI_CE3N__GPIO_0_19,
  93         MX28_PAD_PWM2__GPIO_3_18,
  94 };
  95
  96 /*
  97  * Functions
  98  */
  99
 100 /* provide at least _some_ sort of randomness */
 101 #define MAX_LOOPS       100
 102
 103 static u32 random __attribute__((section("data")));
 104
 105 static inline void random_init(void)
 106 {
 107         struct mxs_digctl_regs *digctl_regs = (void *)MXS_DIGCTL_BASE;
 108         u32 seed = 0;
 109         int i;
 110
 111         for (i = 0; i < MAX_LOOPS; i++) {
 112                 u32 hclk = readl(&digctl_regs->hw_digctl_hclkcount);
 113                 u32 entropy = readl(&digctl_regs->hw_digctl_entropy);
 114                 u32 usec = readl(&digctl_regs->hw_digctl_microseconds);
 115
 116                 seed = get_timer(hclk ^ entropy ^ usec ^ random ^ seed);
 117                 srand(seed);
 118                 random = rand();
 119         }
 120 }
 121
 122 #define RTC_PERSISTENT0_CLK32_MASK      (RTC_PERSISTENT0_CLOCKSOURCE |  \
 123                                         RTC_PERSISTENT0_XTAL32KHZ_PWRUP)
 124 static u32 boot_cause __attribute__((section("data")));
 125
 126 int board_early_init_f(void)
 127 {
 128         struct mxs_rtc_regs *rtc_regs = (void *)MXS_RTC_BASE;
 129         u32 rtc_stat;
 130         int timeout = 5000;
 131
 132         random_init();
 133
 134         /* IO0 clock at 480MHz */
 135         mxs_set_ioclk(MXC_IOCLK0, 480000);
 136         /* IO1 clock at 480MHz */
 137         mxs_set_ioclk(MXC_IOCLK1, 480000);
 138
 139         /* SSP0 clock at 96MHz */
 140         mxs_set_sspclk(MXC_SSPCLK0, 96000, 0);
 141         /* SSP2 clock at 96MHz */
 142         mxs_set_sspclk(MXC_SSPCLK2, 96000, 0);
 143
 144         gpio_request_array(tx28_gpios, ARRAY_SIZE(tx28_gpios));
 145         mxs_iomux_setup_multiple_pads(tx28_pads, ARRAY_SIZE(tx28_pads));
 146
 147         while ((rtc_stat = readl(&rtc_regs->hw_rtc_stat)) &
 148                 RTC_STAT_STALE_REGS_PERSISTENT0) {
 149                 if (timeout-- < 0)
 150                         return 1;
 151                 udelay(1);
 152         }
 153         boot_cause = readl(&rtc_regs->hw_rtc_persistent0);
 154         if ((boot_cause & RTC_PERSISTENT0_CLK32_MASK) !=
 155                 RTC_PERSISTENT0_CLK32_MASK) {
 156                 if (boot_cause & RTC_PERSISTENT0_CLOCKSOURCE)
 157                         goto rtc_err;
 158                 writel(RTC_PERSISTENT0_CLK32_MASK,
 159                         &rtc_regs->hw_rtc_persistent0_set);
 160         }
 161         return 0;
 162
 163 rtc_err:
 164         serial_puts("Inconsistent value in RTC_PERSISTENT0 register; power-on-reset required\n");
 165         return 1;
 166 }
 167
 168 int board_init(void)
 169 {
 170         if (ctrlc())
 171                 printf("CTRL-C detected; safeboot enabled\n");
 172
 173         /* Address of boot parameters */
 174 #ifdef CONFIG_OF_LIBFDT
 175         gd->bd->bi_arch_number = -1;
 176 #endif
 177         gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x1000;
 178         return 0;
 179 }
 180
 181 int dram_init(void)
 182 {
 183         return mxs_dram_init();
 184 }
 185
 186 #ifdef  CONFIG_CMD_MMC
 187 static int tx28_mmc_wp(int dev_no)
 188 {
 189         return 0;
 190 }
 191
 192 int board_mmc_init(bd_t *bis)
 193 {
 194         return mxsmmc_initialize(bis, 0, tx28_mmc_wp, NULL);
 195 }
 196 #endif /* CONFIG_CMD_MMC */
 197
 198 #ifdef CONFIG_FEC_MXC
 199 #ifdef CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
 200
 201 #ifndef CONFIG_TX28_S
 202 #define FEC_MAX_IDX                     1
 203 #else
 204 #define FEC_MAX_IDX                     0
 205 #endif
 206 #ifndef ETH_ALEN
 207 #define ETH_ALEN                        6
 208 #endif
 209
 210 static int fec_get_mac_addr(int index)
 211 {
 212         int timeout = 1000;
 213         struct mxs_ocotp_regs *ocotp_regs =
 214                 (struct mxs_ocotp_regs *)MXS_OCOTP_BASE;
 215         u32 *cust = &ocotp_regs->hw_ocotp_cust0;
 216         u8 mac[ETH_ALEN];
 217         char env_name[] = "eth.addr";
 218         u32 val = 0;
 219         int i;
 220
 221         if (index < 0 || index > FEC_MAX_IDX)
 222                 return -EINVAL;
 223
 224         /* set this bit to open the OTP banks for reading */
 225         writel(OCOTP_CTRL_RD_BANK_OPEN,
 226                 &ocotp_regs->hw_ocotp_ctrl_set);
 227
 228         /* wait until OTP contents are readable */
 229         while (OCOTP_CTRL_BUSY & readl(&ocotp_regs->hw_ocotp_ctrl)) {
 230                 if (timeout-- < 0)
 231                         return -ETIMEDOUT;
 232                 udelay(100);
 233         }
 234
 235         for (i = 0; i < sizeof(mac); i++) {
 236                 int shift = 24 - i % 4 * 8;
 237
 238                 if (i % 4 == 0)
 239                         val = readl(&cust[index * 8 + i]);
 240                 mac[i] = val >> shift;
 241         }
 242         if (!is_valid_ethaddr(mac)) {
 243                 if (index == 0)
 244                         printf("No valid MAC address programmed\n");
 245                 return 0;
 246         }
 247
 248         if (index == 0) {
 249                 printf("MAC addr from fuse: %pM\n", mac);
 250                 snprintf(env_name, sizeof(env_name), "ethaddr");
 251         } else {
 252                 snprintf(env_name, sizeof(env_name), "eth%daddr", index);
 253         }
 254         eth_setenv_enetaddr(env_name, mac);
 255         return 0;
 256 }
 257
 258 static inline int tx28_fec1_enabled(void)
 259 {
 260         const char *status;
 261         int off;
 262
 263         if (!gd->fdt_blob)
 264                 return 0;
 265
 266         off = fdt_path_offset(gd->fdt_blob, "ethernet1");
 267         if (off < 0)
 268                 return 0;
 269
 270         status = fdt_getprop(gd->fdt_blob, off, "status", NULL);
 271         return status && (strcmp(status, "okay") == 0);
 272 }
 273
 274 static void tx28_init_mac(void)
 275 {
 276         int ret;
 277
 278         ret = fec_get_mac_addr(0);
 279         if (ret < 0) {
 280                 printf("Failed to read FEC0 MAC address from OCOTP\n");
 281                 return;
 282         }
 283 #ifdef CONFIG_TX28_S
 284         if (tx28_fec1_enabled()) {
 285                 ret = fec_get_mac_addr(1);
 286                 if (ret < 0) {
 287                         printf("Failed to read FEC1 MAC address from OCOTP\n");
 288                         return;
 289                 }
 290         }
 291 #endif
 292 }
 293 #else
 294 static inline void tx28_init_mac(void)
 295 {
 296 }
 297 #endif /* CONFIG_GET_FEC_MAC_ADDR_FROM_IIM */
 298
 299 static const iomux_cfg_t tx28_fec_pads[] = {
 300         MX28_PAD_ENET0_RX_EN__ENET0_RX_EN,
 301         MX28_PAD_ENET0_RXD0__ENET0_RXD0,
 302         MX28_PAD_ENET0_RXD1__ENET0_RXD1,
 303 };
 304
 305 int board_eth_init(bd_t *bis)
 306 {
 307         int ret;
 308
 309         /* Reset the external phy */
 310         gpio_direction_output(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 0);
 311
 312         /* Power on the external phy */
 313         gpio_direction_output(MX28_PAD_PWM4__GPIO_3_29, 1);
 314
 315         /* Pull strap pins to high */
 316         gpio_direction_output(MX28_PAD_ENET0_RX_EN__GPIO_4_2, 1);
 317         gpio_direction_output(MX28_PAD_ENET0_RXD0__GPIO_4_3, 1);
 318         gpio_direction_output(MX28_PAD_ENET0_RXD1__GPIO_4_4, 1);
 319         gpio_direction_input(MX28_PAD_ENET0_TX_CLK__GPIO_4_5);
 320
 321         udelay(25000);
 322         gpio_set_value(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 1);
 323         udelay(100);
 324
 325         mxs_iomux_setup_multiple_pads(tx28_fec_pads, ARRAY_SIZE(tx28_fec_pads));
 326
 327         ret = cpu_eth_init(bis);
 328         if (ret) {
 329                 printf("cpu_eth_init() failed: %d\n", ret);
 330                 return ret;
 331         }
 332
 333 #ifndef CONFIG_TX28_S
 334         if (getenv("ethaddr")) {
 335                 ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE);
 336                 if (ret) {
 337                         printf("FEC MXS: Unable to init FEC0\n");
 338                         return ret;
 339                 }
 340         }
 341
 342         if (getenv("eth1addr")) {
 343                 ret = fecmxc_initialize_multi(bis, 1, 1, MXS_ENET1_BASE);
 344                 if (ret) {
 345                         printf("FEC MXS: Unable to init FEC1\n");
 346                         return ret;
 347                 }
 348         }
 349 #else
 350         if (getenv("ethaddr")) {
 351                 ret = fecmxc_initialize(bis);
 352                 if (ret) {
 353                         printf("FEC MXS: Unable to init FEC\n");
 354                         return ret;
 355                 }
 356         }
 357 #endif
 358         return 0;
 359 }
 360 #else
 361 static inline void tx28_init_mac(void)
 362 {
 363 }
 364 #endif /* CONFIG_FEC_MXC */
 365
 366 enum {
 367         LED_STATE_INIT = -1,
 368         LED_STATE_OFF,
 369         LED_STATE_ON,
 370 };
 371
 372 void show_activity(int arg)
 373 {
 374         static int led_state = LED_STATE_INIT;
 375         static ulong last;
 376
 377         if (led_state == LED_STATE_INIT) {
 378                 last = get_timer(0);
 379                 gpio_set_value(TX28_LED_GPIO, 1);
 380                 led_state = LED_STATE_ON;
 381         } else {
 382                 if (get_timer(last) > CONFIG_SYS_HZ) {
 383                         last = get_timer(0);
 384                         if (led_state == LED_STATE_ON) {
 385                                 gpio_set_value(TX28_LED_GPIO, 0);
 386                         } else {
 387                                 gpio_set_value(TX28_LED_GPIO, 1);
 388                         }
 389                         led_state = 1 - led_state;
 390                 }
 391         }
 392 }
 393
 394 static const iomux_cfg_t stk5_pads[] = {
 395         /* SW controlled LED on STK5 baseboard */
 396         MX28_PAD_ENET0_RXD3__GPIO_4_10,
 397 };
 398
 399 static const struct gpio stk5_gpios[] = {
 400 };
 401
 402 #ifdef CONFIG_LCD
 403 static ushort tx28_cmap[256];
 404 vidinfo_t panel_info = {
 405         /* set to max. size supported by SoC */
 406         .vl_col = 1600,
 407         .vl_row = 1200,
 408
 409         .vl_bpix = LCD_COLOR32,    /* Bits per pixel, 0: 1bpp, 1: 2bpp, 2: 4bpp, 3: 8bpp ... */
 410         .cmap = tx28_cmap,
 411 };
 412
 413 static struct fb_videomode tx28_fb_modes[] = {
 414         {
 415                 /* Standard VGA timing */
 416                 .name           = "VGA",
 417                 .refresh        = 60,
 418                 .xres           = 640,
 419                 .yres           = 480,
 420                 .pixclock       = KHZ2PICOS(25175),
 421                 .left_margin    = 48,
 422                 .hsync_len      = 96,
 423                 .right_margin   = 16,
 424                 .upper_margin   = 31,
 425                 .vsync_len      = 2,
 426                 .lower_margin   = 12,
 427                 .vmode          = FB_VMODE_NONINTERLACED,
 428         },
 429         {
 430                 /* Emerging ETV570 640 x 480 display. Syncs low active,
 431                  * DE high active, 115.2 mm x 86.4 mm display area
 432                  * VGA compatible timing
 433                  */
 434                 .name           = "ETV570",
 435                 .refresh        = 60,
 436                 .xres           = 640,
 437                 .yres           = 480,
 438                 .pixclock       = KHZ2PICOS(25175),
 439                 .left_margin    = 114,
 440                 .hsync_len      = 30,
 441                 .right_margin   = 16,
 442                 .upper_margin   = 32,
 443                 .vsync_len      = 3,
 444                 .lower_margin   = 10,
 445                 .vmode          = FB_VMODE_NONINTERLACED,
 446         },
 447         {
 448                 /* Emerging ET0350G0DH6 320 x 240 display.
 449                  * 70.08 mm x 52.56 mm display area.
 450                  */
 451                 .name           = "ET0350",
 452                 .refresh        = 60,
 453                 .xres           = 320,
 454                 .yres           = 240,
 455                 .pixclock       = KHZ2PICOS(6500),
 456                 .left_margin    = 68 - 34,
 457                 .hsync_len      = 34,
 458                 .right_margin   = 20,
 459                 .upper_margin   = 18 - 3,
 460                 .vsync_len      = 3,
 461                 .lower_margin   = 4,
 462                 .vmode          = FB_VMODE_NONINTERLACED,
 463         },
 464         {
 465                 /* Emerging ET0430G0DH6 480 x 272 display.
 466                  * 95.04 mm x 53.856 mm display area.
 467                  */
 468                 .name           = "ET0430",
 469                 .refresh        = 60,
 470                 .xres           = 480,
 471                 .yres           = 272,
 472                 .pixclock       = KHZ2PICOS(9000),
 473                 .left_margin    = 2,
 474                 .hsync_len      = 41,
 475                 .right_margin   = 2,
 476                 .upper_margin   = 2,
 477                 .vsync_len      = 10,
 478                 .lower_margin   = 2,
 479                 .sync           = FB_SYNC_CLK_LAT_FALL,
 480                 .vmode          = FB_VMODE_NONINTERLACED,
 481         },
 482         {
 483                 /* Emerging ET0500G0DH6 800 x 480 display.
 484                  * 109.6 mm x 66.4 mm display area.
 485                  */
 486                 .name           = "ET0500",
 487                 .refresh        = 60,
 488                 .xres           = 800,
 489                 .yres           = 480,
 490                 .pixclock       = KHZ2PICOS(33260),
 491                 .left_margin    = 216 - 128,
 492                 .hsync_len      = 128,
 493                 .right_margin   = 1056 - 800 - 216,
 494                 .upper_margin   = 35 - 2,
 495                 .vsync_len      = 2,
 496                 .lower_margin   = 525 - 480 - 35,
 497                 .vmode          = FB_VMODE_NONINTERLACED,
 498         },
 499         {
 500                 /* Emerging ETQ570G0DH6 320 x 240 display.
 501                  * 115.2 mm x 86.4 mm display area.
 502                  */
 503                 .name           = "ETQ570",
 504                 .refresh        = 60,
 505                 .xres           = 320,
 506                 .yres           = 240,
 507                 .pixclock       = KHZ2PICOS(6400),
 508                 .left_margin    = 38,
 509                 .hsync_len      = 30,
 510                 .right_margin   = 30,
 511                 .upper_margin   = 16, /* 15 according to datasheet */
 512                 .vsync_len      = 3, /* TVP -> 1>x>5 */
 513                 .lower_margin   = 4, /* 4.5 according to datasheet */
 514                 .vmode          = FB_VMODE_NONINTERLACED,
 515         },
 516         {
 517                 /* Emerging ET0700G0DH6 800 x 480 display.
 518                  * 152.4 mm x 91.44 mm display area.
 519                  */
 520                 .name           = "ET0700",
 521                 .refresh        = 60,
 522                 .xres           = 800,
 523                 .yres           = 480,
 524                 .pixclock       = KHZ2PICOS(33260),
 525                 .left_margin    = 216 - 128,
 526                 .hsync_len      = 128,
 527                 .right_margin   = 1056 - 800 - 216,
 528                 .upper_margin   = 35 - 2,
 529                 .vsync_len      = 2,
 530                 .lower_margin   = 525 - 480 - 35,
 531                 .vmode          = FB_VMODE_NONINTERLACED,
 532         },
 533         {
 534                 /* unnamed entry for assigning parameters parsed from 'video_mode' string */
 535                 .vmode          = FB_VMODE_NONINTERLACED,
 536         },
 537 };
 538
 539 static int lcd_enabled = 1;
 540 static int lcd_bl_polarity;
 541
 542 static int lcd_backlight_polarity(void)
 543 {
 544         return lcd_bl_polarity;
 545 }
 546
 547 void lcd_enable(void)
 548 {
 549         /* HACK ALERT:
 550          * global variable from common/lcd.c
 551          * Set to 0 here to prevent messages from going to LCD
 552          * rather than serial console
 553          */
 554         lcd_is_enabled = 0;
 555
 556         karo_load_splashimage(1);
 557         if (lcd_enabled) {
 558                 debug("Switching LCD on\n");
 559                 gpio_set_value(TX28_LCD_PWR_GPIO, 1);
 560                 udelay(100);
 561                 gpio_set_value(TX28_LCD_RST_GPIO, 1);
 562                 udelay(300000);
 563                 gpio_set_value(TX28_LCD_BACKLIGHT_GPIO,
 564                         lcd_backlight_polarity());
 565         }
 566 }
 567
 568 void lcd_disable(void)
 569 {
 570 }
 571
 572 void lcd_panel_disable(void)
 573 {
 574         if (lcd_enabled) {
 575                 debug("Switching LCD off\n");
 576                 gpio_set_value(TX28_LCD_BACKLIGHT_GPIO,
 577                         !lcd_backlight_polarity());
 578                 gpio_set_value(TX28_LCD_RST_GPIO, 0);
 579                 gpio_set_value(TX28_LCD_PWR_GPIO, 0);
 580         }
 581 }
 582
 583 static const iomux_cfg_t stk5_lcd_pads[] = {
 584         /* LCD RESET */
 585         MX28_PAD_LCD_RESET__GPIO_3_30 | MXS_PAD_CTRL,
 586         /* LCD POWER_ENABLE */
 587         MX28_PAD_LCD_ENABLE__GPIO_1_31 | MXS_PAD_CTRL,
 588         /* LCD Backlight (PWM) */
 589         MX28_PAD_PWM0__GPIO_3_16 | MXS_PAD_CTRL,
 590
 591         /* Display */
 592         MX28_PAD_LCD_D00__LCD_D0 | MXS_PAD_CTRL,
 593         MX28_PAD_LCD_D01__LCD_D1 | MXS_PAD_CTRL,
 594         MX28_PAD_LCD_D02__LCD_D2 | MXS_PAD_CTRL,
 595         MX28_PAD_LCD_D03__LCD_D3 | MXS_PAD_CTRL,
 596         MX28_PAD_LCD_D04__LCD_D4 | MXS_PAD_CTRL,
 597         MX28_PAD_LCD_D05__LCD_D5 | MXS_PAD_CTRL,
 598         MX28_PAD_LCD_D06__LCD_D6 | MXS_PAD_CTRL,
 599         MX28_PAD_LCD_D07__LCD_D7 | MXS_PAD_CTRL,
 600         MX28_PAD_LCD_D08__LCD_D8 | MXS_PAD_CTRL,
 601         MX28_PAD_LCD_D09__LCD_D9 | MXS_PAD_CTRL,
 602         MX28_PAD_LCD_D10__LCD_D10 | MXS_PAD_CTRL,
 603         MX28_PAD_LCD_D11__LCD_D11 | MXS_PAD_CTRL,
 604         MX28_PAD_LCD_D12__LCD_D12 | MXS_PAD_CTRL,
 605         MX28_PAD_LCD_D13__LCD_D13 | MXS_PAD_CTRL,
 606         MX28_PAD_LCD_D14__LCD_D14 | MXS_PAD_CTRL,
 607         MX28_PAD_LCD_D15__LCD_D15 | MXS_PAD_CTRL,
 608         MX28_PAD_LCD_D16__LCD_D16 | MXS_PAD_CTRL,
 609         MX28_PAD_LCD_D17__LCD_D17 | MXS_PAD_CTRL,
 610         MX28_PAD_LCD_D18__LCD_D18 | MXS_PAD_CTRL,
 611         MX28_PAD_LCD_D19__LCD_D19 | MXS_PAD_CTRL,
 612         MX28_PAD_LCD_D20__LCD_D20 | MXS_PAD_CTRL,
 613         MX28_PAD_LCD_D21__LCD_D21 | MXS_PAD_CTRL,
 614         MX28_PAD_LCD_D22__LCD_D22 | MXS_PAD_CTRL,
 615         MX28_PAD_LCD_D23__LCD_D23 | MXS_PAD_CTRL,
 616         MX28_PAD_LCD_RD_E__LCD_VSYNC | MXS_PAD_CTRL,
 617         MX28_PAD_LCD_WR_RWN__LCD_HSYNC | MXS_PAD_CTRL,
 618         MX28_PAD_LCD_RS__LCD_DOTCLK | MXS_PAD_CTRL,
 619         MX28_PAD_LCD_CS__LCD_CS | MXS_PAD_CTRL,
 620 };
 621
 622 static const struct gpio stk5_lcd_gpios[] = {
 623         { TX28_LCD_RST_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "LCD RESET", },
 624         { TX28_LCD_PWR_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "LCD POWER", },
 625         { TX28_LCD_BACKLIGHT_GPIO, GPIOFLAG_OUTPUT_INIT_HIGH, "LCD BACKLIGHT", },
 626 };
 627
 628 extern void video_hw_init(void *lcdbase);
 629
 630 void lcd_ctrl_init(void *lcdbase)
 631 {
 632         int color_depth = 24;
 633         const char *video_mode = karo_get_vmode(getenv("video_mode"));
 634         const char *vm;
 635         unsigned long val;
 636         int refresh = 60;
 637         struct fb_videomode *p = tx28_fb_modes;
 638         struct fb_videomode fb_mode;
 639         int xres_set = 0, yres_set = 0, bpp_set = 0, refresh_set = 0;
 640
 641         if (!lcd_enabled) {
 642                 debug("LCD disabled\n");
 643                 return;
 644         }
 645
 646         if (had_ctrlc()) {
 647                 debug("Disabling LCD\n");
 648                 lcd_enabled = 0;
 649                 setenv("splashimage", NULL);
 650                 return;
 651         }
 652
 653         karo_fdt_move_fdt();
 654         lcd_bl_polarity = karo_fdt_get_backlight_polarity(working_fdt);
 655
 656         if (video_mode == NULL) {
 657                 debug("Disabling LCD\n");
 658                 lcd_enabled = 0;
 659                 return;
 660         }
 661         vm = video_mode;
 662         if (karo_fdt_get_fb_mode(working_fdt, video_mode, &fb_mode) == 0) {
 663                 p = &fb_mode;
 664                 debug("Using video mode from FDT\n");
 665                 vm += strlen(vm);
 666                 if (fb_mode.xres > panel_info.vl_col ||
 667                         fb_mode.yres > panel_info.vl_row) {
 668                         printf("video resolution from DT: %dx%d exceeds hardware limits: %dx%d\n",
 669                                 fb_mode.xres, fb_mode.yres,
 670                                 panel_info.vl_col, panel_info.vl_row);
 671                         lcd_enabled = 0;
 672                         return;
 673                 }
 674         }
 675         if (p->name != NULL)
 676                 debug("Trying compiled-in video modes\n");
 677         while (p->name != NULL) {
 678                 if (strcmp(p->name, vm) == 0) {
 679                         debug("Using video mode: '%s'\n", p->name);
 680                         vm += strlen(vm);
 681                         break;
 682                 }
 683                 p++;
 684         }
 685         if (*vm != '\0')
 686                 debug("Trying to decode video_mode: '%s'\n", vm);
 687         while (*vm != '\0') {
 688                 if (*vm >= '0' && *vm <= '9') {
 689                         char *end;
 690
 691                         val = simple_strtoul(vm, &end, 0);
 692                         if (end > vm) {
 693                                 if (!xres_set) {
 694                                         if (val > panel_info.vl_col)
 695                                                 val = panel_info.vl_col;
 696                                         p->xres = val;
 697                                         panel_info.vl_col = val;
 698                                         xres_set = 1;
 699                                 } else if (!yres_set) {
 700                                         if (val > panel_info.vl_row)
 701                                                 val = panel_info.vl_row;
 702                                         p->yres = val;
 703                                         panel_info.vl_row = val;
 704                                         yres_set = 1;
 705                                 } else if (!bpp_set) {
 706                                         switch (val) {
 707                                         case 8:
 708                                         case 16:
 709                                         case 18:
 710                                         case 24:
 711                                                 color_depth = val;
 712                                                 break;
 713
 714                                         default:
 715                                                 printf("Invalid color depth: '%.*s' in video_mode; using default: '%u'\n",
 716                                                         end - vm, vm, color_depth);
 717                                         }
 718                                         bpp_set = 1;
 719                                 } else if (!refresh_set) {
 720                                         refresh = val;
 721                                         refresh_set = 1;
 722                                 }
 723                         }
 724                         vm = end;
 725                 }
 726                 switch (*vm) {
 727                 case '@':
 728                         bpp_set = 1;
 729                         /* fallthru */
 730                 case '-':
 731                         yres_set = 1;
 732                         /* fallthru */
 733                 case 'x':
 734                         xres_set = 1;
 735                         /* fallthru */
 736                 case 'M':
 737                 case 'R':
 738                         vm++;
 739                         break;
 740
 741                 default:
 742                         if (*vm != '\0')
 743                                 vm++;
 744                 }
 745         }
 746         if (p->xres == 0 || p->yres == 0) {
 747                 printf("Invalid video mode: %s\n", getenv("video_mode"));
 748                 lcd_enabled = 0;
 749                 printf("Supported video modes are:");
 750                 for (p = &tx28_fb_modes[0]; p->name != NULL; p++) {
 751                         printf(" %s", p->name);
 752                 }
 753                 printf("\n");
 754                 return;
 755         }
 756         if (p->xres > panel_info.vl_col || p->yres > panel_info.vl_row) {
 757                 printf("video resolution: %dx%d exceeds hardware limits: %dx%d\n",
 758                         p->xres, p->yres, panel_info.vl_col, panel_info.vl_row);
 759                 lcd_enabled = 0;
 760                 return;
 761         }
 762         panel_info.vl_col = p->xres;
 763         panel_info.vl_row = p->yres;
 764
 765         switch (color_depth) {
 766         case 8:
 767                 panel_info.vl_bpix = LCD_COLOR8;
 768                 break;
 769         case 16:
 770                 panel_info.vl_bpix = LCD_COLOR16;
 771                 break;
 772         default:
 773                 panel_info.vl_bpix = LCD_COLOR32;
 774         }
 775
 776         p->pixclock = KHZ2PICOS(refresh *
 777                 (p->xres + p->left_margin + p->right_margin + p->hsync_len) *
 778                 (p->yres + p->upper_margin + p->lower_margin + p->vsync_len) /
 779                                 1000);
 780         debug("Pixel clock set to %lu.%03lu MHz\n",
 781                 PICOS2KHZ(p->pixclock) / 1000, PICOS2KHZ(p->pixclock) % 1000);
 782
 783         if (p != &fb_mode) {
 784                 int ret;
 785
 786                 debug("Creating new display-timing node from '%s'\n",
 787                         video_mode);
 788                 ret = karo_fdt_create_fb_mode(working_fdt, video_mode, p);
 789                 if (ret)
 790                         printf("Failed to create new display-timing node from '%s': %d\n",
 791                                 video_mode, ret);
 792         }
 793
 794         gpio_request_array(stk5_lcd_gpios, ARRAY_SIZE(stk5_lcd_gpios));
 795         mxs_iomux_setup_multiple_pads(stk5_lcd_pads,
 796                                 ARRAY_SIZE(stk5_lcd_pads));
 797
 798         debug("video format: %ux%u-%u@%u\n", p->xres, p->yres,
 799                 color_depth, refresh);
 800
 801         if (karo_load_splashimage(0) == 0) {
 802                 char vmode[128];
 803
 804                 /* setup env variable for mxsfb display driver */
 805                 snprintf(vmode, sizeof(vmode),
 806                         "x:%d,y:%d,le:%d,ri:%d,up:%d,lo:%d,hs:%d,vs:%d,sync:%d,pclk:%d,depth:%d",
 807                         p->xres, p->yres, p->left_margin, p->right_margin,
 808                         p->upper_margin, p->lower_margin, p->hsync_len,
 809                         p->vsync_len, p->sync, p->pixclock, color_depth);
 810                 setenv("videomode", vmode);
 811
 812                 debug("Initializing LCD controller\n");
 813                 video_hw_init(lcdbase);
 814                 setenv("videomode", NULL);
 815         } else {
 816                 debug("Skipping initialization of LCD controller\n");
 817         }
 818 }
 819 #else
 820 #define lcd_enabled 0
 821 #endif /* CONFIG_LCD */
 822
 823 static void stk5_board_init(void)
 824 {
 825         gpio_request_array(stk5_gpios, ARRAY_SIZE(stk5_gpios));
 826         mxs_iomux_setup_multiple_pads(stk5_pads, ARRAY_SIZE(stk5_pads));
 827 }
 828
 829 static void stk5v3_board_init(void)
 830 {
 831         stk5_board_init();
 832 }
 833
 834 static void stk5v5_board_init(void)
 835 {
 836         stk5_board_init();
 837
 838         /* init flexcan transceiver enable GPIO */
 839         gpio_request_one(STK5_CAN_XCVR_GPIO, GPIOFLAG_OUTPUT_INIT_HIGH,
 840                         "Flexcan Transceiver");
 841         mxs_iomux_setup_pad(STK5_CAN_XCVR_GPIO);
 842 }
 843
 844 int board_late_init(void)
 845 {
 846         int ret = 0;
 847         const char *baseboard;
 848
 849         env_cleanup();
 850
 851         if (had_ctrlc())
 852                 setenv_ulong("safeboot", 1);
 853         else
 854                 karo_fdt_move_fdt();
 855
 856         baseboard = getenv("baseboard");
 857         if (!baseboard)
 858                 goto exit;
 859
 860         printf("Baseboard: %s\n", baseboard);
 861
 862         if (strncmp(baseboard, "stk5", 4) == 0) {
 863                 if ((strlen(baseboard) == 4) ||
 864                         strcmp(baseboard, "stk5-v3") == 0) {
 865                         stk5v3_board_init();
 866                 } else if (strcmp(baseboard, "stk5-v5") == 0) {
 867                         const char *otg_mode = getenv("otg_mode");
 868
 869                         if (otg_mode && strcmp(otg_mode, "host") == 0) {
 870                                 printf("otg_mode='%s' is incompatible with baseboard %s; setting to 'none'\n",
 871                                         otg_mode, baseboard);
 872                                 setenv("otg_mode", "none");
 873                         }
 874                         stk5v5_board_init();
 875                 } else {
 876                         printf("WARNING: Unsupported STK5 board rev.: %s\n",
 877                                 baseboard + 4);
 878                 }
 879         } else {
 880                 printf("WARNING: Unsupported baseboard: '%s'\n",
 881                         baseboard);
 882                 ret = -EINVAL;
 883         }
 884
 885 exit:
 886         tx28_init_mac();
 887         clear_ctrlc();
 888         return ret;
 889 }
 890
 891 #define BOOT_CAUSE_MASK         (RTC_PERSISTENT0_EXTERNAL_RESET |       \
 892                                 RTC_PERSISTENT0_ALARM_WAKE |            \
 893                                 RTC_PERSISTENT0_THERMAL_RESET)
 894
 895 static void thermal_init(void)
 896 {
 897         struct mxs_power_regs *power_regs = (void *)MXS_POWER_BASE;
 898         struct mxs_clkctrl_regs *clkctrl_regs = (void *)MXS_CLKCTRL_BASE;
 899
 900         writel(POWER_THERMAL_LOW_POWER | POWER_THERMAL_OFFSET_ADJ_ENABLE |
 901                 POWER_THERMAL_OFFSET_ADJ_OFFSET(3),
 902                 &power_regs->hw_power_thermal);
 903
 904         writel(CLKCTRL_RESET_EXTERNAL_RESET_ENABLE |
 905                 CLKCTRL_RESET_THERMAL_RESET_ENABLE,
 906                 &clkctrl_regs->hw_clkctrl_reset);
 907 }
 908
 909 int checkboard(void)
 910 {
 911         struct mxs_power_regs *power_regs = (void *)MXS_POWER_BASE;
 912         u32 pwr_sts = readl(&power_regs->hw_power_sts);
 913         u32 pwrup_src = (pwr_sts >> 24) & 0x3f;
 914         const char *dlm = "";
 915
 916         printf("Board: Ka-Ro TX28-4%sx%d\n", TX28_MOD_SUFFIX,
 917                 CONFIG_SYS_SDRAM_SIZE / SZ_128M +
 918                 CONFIG_SYS_NAND_BLOCKS / 2048 * 2);
 919
 920         printf("POWERUP Source: ");
 921         if (pwrup_src & (3 << 0)) {
 922                 printf("%sPSWITCH %s voltage", dlm,
 923                         pwrup_src & (1 << 1) ? "HIGH" : "MID");
 924                 dlm = " | ";
 925         }
 926         if (pwrup_src & (1 << 4)) {
 927                 printf("%sRTC", dlm);
 928                 dlm = " | ";
 929         }
 930         if (pwrup_src & (1 << 5)) {
 931                 printf("%s5V", dlm);
 932                 dlm = " | ";
 933         }
 934         printf("\n");
 935
 936         if (boot_cause & BOOT_CAUSE_MASK) {
 937                 dlm="";
 938                 printf("Last boot cause: ");
 939                 if (boot_cause & RTC_PERSISTENT0_EXTERNAL_RESET) {
 940                         printf("%sEXTERNAL", dlm);
 941                         dlm = " | ";
 942                 }
 943                 if (boot_cause & RTC_PERSISTENT0_THERMAL_RESET) {
 944                         printf("%sTHERMAL", dlm);
 945                         dlm = " | ";
 946                 }
 947                 if (*dlm != '\0')
 948                         printf(" RESET");
 949                 if (boot_cause & RTC_PERSISTENT0_ALARM_WAKE) {
 950                         printf("%sALARM WAKE", dlm);
 951                         dlm = " | ";
 952                 }
 953                 printf("\n");
 954         }
 955
 956         while (pwr_sts & POWER_STS_THERMAL_WARNING) {
 957                 static int first = 1;
 958
 959                 if (first) {
 960                         printf("CPU too hot to boot\n");
 961                         first = 0;
 962                 }
 963                 if (tstc())
 964                         break;
 965                 pwr_sts = readl(&power_regs->hw_power_sts);
 966         }
 967
 968         if (!(boot_cause & RTC_PERSISTENT0_THERMAL_RESET))
 969                 thermal_init();
 970
 971         return 0;
 972 }
 973
 974 #if defined(CONFIG_OF_BOARD_SETUP)
 975 #ifdef CONFIG_FDT_FIXUP_PARTITIONS
 976 #include <jffs2/jffs2.h>
 977 #include <mtd_node.h>
 978 static struct node_info tx28_nand_nodes[] = {
 979         { "fsl,imx28-gpmi-nand", MTD_DEV_TYPE_NAND, },
 980 };
 981 #else
 982 #define fdt_fixup_mtdparts(b,n,c) do { } while (0)
 983 #endif
 984
 985 static const char *tx28_touchpanels[] = {
 986         "ti,tsc2007",
 987         "edt,edt-ft5x06",
 988         "fsl,imx28-lradc",
 989 };
 990
 991 int ft_board_setup(void *blob, bd_t *bd)
 992 {
 993         const char *baseboard = getenv("baseboard");
 994         int stk5_v5 = baseboard != NULL && (strcmp(baseboard, "stk5-v5") == 0);
 995         const char *video_mode = karo_get_vmode(getenv("video_mode"));
 996         int ret;
 997
 998         ret = fdt_increase_size(blob, 4096);
 999         if (ret) {
1000                 printf("Failed to increase FDT size: %s\n", fdt_strerror(ret));
1001                 return ret;
1002         }
1003 #ifdef CONFIG_TX28_S
1004         /* TX28-41xx (aka TX28S) has no external RTC
1005          * and no I2C GPIO extender
1006          */
1007         karo_fdt_remove_node(blob, "ds1339");
1008         karo_fdt_remove_node(blob, "gpio5");
1009 #endif
1010         if (stk5_v5)
1011                 karo_fdt_enable_node(blob, "stk5led", 0);
1012
1013         fdt_fixup_mtdparts(blob, tx28_nand_nodes, ARRAY_SIZE(tx28_nand_nodes));
1014
1015         karo_fdt_fixup_touchpanel(blob, tx28_touchpanels,
1016                                 ARRAY_SIZE(tx28_touchpanels));
1017         karo_fdt_fixup_usb_otg(blob, "usbotg", "fsl,usbphy", "vbus-supply");
1018         karo_fdt_fixup_flexcan(blob, stk5_v5);
1019         karo_fdt_update_fb_mode(blob, video_mode);
1020
1021         return 0;
1022 }
1023 #endif /* CONFIG_OF_BOARD_SETUP */