board/karo/tx28/tx28.c

   1 /*
   2  * Copyright (C) 2011-2013 Lothar Waßmann <LW@KARO-electronics.de>
   3  * based on: board/freescale/mx28_evk.c (C) 2010 Freescale Semiconductor, Inc.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License
  10  * version 2 as published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  */
  18
  19 #include <common.h>
  20 #include <errno.h>
  21 #include <libfdt.h>
  22 #include <fdt_support.h>
  23 #include <lcd.h>
  24 #include <netdev.h>
  25 #include <mmc.h>
  26 #include <mxcfb.h>
  27 #include <video_fb.h>
  28 #include <linux/list.h>
  29 #include <linux/fb.h>
  30 #include <asm/io.h>
  31 #include <asm/gpio.h>
  32 #include <asm/arch/iomux-mx28.h>
  33 #include <asm/arch/clock.h>
  34 #include <asm/arch/imx-regs.h>
  35 #include <asm/arch/sys_proto.h>
  36
  37 #include "../common/karo.h"
  38
  39 DECLARE_GLOBAL_DATA_PTR;
  40
  41 #define MXS_GPIO_NR(p, o)      (((p) << 5) | (o))
  42
  43 #define TX28_LCD_PWR_GPIO       MX28_PAD_LCD_ENABLE__GPIO_1_31
  44 #define TX28_LCD_RST_GPIO       MX28_PAD_LCD_RESET__GPIO_3_30
  45 #define TX28_LCD_BACKLIGHT_GPIO MX28_PAD_PWM0__GPIO_3_16
  46
  47 #define TX28_USBH_VBUSEN_GPIO   MX28_PAD_SPDIF__GPIO_3_27
  48 #define TX28_USBH_OC_GPIO       MX28_PAD_JTAG_RTCK__GPIO_4_20
  49 #define TX28_USBOTG_VBUSEN_GPIO MX28_PAD_GPMI_CE2N__GPIO_0_18
  50 #define TX28_USBOTG_OC_GPIO     MX28_PAD_GPMI_CE3N__GPIO_0_19
  51 #define TX28_USBOTG_ID_GPIO     MX28_PAD_PWM2__GPIO_3_18
  52
  53 #define TX28_LED_GPIO           MX28_PAD_ENET0_RXD3__GPIO_4_10
  54
  55 #define STK5_CAN_XCVR_GPIO      MX28_PAD_LCD_D00__GPIO_1_0
  56
  57 #define ENET_PAD_CTRL           (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_PULLUP)
  58 #define GPIO_PAD_CTRL           (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_PULLUP)
  59 #define I2C_PAD_CTRL            (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_PULLUP)
  60
  61 #ifndef CONFIG_CONS_INDEX
  62 struct serial_device *default_serial_console(void)
  63 {
  64         return NULL;
  65 }
  66 #endif
  67
  68 static const struct gpio tx28_gpios[] = {
  69         { TX28_USBH_VBUSEN_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "USBH VBUSEN", },
  70         { TX28_USBH_OC_GPIO, GPIOFLAG_INPUT, "USBH OC", },
  71         { TX28_USBOTG_VBUSEN_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "USBOTG VBUSEN", },
  72         { TX28_USBOTG_OC_GPIO, GPIOFLAG_INPUT, "USBOTG OC", },
  73         { TX28_USBOTG_ID_GPIO, GPIOFLAG_INPUT, "USBOTG ID", },
  74 };
  75
  76 static const iomux_cfg_t tx28_pads[] = {
  77         /* I2C bus for internal DS1339, PCA9554 and on DIMM pins 40/41 */
  78         MX28_PAD_I2C0_SCL__I2C0_SCL | I2C_PAD_CTRL,
  79         MX28_PAD_I2C0_SDA__I2C0_SDA | I2C_PAD_CTRL,
  80
  81         /* USBH VBUSEN, OC */
  82         MX28_PAD_SPDIF__GPIO_3_27,
  83         MX28_PAD_JTAG_RTCK__GPIO_4_20,
  84
  85         /* USBOTG VBUSEN, OC, ID */
  86         MX28_PAD_GPMI_CE2N__GPIO_0_18,
  87         MX28_PAD_GPMI_CE3N__GPIO_0_19,
  88         MX28_PAD_PWM2__GPIO_3_18,
  89 };
  90
  91 /*
  92  * Functions
  93  */
  94
  95 /* provide at least _some_ sort of randomness */
  96 #define MAX_LOOPS       100
  97
  98 static u32 random __attribute__((section("data")));
  99
 100 static inline void random_init(void)
 101 {
 102         struct mxs_digctl_regs *digctl_regs = (void *)MXS_DIGCTL_BASE;
 103         u32 seed = 0;
 104         int i;
 105
 106         for (i = 0; i < MAX_LOOPS; i++) {
 107                 u32 hclk = readl(&digctl_regs->hw_digctl_hclkcount);
 108                 u32 entropy = readl(&digctl_regs->hw_digctl_entropy);
 109                 u32 usec = readl(&digctl_regs->hw_digctl_microseconds);
 110
 111                 seed = get_timer(hclk ^ entropy ^ usec ^ random ^ seed);
 112                 srand(seed);
 113                 random = rand();
 114         }
 115 }
 116
 117 #define RTC_PERSISTENT0_CLK32_MASK      (RTC_PERSISTENT0_CLOCKSOURCE |  \
 118                                         RTC_PERSISTENT0_XTAL32KHZ_PWRUP)
 119 static u32 boot_cause __attribute__((section("data")));
 120
 121 int board_early_init_f(void)
 122 {
 123         struct mxs_rtc_regs *rtc_regs = (void *)MXS_RTC_BASE;
 124         u32 rtc_stat;
 125         int timeout = 5000;
 126
 127         random_init();
 128
 129         /* IO0 clock at 480MHz */
 130         mxs_set_ioclk(MXC_IOCLK0, 480000);
 131         /* IO1 clock at 480MHz */
 132         mxs_set_ioclk(MXC_IOCLK1, 480000);
 133
 134         /* SSP0 clock at 96MHz */
 135         mxs_set_sspclk(MXC_SSPCLK0, 96000, 0);
 136         /* SSP2 clock at 96MHz */
 137         mxs_set_sspclk(MXC_SSPCLK2, 96000, 0);
 138
 139         gpio_request_array(tx28_gpios, ARRAY_SIZE(tx28_gpios));
 140         mxs_iomux_setup_multiple_pads(tx28_pads, ARRAY_SIZE(tx28_pads));
 141
 142         while ((rtc_stat = readl(&rtc_regs->hw_rtc_stat)) &
 143                 RTC_STAT_STALE_REGS_PERSISTENT0) {
 144                 if (timeout-- < 0)
 145                         return 1;
 146                 udelay(1);
 147         }
 148         boot_cause = readl(&rtc_regs->hw_rtc_persistent0);
 149         if ((boot_cause & RTC_PERSISTENT0_CLK32_MASK) !=
 150                 RTC_PERSISTENT0_CLK32_MASK) {
 151                 if (boot_cause & RTC_PERSISTENT0_CLOCKSOURCE)
 152                         goto rtc_err;
 153                 writel(RTC_PERSISTENT0_CLK32_MASK,
 154                         &rtc_regs->hw_rtc_persistent0_set);
 155         }
 156         return 0;
 157
 158 rtc_err:
 159         serial_puts("Inconsistent value in RTC_PERSISTENT0 register; power-on-reset required\n");
 160         return 1;
 161 }
 162
 163 int board_init(void)
 164 {
 165         if (ctrlc())
 166                 printf("CTRL-C detected; safeboot enabled\n");
 167
 168         /* Address of boot parameters */
 169 #ifdef CONFIG_OF_LIBFDT
 170         gd->bd->bi_arch_number = -1;
 171 #endif
 172         gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x1000;
 173         return 0;
 174 }
 175
 176 int dram_init(void)
 177 {
 178         return mxs_dram_init();
 179 }
 180
 181 #ifdef  CONFIG_CMD_MMC
 182 static int tx28_mmc_wp(int dev_no)
 183 {
 184         return 0;
 185 }
 186
 187 int board_mmc_init(bd_t *bis)
 188 {
 189         return mxsmmc_initialize(bis, 0, tx28_mmc_wp, NULL);
 190 }
 191 #endif /* CONFIG_CMD_MMC */
 192
 193 #ifdef CONFIG_FEC_MXC
 194 #ifdef CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
 195
 196 #ifndef CONFIG_TX28_S
 197 #define FEC_MAX_IDX                     1
 198 #else
 199 #define FEC_MAX_IDX                     0
 200 #endif
 201 #ifndef ETH_ALEN
 202 #define ETH_ALEN                        6
 203 #endif
 204
 205 static int fec_get_mac_addr(int index)
 206 {
 207         int timeout = 1000;
 208         struct mxs_ocotp_regs *ocotp_regs =
 209                 (struct mxs_ocotp_regs *)MXS_OCOTP_BASE;
 210         u32 *cust = &ocotp_regs->hw_ocotp_cust0;
 211         u8 mac[ETH_ALEN];
 212         char env_name[] = "eth.addr";
 213         u32 val = 0;
 214         int i;
 215
 216         if (index < 0 || index > FEC_MAX_IDX)
 217                 return -EINVAL;
 218
 219         /* set this bit to open the OTP banks for reading */
 220         writel(OCOTP_CTRL_RD_BANK_OPEN,
 221                 &ocotp_regs->hw_ocotp_ctrl_set);
 222
 223         /* wait until OTP contents are readable */
 224         while (OCOTP_CTRL_BUSY & readl(&ocotp_regs->hw_ocotp_ctrl)) {
 225                 if (timeout-- < 0)
 226                         return -ETIMEDOUT;
 227                 udelay(100);
 228         }
 229
 230         for (i = 0; i < sizeof(mac); i++) {
 231                 int shift = 24 - i % 4 * 8;
 232
 233                 if (i % 4 == 0)
 234                         val = readl(&cust[index * 8 + i]);
 235                 mac[i] = val >> shift;
 236         }
 237         if (!is_valid_ethaddr(mac)) {
 238                 if (index == 0)
 239                         printf("No valid MAC address programmed\n");
 240                 return 0;
 241         }
 242
 243         if (index == 0) {
 244                 printf("MAC addr from fuse: %pM\n", mac);
 245                 snprintf(env_name, sizeof(env_name), "ethaddr");
 246         } else {
 247                 snprintf(env_name, sizeof(env_name), "eth%daddr", index);
 248         }
 249         eth_setenv_enetaddr(env_name, mac);
 250         return 0;
 251 }
 252
 253 static inline int tx28_fec1_enabled(void)
 254 {
 255         const char *status;
 256         int off;
 257
 258         if (!gd->fdt_blob)
 259                 return 0;
 260
 261         off = fdt_path_offset(gd->fdt_blob, "ethernet1");
 262         if (off < 0)
 263                 return 0;
 264
 265         status = fdt_getprop(gd->fdt_blob, off, "status", NULL);
 266         return status && (strcmp(status, "okay") == 0);
 267 }
 268
 269 static void tx28_init_mac(void)
 270 {
 271         int ret;
 272
 273         ret = fec_get_mac_addr(0);
 274         if (ret < 0) {
 275                 printf("Failed to read FEC0 MAC address from OCOTP\n");
 276                 return;
 277         }
 278 #ifdef CONFIG_TX28_S
 279         if (tx28_fec1_enabled()) {
 280                 ret = fec_get_mac_addr(1);
 281                 if (ret < 0) {
 282                         printf("Failed to read FEC1 MAC address from OCOTP\n");
 283                         return;
 284                 }
 285         }
 286 #endif
 287 }
 288 #else
 289 static inline void tx28_init_mac(void)
 290 {
 291 }
 292 #endif /* CONFIG_GET_FEC_MAC_ADDR_FROM_IIM */
 293
 294 static const iomux_cfg_t tx28_fec_pads[] = {
 295         MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | ENET_PAD_CTRL,
 296         MX28_PAD_ENET0_RXD0__ENET0_RXD0 | ENET_PAD_CTRL,
 297         MX28_PAD_ENET0_RXD1__ENET0_RXD1 | ENET_PAD_CTRL,
 298 };
 299
 300 int board_eth_init(bd_t *bis)
 301 {
 302         int ret;
 303
 304         /* Reset the external phy */
 305         gpio_direction_output(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 0);
 306
 307         /* Power on the external phy */
 308         gpio_direction_output(MX28_PAD_PWM4__GPIO_3_29, 1);
 309
 310         /* Pull strap pins to high */
 311         gpio_direction_output(MX28_PAD_ENET0_RX_EN__GPIO_4_2, 1);
 312         gpio_direction_output(MX28_PAD_ENET0_RXD0__GPIO_4_3, 1);
 313         gpio_direction_output(MX28_PAD_ENET0_RXD1__GPIO_4_4, 1);
 314         gpio_direction_input(MX28_PAD_ENET0_TX_CLK__GPIO_4_5);
 315
 316         udelay(25000);
 317         gpio_set_value(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 1);
 318         udelay(100);
 319
 320         mxs_iomux_setup_multiple_pads(tx28_fec_pads, ARRAY_SIZE(tx28_fec_pads));
 321
 322         ret = cpu_eth_init(bis);
 323         if (ret) {
 324                 printf("cpu_eth_init() failed: %d\n", ret);
 325                 return ret;
 326         }
 327
 328 #ifndef CONFIG_TX28_S
 329         if (getenv("ethaddr")) {
 330                 ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE);
 331                 if (ret) {
 332                         printf("FEC MXS: Unable to init FEC0\n");
 333                         return ret;
 334                 }
 335         }
 336
 337         if (getenv("eth1addr")) {
 338                 ret = fecmxc_initialize_multi(bis, 1, 1, MXS_ENET1_BASE);
 339                 if (ret) {
 340                         printf("FEC MXS: Unable to init FEC1\n");
 341                         return ret;
 342                 }
 343         }
 344 #else
 345         if (getenv("ethaddr")) {
 346                 ret = fecmxc_initialize(bis);
 347                 if (ret) {
 348                         printf("FEC MXS: Unable to init FEC\n");
 349                         return ret;
 350                 }
 351         }
 352 #endif
 353         return 0;
 354 }
 355 #else
 356 static inline void tx28_init_mac(void)
 357 {
 358 }
 359 #endif /* CONFIG_FEC_MXC */
 360
 361 enum {
 362         LED_STATE_INIT = -1,
 363         LED_STATE_OFF,
 364         LED_STATE_ON,
 365         LED_STATE_DISABLED,
 366 };
 367
 368 static int led_state = LED_STATE_DISABLED;
 369
 370 void show_activity(int arg)
 371 {
 372         static ulong last;
 373         int ret;
 374
 375         if (led_state == LED_STATE_DISABLED) {
 376                 return;
 377         } else if (led_state == LED_STATE_INIT) {
 378                 last = get_timer(0);
 379                 ret = gpio_request_one(TX28_LED_GPIO,
 380                                 GPIOFLAG_OUTPUT_INIT_HIGH, "Activity");
 381                 if (ret == 0)
 382                         led_state = LED_STATE_ON;
 383                 else
 384                         led_state = LED_STATE_DISABLED;
 385         } else {
 386                 if (get_timer(last) > CONFIG_SYS_HZ) {
 387                         last = get_timer(0);
 388                         if (led_state == LED_STATE_ON) {
 389                                 gpio_set_value(TX28_LED_GPIO, 0);
 390                                 led_state = LED_STATE_OFF;
 391                         } else {
 392                                 gpio_set_value(TX28_LED_GPIO, 1);
 393                                 led_state = LED_STATE_ON;
 394                         }
 395                 }
 396         }
 397 }
 398
 399 static const iomux_cfg_t stk5_pads[] = {
 400         /* SW controlled LED on STK5 baseboard */
 401         MX28_PAD_ENET0_RXD3__GPIO_4_10 | GPIO_PAD_CTRL,
 402 };
 403
 404 static const struct gpio stk5_gpios[] = {
 405 };
 406
 407 #ifdef CONFIG_LCD
 408 vidinfo_t panel_info = {
 409         /* set to max. size supported by SoC */
 410         .vl_col = 1600,
 411         .vl_row = 1200,
 412
 413         .vl_bpix = LCD_COLOR32,    /* Bits per pixel, 0: 1bpp, 1: 2bpp, 2: 4bpp, 3: 8bpp ... */
 414 };
 415
 416 static struct fb_videomode tx28_fb_modes[] = {
 417         {
 418                 /* Standard VGA timing */
 419                 .name           = "VGA",
 420                 .refresh        = 60,
 421                 .xres           = 640,
 422                 .yres           = 480,
 423                 .pixclock       = KHZ2PICOS(25175),
 424                 .left_margin    = 48,
 425                 .hsync_len      = 96,
 426                 .right_margin   = 16,
 427                 .upper_margin   = 31,
 428                 .vsync_len      = 2,
 429                 .lower_margin   = 12,
 430                 .vmode          = FB_VMODE_NONINTERLACED,
 431         },
 432         {
 433                 /* Emerging ETV570 640 x 480 display. Syncs low active,
 434                  * DE high active, 115.2 mm x 86.4 mm display area
 435                  * VGA compatible timing
 436                  */
 437                 .name           = "ETV570",
 438                 .refresh        = 60,
 439                 .xres           = 640,
 440                 .yres           = 480,
 441                 .pixclock       = KHZ2PICOS(25175),
 442                 .left_margin    = 114,
 443                 .hsync_len      = 30,
 444                 .right_margin   = 16,
 445                 .upper_margin   = 32,
 446                 .vsync_len      = 3,
 447                 .lower_margin   = 10,
 448                 .vmode          = FB_VMODE_NONINTERLACED,
 449         },
 450         {
 451                 /* Emerging ET0350G0DH6 320 x 240 display.
 452                  * 70.08 mm x 52.56 mm display area.
 453                  */
 454                 .name           = "ET0350",
 455                 .refresh        = 60,
 456                 .xres           = 320,
 457                 .yres           = 240,
 458                 .pixclock       = KHZ2PICOS(6500),
 459                 .left_margin    = 68 - 34,
 460                 .hsync_len      = 34,
 461                 .right_margin   = 20,
 462                 .upper_margin   = 18 - 3,
 463                 .vsync_len      = 3,
 464                 .lower_margin   = 4,
 465                 .vmode          = FB_VMODE_NONINTERLACED,
 466         },
 467         {
 468                 /* Emerging ET0430G0DH6 480 x 272 display.
 469                  * 95.04 mm x 53.856 mm display area.
 470                  */
 471                 .name           = "ET0430",
 472                 .refresh        = 60,
 473                 .xres           = 480,
 474                 .yres           = 272,
 475                 .pixclock       = KHZ2PICOS(9000),
 476                 .left_margin    = 2,
 477                 .hsync_len      = 41,
 478                 .right_margin   = 2,
 479                 .upper_margin   = 2,
 480                 .vsync_len      = 10,
 481                 .lower_margin   = 2,
 482                 .sync           = FB_SYNC_CLK_LAT_FALL,
 483                 .vmode          = FB_VMODE_NONINTERLACED,
 484         },
 485         {
 486                 /* Emerging ET0500G0DH6 800 x 480 display.
 487                  * 109.6 mm x 66.4 mm display area.
 488                  */
 489                 .name           = "ET0500",
 490                 .refresh        = 60,
 491                 .xres           = 800,
 492                 .yres           = 480,
 493                 .pixclock       = KHZ2PICOS(33260),
 494                 .left_margin    = 216 - 128,
 495                 .hsync_len      = 128,
 496                 .right_margin   = 1056 - 800 - 216,
 497                 .upper_margin   = 35 - 2,
 498                 .vsync_len      = 2,
 499                 .lower_margin   = 525 - 480 - 35,
 500                 .vmode          = FB_VMODE_NONINTERLACED,
 501         },
 502         {
 503                 /* Emerging ETQ570G0DH6 320 x 240 display.
 504                  * 115.2 mm x 86.4 mm display area.
 505                  */
 506                 .name           = "ETQ570",
 507                 .refresh        = 60,
 508                 .xres           = 320,
 509                 .yres           = 240,
 510                 .pixclock       = KHZ2PICOS(6400),
 511                 .left_margin    = 38,
 512                 .hsync_len      = 30,
 513                 .right_margin   = 30,
 514                 .upper_margin   = 16, /* 15 according to datasheet */
 515                 .vsync_len      = 3, /* TVP -> 1>x>5 */
 516                 .lower_margin   = 4, /* 4.5 according to datasheet */
 517                 .vmode          = FB_VMODE_NONINTERLACED,
 518         },
 519         {
 520                 /* Emerging ET0700G0DH6 800 x 480 display.
 521                  * 152.4 mm x 91.44 mm display area.
 522                  */
 523                 .name           = "ET0700",
 524                 .refresh        = 60,
 525                 .xres           = 800,
 526                 .yres           = 480,
 527                 .pixclock       = KHZ2PICOS(33260),
 528                 .left_margin    = 216 - 128,
 529                 .hsync_len      = 128,
 530                 .right_margin   = 1056 - 800 - 216,
 531                 .upper_margin   = 35 - 2,
 532                 .vsync_len      = 2,
 533                 .lower_margin   = 525 - 480 - 35,
 534                 .vmode          = FB_VMODE_NONINTERLACED,
 535         },
 536         {
 537                 /* unnamed entry for assigning parameters parsed from 'video_mode' string */
 538                 .vmode          = FB_VMODE_NONINTERLACED,
 539         },
 540 };
 541
 542 static int lcd_enabled = 1;
 543 static int lcd_bl_polarity;
 544
 545 static int lcd_backlight_polarity(void)
 546 {
 547         return lcd_bl_polarity;
 548 }
 549
 550 void lcd_enable(void)
 551 {
 552         /* HACK ALERT:
 553          * global variable from common/lcd.c
 554          * Set to 0 here to prevent messages from going to LCD
 555          * rather than serial console
 556          */
 557         lcd_is_enabled = 0;
 558
 559         karo_load_splashimage(1);
 560         if (lcd_enabled) {
 561                 debug("Switching LCD on\n");
 562                 gpio_set_value(TX28_LCD_PWR_GPIO, 1);
 563                 udelay(100);
 564                 gpio_set_value(TX28_LCD_RST_GPIO, 1);
 565                 udelay(300000);
 566                 gpio_set_value(TX28_LCD_BACKLIGHT_GPIO,
 567                         lcd_backlight_polarity());
 568         }
 569 }
 570
 571 void lcd_disable(void)
 572 {
 573 }
 574
 575 void lcd_panel_disable(void)
 576 {
 577         if (lcd_enabled) {
 578                 debug("Switching LCD off\n");
 579                 gpio_set_value(TX28_LCD_BACKLIGHT_GPIO,
 580                         !lcd_backlight_polarity());
 581                 gpio_set_value(TX28_LCD_RST_GPIO, 0);
 582                 gpio_set_value(TX28_LCD_PWR_GPIO, 0);
 583         }
 584 }
 585
 586 static const iomux_cfg_t stk5_lcd_pads[] = {
 587         /* LCD RESET */
 588         MX28_PAD_LCD_RESET__GPIO_3_30 | MXS_PAD_CTRL,
 589         /* LCD POWER_ENABLE */
 590         MX28_PAD_LCD_ENABLE__GPIO_1_31 | MXS_PAD_CTRL,
 591         /* LCD Backlight (PWM) */
 592         MX28_PAD_PWM0__GPIO_3_16 | MXS_PAD_CTRL,
 593
 594         /* Display */
 595         MX28_PAD_LCD_D00__LCD_D0 | MXS_PAD_CTRL,
 596         MX28_PAD_LCD_D01__LCD_D1 | MXS_PAD_CTRL,
 597         MX28_PAD_LCD_D02__LCD_D2 | MXS_PAD_CTRL,
 598         MX28_PAD_LCD_D03__LCD_D3 | MXS_PAD_CTRL,
 599         MX28_PAD_LCD_D04__LCD_D4 | MXS_PAD_CTRL,
 600         MX28_PAD_LCD_D05__LCD_D5 | MXS_PAD_CTRL,
 601         MX28_PAD_LCD_D06__LCD_D6 | MXS_PAD_CTRL,
 602         MX28_PAD_LCD_D07__LCD_D7 | MXS_PAD_CTRL,
 603         MX28_PAD_LCD_D08__LCD_D8 | MXS_PAD_CTRL,
 604         MX28_PAD_LCD_D09__LCD_D9 | MXS_PAD_CTRL,
 605         MX28_PAD_LCD_D10__LCD_D10 | MXS_PAD_CTRL,
 606         MX28_PAD_LCD_D11__LCD_D11 | MXS_PAD_CTRL,
 607         MX28_PAD_LCD_D12__LCD_D12 | MXS_PAD_CTRL,
 608         MX28_PAD_LCD_D13__LCD_D13 | MXS_PAD_CTRL,
 609         MX28_PAD_LCD_D14__LCD_D14 | MXS_PAD_CTRL,
 610         MX28_PAD_LCD_D15__LCD_D15 | MXS_PAD_CTRL,
 611         MX28_PAD_LCD_D16__LCD_D16 | MXS_PAD_CTRL,
 612         MX28_PAD_LCD_D17__LCD_D17 | MXS_PAD_CTRL,
 613         MX28_PAD_LCD_D18__LCD_D18 | MXS_PAD_CTRL,
 614         MX28_PAD_LCD_D19__LCD_D19 | MXS_PAD_CTRL,
 615         MX28_PAD_LCD_D20__LCD_D20 | MXS_PAD_CTRL,
 616         MX28_PAD_LCD_D21__LCD_D21 | MXS_PAD_CTRL,
 617         MX28_PAD_LCD_D22__LCD_D22 | MXS_PAD_CTRL,
 618         MX28_PAD_LCD_D23__LCD_D23 | MXS_PAD_CTRL,
 619         MX28_PAD_LCD_RD_E__LCD_VSYNC | MXS_PAD_CTRL,
 620         MX28_PAD_LCD_WR_RWN__LCD_HSYNC | MXS_PAD_CTRL,
 621         MX28_PAD_LCD_RS__LCD_DOTCLK | MXS_PAD_CTRL,
 622         MX28_PAD_LCD_CS__LCD_CS | MXS_PAD_CTRL,
 623 };
 624
 625 static const struct gpio stk5_lcd_gpios[] = {
 626         { TX28_LCD_RST_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "LCD RESET", },
 627         { TX28_LCD_PWR_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "LCD POWER", },
 628         { TX28_LCD_BACKLIGHT_GPIO, GPIOFLAG_OUTPUT_INIT_HIGH, "LCD BACKLIGHT", },
 629 };
 630
 631 void lcd_ctrl_init(void *lcdbase)
 632 {
 633         int color_depth = 24;
 634         const char *video_mode = karo_get_vmode(getenv("video_mode"));
 635         const char *vm;
 636         unsigned long val;
 637         int refresh = 60;
 638         struct fb_videomode *p = tx28_fb_modes;
 639         struct fb_videomode fb_mode;
 640         int xres_set = 0, yres_set = 0, bpp_set = 0, refresh_set = 0;
 641
 642         if (!lcd_enabled) {
 643                 debug("LCD disabled\n");
 644                 return;
 645         }
 646
 647         if (had_ctrlc()) {
 648                 debug("Disabling LCD\n");
 649                 lcd_enabled = 0;
 650                 setenv("splashimage", NULL);
 651                 return;
 652         }
 653
 654         karo_fdt_move_fdt();
 655         lcd_bl_polarity = karo_fdt_get_backlight_polarity(working_fdt);
 656
 657         if (video_mode == NULL) {
 658                 debug("Disabling LCD\n");
 659                 lcd_enabled = 0;
 660                 return;
 661         }
 662         vm = video_mode;
 663         if (karo_fdt_get_fb_mode(working_fdt, video_mode, &fb_mode) == 0) {
 664                 p = &fb_mode;
 665                 debug("Using video mode from FDT\n");
 666                 vm += strlen(vm);
 667                 if (fb_mode.xres > panel_info.vl_col ||
 668                         fb_mode.yres > panel_info.vl_row) {
 669                         printf("video resolution from DT: %dx%d exceeds hardware limits: %dx%d\n",
 670                                 fb_mode.xres, fb_mode.yres,
 671                                 panel_info.vl_col, panel_info.vl_row);
 672                         lcd_enabled = 0;
 673                         return;
 674                 }
 675         }
 676         if (p->name != NULL)
 677                 debug("Trying compiled-in video modes\n");
 678         while (p->name != NULL) {
 679                 if (strcmp(p->name, vm) == 0) {
 680                         debug("Using video mode: '%s'\n", p->name);
 681                         vm += strlen(vm);
 682                         break;
 683                 }
 684                 p++;
 685         }
 686         if (*vm != '\0')
 687                 debug("Trying to decode video_mode: '%s'\n", vm);
 688         while (*vm != '\0') {
 689                 if (*vm >= '0' && *vm <= '9') {
 690                         char *end;
 691
 692                         val = simple_strtoul(vm, &end, 0);
 693                         if (end > vm) {
 694                                 if (!xres_set) {
 695                                         if (val > panel_info.vl_col)
 696                                                 val = panel_info.vl_col;
 697                                         p->xres = val;
 698                                         panel_info.vl_col = val;
 699                                         xres_set = 1;
 700                                 } else if (!yres_set) {
 701                                         if (val > panel_info.vl_row)
 702                                                 val = panel_info.vl_row;
 703                                         p->yres = val;
 704                                         panel_info.vl_row = val;
 705                                         yres_set = 1;
 706                                 } else if (!bpp_set) {
 707                                         switch (val) {
 708                                         case 8:
 709                                         case 16:
 710                                         case 18:
 711                                         case 24:
 712                                                 color_depth = val;
 713                                                 break;
 714
 715                                         default:
 716                                                 printf("Invalid color depth: '%.*s' in video_mode; using default: '%u'\n",
 717                                                         end - vm, vm, color_depth);
 718                                         }
 719                                         bpp_set = 1;
 720                                 } else if (!refresh_set) {
 721                                         refresh = val;
 722                                         refresh_set = 1;
 723                                 }
 724                         }
 725                         vm = end;
 726                 }
 727                 switch (*vm) {
 728                 case '@':
 729                         bpp_set = 1;
 730                         /* fallthru */
 731                 case '-':
 732                         yres_set = 1;
 733                         /* fallthru */
 734                 case 'x':
 735                         xres_set = 1;
 736                         /* fallthru */
 737                 case 'M':
 738                 case 'R':
 739                         vm++;
 740                         break;
 741
 742                 default:
 743                         if (*vm != '\0')
 744                                 vm++;
 745                 }
 746         }
 747         if (p->xres == 0 || p->yres == 0) {
 748                 printf("Invalid video mode: %s\n", getenv("video_mode"));
 749                 lcd_enabled = 0;
 750                 printf("Supported video modes are:");
 751                 for (p = &tx28_fb_modes[0]; p->name != NULL; p++) {
 752                         printf(" %s", p->name);
 753                 }
 754                 printf("\n");
 755                 return;
 756         }
 757         if (p->xres > panel_info.vl_col || p->yres > panel_info.vl_row) {
 758                 printf("video resolution: %dx%d exceeds hardware limits: %dx%d\n",
 759                         p->xres, p->yres, panel_info.vl_col, panel_info.vl_row);
 760                 lcd_enabled = 0;
 761                 return;
 762         }
 763         panel_info.vl_col = p->xres;
 764         panel_info.vl_row = p->yres;
 765
 766         switch (color_depth) {
 767         case 8:
 768                 panel_info.vl_bpix = LCD_COLOR8;
 769                 break;
 770         case 16:
 771                 panel_info.vl_bpix = LCD_COLOR16;
 772                 break;
 773         default:
 774                 panel_info.vl_bpix = LCD_COLOR32;
 775         }
 776
 777         p->pixclock = KHZ2PICOS(refresh *
 778                 (p->xres + p->left_margin + p->right_margin + p->hsync_len) *
 779                 (p->yres + p->upper_margin + p->lower_margin + p->vsync_len) /
 780                                 1000);
 781         debug("Pixel clock set to %lu.%03lu MHz\n",
 782                 PICOS2KHZ(p->pixclock) / 1000, PICOS2KHZ(p->pixclock) % 1000);
 783
 784         if (p != &fb_mode) {
 785                 int ret;
 786
 787                 debug("Creating new display-timing node from '%s'\n",
 788                         video_mode);
 789                 ret = karo_fdt_create_fb_mode(working_fdt, video_mode, p);
 790                 if (ret)
 791                         printf("Failed to create new display-timing node from '%s': %d\n",
 792                                 video_mode, ret);
 793         }
 794
 795         gpio_request_array(stk5_lcd_gpios, ARRAY_SIZE(stk5_lcd_gpios));
 796         mxs_iomux_setup_multiple_pads(stk5_lcd_pads,
 797                                 ARRAY_SIZE(stk5_lcd_pads));
 798
 799         debug("video format: %ux%u-%u@%u\n", p->xres, p->yres,
 800                 color_depth, refresh);
 801
 802         if (karo_load_splashimage(0) == 0) {
 803                 char vmode[128];
 804
 805                 /* setup env variable for mxsfb display driver */
 806                 snprintf(vmode, sizeof(vmode),
 807                         "x:%d,y:%d,le:%d,ri:%d,up:%d,lo:%d,hs:%d,vs:%d,sync:%d,pclk:%d,depth:%d",
 808                         p->xres, p->yres, p->left_margin, p->right_margin,
 809                         p->upper_margin, p->lower_margin, p->hsync_len,
 810                         p->vsync_len, p->sync, p->pixclock, color_depth);
 811                 setenv("videomode", vmode);
 812
 813                 debug("Initializing LCD controller\n");
 814                 video_hw_init();
 815                 setenv("videomode", NULL);
 816         } else {
 817                 debug("Skipping initialization of LCD controller\n");
 818         }
 819 }
 820 #else
 821 #define lcd_enabled 0
 822 #endif /* CONFIG_LCD */
 823
 824 static void stk5_board_init(void)
 825 {
 826         gpio_request_array(stk5_gpios, ARRAY_SIZE(stk5_gpios));
 827         mxs_iomux_setup_multiple_pads(stk5_pads, ARRAY_SIZE(stk5_pads));
 828 }
 829
 830 static void stk5v3_board_init(void)
 831 {
 832         led_state = LED_STATE_INIT;
 833         stk5_board_init();
 834 }
 835
 836 static void stk5v5_board_init(void)
 837 {
 838         stk5_board_init();
 839
 840         /* init flexcan transceiver enable GPIO */
 841         gpio_request_one(STK5_CAN_XCVR_GPIO, GPIOFLAG_OUTPUT_INIT_HIGH,
 842                         "Flexcan Transceiver");
 843         mxs_iomux_setup_pad(STK5_CAN_XCVR_GPIO);
 844 }
 845
 846 int board_late_init(void)
 847 {
 848         int ret = 0;
 849         const char *baseboard;
 850
 851         env_cleanup();
 852
 853         if (had_ctrlc())
 854                 setenv_ulong("safeboot", 1);
 855         else
 856                 karo_fdt_move_fdt();
 857
 858         baseboard = getenv("baseboard");
 859         if (!baseboard)
 860                 goto exit;
 861
 862         printf("Baseboard: %s\n", baseboard);
 863
 864         if (strncmp(baseboard, "stk5", 4) == 0) {
 865                 if ((strlen(baseboard) == 4) ||
 866                         strcmp(baseboard, "stk5-v3") == 0) {
 867                         stk5v3_board_init();
 868                 } else if (strcmp(baseboard, "stk5-v5") == 0) {
 869                         const char *otg_mode = getenv("otg_mode");
 870
 871                         if (otg_mode && strcmp(otg_mode, "host") == 0) {
 872                                 printf("otg_mode='%s' is incompatible with baseboard %s; setting to 'none'\n",
 873                                         otg_mode, baseboard);
 874                                 setenv("otg_mode", "none");
 875                         }
 876                         stk5v5_board_init();
 877                 } else {
 878                         printf("WARNING: Unsupported STK5 board rev.: %s\n",
 879                                 baseboard + 4);
 880                 }
 881         } else {
 882                 printf("WARNING: Unsupported baseboard: '%s'\n",
 883                         baseboard);
 884                 if (!had_ctrlc())
 885                         ret = -EINVAL;
 886         }
 887
 888 exit:
 889         tx28_init_mac();
 890         clear_ctrlc();
 891         return ret;
 892 }
 893
 894 #define BOOT_CAUSE_MASK         (RTC_PERSISTENT0_EXTERNAL_RESET |       \
 895                                 RTC_PERSISTENT0_ALARM_WAKE |            \
 896                                 RTC_PERSISTENT0_THERMAL_RESET)
 897
 898 static void thermal_init(void)
 899 {
 900         struct mxs_power_regs *power_regs = (void *)MXS_POWER_BASE;
 901         struct mxs_clkctrl_regs *clkctrl_regs = (void *)MXS_CLKCTRL_BASE;
 902
 903         writel(POWER_THERMAL_LOW_POWER | POWER_THERMAL_OFFSET_ADJ_ENABLE |
 904                 POWER_THERMAL_OFFSET_ADJ_OFFSET(3),
 905                 &power_regs->hw_power_thermal);
 906
 907         writel(CLKCTRL_RESET_EXTERNAL_RESET_ENABLE |
 908                 CLKCTRL_RESET_THERMAL_RESET_ENABLE,
 909                 &clkctrl_regs->hw_clkctrl_reset);
 910 }
 911
 912 int checkboard(void)
 913 {
 914         struct mxs_power_regs *power_regs = (void *)MXS_POWER_BASE;
 915         u32 pwr_sts = readl(&power_regs->hw_power_sts);
 916         u32 pwrup_src = (pwr_sts >> 24) & 0x3f;
 917         const char *dlm = "";
 918
 919         printf("Board: Ka-Ro TX28-4%sx%d\n", TX28_MOD_SUFFIX,
 920                 CONFIG_SYS_SDRAM_SIZE / SZ_128M +
 921                 CONFIG_SYS_NAND_BLOCKS / 2048 * 2);
 922
 923         printf("POWERUP Source: ");
 924         if (pwrup_src & (3 << 0)) {
 925                 printf("%sPSWITCH %s voltage", dlm,
 926                         pwrup_src & (1 << 1) ? "HIGH" : "MID");
 927                 dlm = " | ";
 928         }
 929         if (pwrup_src & (1 << 4)) {
 930                 printf("%sRTC", dlm);
 931                 dlm = " | ";
 932         }
 933         if (pwrup_src & (1 << 5)) {
 934                 printf("%s5V", dlm);
 935                 dlm = " | ";
 936         }
 937         printf("\n");
 938
 939         if (boot_cause & BOOT_CAUSE_MASK) {
 940                 dlm="";
 941                 printf("Last boot cause: ");
 942                 if (boot_cause & RTC_PERSISTENT0_EXTERNAL_RESET) {
 943                         printf("%sEXTERNAL", dlm);
 944                         dlm = " | ";
 945                 }
 946                 if (boot_cause & RTC_PERSISTENT0_THERMAL_RESET) {
 947                         printf("%sTHERMAL", dlm);
 948                         dlm = " | ";
 949                 }
 950                 if (*dlm != '\0')
 951                         printf(" RESET");
 952                 if (boot_cause & RTC_PERSISTENT0_ALARM_WAKE) {
 953                         printf("%sALARM WAKE", dlm);
 954                         dlm = " | ";
 955                 }
 956                 printf("\n");
 957         }
 958
 959         while (pwr_sts & POWER_STS_THERMAL_WARNING) {
 960                 static int first = 1;
 961
 962                 if (first) {
 963                         printf("CPU too hot to boot\n");
 964                         first = 0;
 965                 }
 966                 if (tstc())
 967                         break;
 968                 pwr_sts = readl(&power_regs->hw_power_sts);
 969         }
 970
 971         if (!(boot_cause & RTC_PERSISTENT0_THERMAL_RESET))
 972                 thermal_init();
 973
 974         return 0;
 975 }
 976
 977 #if defined(CONFIG_OF_BOARD_SETUP)
 978 #ifdef CONFIG_FDT_FIXUP_PARTITIONS
 979 #include <jffs2/jffs2.h>
 980 #include <mtd_node.h>
 981 static struct node_info tx28_nand_nodes[] = {
 982         { "fsl,imx28-gpmi-nand", MTD_DEV_TYPE_NAND, },
 983 };
 984 #else
 985 #define fdt_fixup_mtdparts(b,n,c) do { } while (0)
 986 #endif
 987
 988 static const char *tx28_touchpanels[] = {
 989         "ti,tsc2007",
 990         "edt,edt-ft5x06",
 991         "fsl,imx28-lradc",
 992 };
 993
 994 int ft_board_setup(void *blob, bd_t *bd)
 995 {
 996         const char *baseboard = getenv("baseboard");
 997         int stk5_v5 = baseboard != NULL && (strcmp(baseboard, "stk5-v5") == 0);
 998         const char *video_mode = karo_get_vmode(getenv("video_mode"));
 999         int ret;
1000
1001         ret = fdt_increase_size(blob, 4096);
1002         if (ret) {
1003                 printf("Failed to increase FDT size: %s\n", fdt_strerror(ret));
1004                 return ret;
1005         }
1006 #ifdef CONFIG_TX28_S
1007         /* TX28-41xx (aka TX28S) has no external RTC
1008          * and no I2C GPIO extender
1009          */
1010         karo_fdt_remove_node(blob, "ds1339");
1011         karo_fdt_remove_node(blob, "gpio5");
1012 #endif
1013         if (stk5_v5)
1014                 karo_fdt_enable_node(blob, "stk5led", 0);
1015
1016         fdt_fixup_mtdparts(blob, tx28_nand_nodes, ARRAY_SIZE(tx28_nand_nodes));
1017
1018         karo_fdt_fixup_touchpanel(blob, tx28_touchpanels,
1019                                 ARRAY_SIZE(tx28_touchpanels));
1020         karo_fdt_fixup_usb_otg(blob, "usbotg", "fsl,usbphy", "vbus-supply");
1021         karo_fdt_fixup_flexcan(blob, stk5_v5);
1022         karo_fdt_update_fb_mode(blob, video_mode);
1023
1024         return 0;
1025 }
1026 #endif /* CONFIG_OF_BOARD_SETUP */