board/karo/tx28/tx28.c

   1 /*
   2  * Copyright (C) 2011 Lothar Waßmann <LW@KARO-electronics.de>
   3  * based on: board/freesclae/mx28_evk.c (C) 2010 Freescale Semiconductor, Inc.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <common.h>
  25 #include <errno.h>
  26 #include <libfdt.h>
  27 #include <fdt_support.h>
  28 #include <lcd.h>
  29 #include <netdev.h>
  30 #include <mmc.h>
  31 #include <imx_ssp_mmc.h>
  32 #include <linux/list.h>
  33 #include <linux/fb.h>
  34 #include <asm/io.h>
  35 #include <asm/gpio.h>
  36 #include <asm/arch/iomux-mx28.h>
  37 #include <asm/arch/clock.h>
  38 #include <asm/arch/mxsfb.h>
  39 #include <asm/arch/imx-regs.h>
  40 #include <asm/arch/sys_proto.h>
  41
  42 #include "../common/karo.h"
  43
  44 DECLARE_GLOBAL_DATA_PTR;
  45
  46 #define MXS_GPIO_NR(p, o)      (((p) << 5) | (o))
  47
  48 #define TX28_LCD_PWR_GPIO       MX28_PAD_LCD_ENABLE__GPIO_1_31
  49 #define TX28_LCD_RST_GPIO       MX28_PAD_LCD_RESET__GPIO_3_30
  50 #define TX28_LCD_BACKLIGHT_GPIO MX28_PAD_PWM0__GPIO_3_16
  51
  52 #define TX28_USBH_VBUSEN_GPIO   MX28_PAD_SPDIF__GPIO_3_27
  53 #define TX28_USBH_OC_GPIO       MX28_PAD_JTAG_RTCK__GPIO_4_20
  54 #define TX28_USBOTG_VBUSEN_GPIO MX28_PAD_GPMI_CE2N__GPIO_0_18
  55 #define TX28_USBOTG_OC_GPIO     MX28_PAD_GPMI_CE3N__GPIO_0_19
  56 #define TX28_USBOTG_ID_GPIO     MX28_PAD_PWM2__GPIO_3_18
  57
  58 #define TX28_LED_GPIO           MX28_PAD_ENET0_RXD3__GPIO_4_10
  59
  60 static const struct gpio tx28_gpios[] = {
  61         { TX28_USBH_VBUSEN_GPIO, GPIOF_OUTPUT_INIT_LOW, "USBH VBUSEN", },
  62         { TX28_USBH_OC_GPIO, GPIOF_INPUT, "USBH OC", },
  63         { TX28_USBOTG_VBUSEN_GPIO, GPIOF_OUTPUT_INIT_LOW, "USBOTG VBUSEN", },
  64         { TX28_USBOTG_OC_GPIO, GPIOF_INPUT, "USBOTG OC", },
  65         { TX28_USBOTG_ID_GPIO, GPIOF_INPUT, "USBOTG ID", },
  66 };
  67
  68 static const iomux_cfg_t tx28_pads[] = {
  69         /* UART pads */
  70 #if CONFIG_CONS_INDEX == 0
  71         MX28_PAD_AUART0_RX__DUART_CTS,
  72         MX28_PAD_AUART0_TX__DUART_RTS,
  73         MX28_PAD_AUART0_CTS__DUART_RX,
  74         MX28_PAD_AUART0_RTS__DUART_TX,
  75 #elif CONFIG_CONS_INDEX == 1
  76         MX28_PAD_AUART1_RX__AUART1_RX,
  77         MX28_PAD_AUART1_TX__AUART1_TX,
  78         MX28_PAD_AUART1_CTS__AUART1_CTS,
  79         MX28_PAD_AUART1_RTS__AUART1_RTS,
  80 #elif CONFIG_CONS_INDEX == 2
  81         MX28_PAD_AUART3_RX__AUART3_RX,
  82         MX28_PAD_AUART3_TX__AUART3_TX,
  83         MX28_PAD_AUART3_CTS__AUART3_CTS,
  84         MX28_PAD_AUART3_RTS__AUART3_RTS,
  85 #endif
  86         /* I2C bus for internal DS1339, PCA9554 and on DIMM pins 40/41 */
  87         MX28_PAD_I2C0_SCL__I2C0_SCL,
  88         MX28_PAD_I2C0_SDA__I2C0_SDA,
  89
  90         /* USBH VBUSEN, OC */
  91         MX28_PAD_SPDIF__GPIO_3_27,
  92         MX28_PAD_JTAG_RTCK__GPIO_4_20,
  93
  94         /* USBOTG VBUSEN, OC, ID */
  95         MX28_PAD_GPMI_CE2N__GPIO_0_18,
  96         MX28_PAD_GPMI_CE3N__GPIO_0_19,
  97         MX28_PAD_PWM2__GPIO_3_18,
  98 };
  99
 100 /*
 101  * Functions
 102  */
 103
 104 /* provide at least _some_ sort of randomness */
 105 #define MAX_LOOPS       100
 106
 107 static u32 random;
 108
 109 static inline void random_init(void)
 110 {
 111         struct mxs_digctl_regs *digctl_regs = (void *)MXS_DIGCTL_BASE;
 112         u32 seed = 0;
 113         int i;
 114
 115         for (i = 0; i < MAX_LOOPS; i++) {
 116                 unsigned int usec = readl(&digctl_regs->hw_digctl_microseconds);
 117
 118                 seed = get_timer(usec + random + seed);
 119                 srand(seed);
 120                 random = rand();
 121         }
 122 }
 123
 124 int board_early_init_f(void)
 125 {
 126         random_init();
 127
 128         /* IO0 clock at 480MHz */
 129         mx28_set_ioclk(MXC_IOCLK0, 480000);
 130         /* IO1 clock at 480MHz */
 131         mx28_set_ioclk(MXC_IOCLK1, 480000);
 132
 133         /* SSP0 clock at 96MHz */
 134         mx28_set_sspclk(MXC_SSPCLK0, 96000, 0);
 135         /* SSP2 clock at 96MHz */
 136         mx28_set_sspclk(MXC_SSPCLK2, 96000, 0);
 137
 138         gpio_request_array(tx28_gpios, ARRAY_SIZE(tx28_gpios));
 139         mxs_iomux_setup_multiple_pads(tx28_pads, ARRAY_SIZE(tx28_pads));
 140         return 0;
 141 }
 142
 143 int board_init(void)
 144 {
 145         /* Address of boot parameters */
 146         gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x1000;
 147         return 0;
 148 }
 149
 150 int dram_init(void)
 151 {
 152         return mxs_dram_init();
 153 }
 154
 155 #ifdef  CONFIG_CMD_MMC
 156 static int tx28_mmc_wp(int dev_no)
 157 {
 158         return 0;
 159 }
 160
 161 int board_mmc_init(bd_t *bis)
 162 {
 163         return mxsmmc_initialize(bis, 0, tx28_mmc_wp);
 164 }
 165 #endif /* CONFIG_CMD_MMC */
 166
 167 #ifdef CONFIG_FEC_MXC
 168 #ifdef CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
 169
 170 #ifdef CONFIG_FEC_MXC_MULTI
 171 #define FEC_MAX_IDX                     1
 172 #else
 173 #define FEC_MAX_IDX                     0
 174 #endif
 175
 176 static int fec_get_mac_addr(int index)
 177 {
 178         u32 val1, val2;
 179         int timeout = 1000;
 180         struct mxs_ocotp_regs *ocotp_regs =
 181                 (struct mxs_ocotp_regs *)MXS_OCOTP_BASE;
 182         u32 *cust = &ocotp_regs->hw_ocotp_cust0;
 183         char mac[6 * 3];
 184         char env_name[] = "eth.addr";
 185
 186         if (index < 0 || index > FEC_MAX_IDX)
 187                 return -EINVAL;
 188
 189         /* set this bit to open the OTP banks for reading */
 190         writel(OCOTP_CTRL_RD_BANK_OPEN,
 191                 &ocotp_regs->hw_ocotp_ctrl_set);
 192
 193         /* wait until OTP contents are readable */
 194         while (OCOTP_CTRL_BUSY & readl(&ocotp_regs->hw_ocotp_ctrl)) {
 195                 if (timeout-- < 0)
 196                         return -ETIMEDOUT;
 197                 udelay(100);
 198         }
 199
 200         val1 = readl(&cust[index * 8]);
 201         val2 = readl(&cust[index * 8 + 4]);
 202         if ((val1 | val2) == 0)
 203                 return 0;
 204         snprintf(mac, sizeof(mac), "%02x:%02x:%02x:%02x:%02x:%02x",
 205                 (val1 >> 24) & 0xFF, (val1 >> 16) & 0xFF,
 206                 (val1 >> 8) & 0xFF, (val1 >> 0) & 0xFF,
 207                 (val2 >> 24) & 0xFF, (val2 >> 16) & 0xFF);
 208         if (index == 0)
 209                 snprintf(env_name, sizeof(env_name), "ethaddr");
 210         else
 211                 snprintf(env_name, sizeof(env_name), "eth%daddr", index);
 212
 213         setenv(env_name, mac);
 214         return 0;
 215 }
 216 #endif /* CONFIG_GET_FEC_MAC_ADDR_FROM_IIM */
 217
 218 static const iomux_cfg_t tx28_fec_pads[] = {
 219         MX28_PAD_ENET0_RX_EN__ENET0_RX_EN,
 220         MX28_PAD_ENET0_RXD0__ENET0_RXD0,
 221         MX28_PAD_ENET0_RXD1__ENET0_RXD1,
 222 };
 223
 224 int board_eth_init(bd_t *bis)
 225 {
 226         int ret;
 227
 228         /* Reset the external phy */
 229         gpio_direction_output(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 0);
 230
 231         /* Power on the external phy */
 232         gpio_direction_output(MX28_PAD_PWM4__GPIO_3_29, 1);
 233
 234         /* Pull strap pins to high */
 235         gpio_direction_output(MX28_PAD_ENET0_RX_EN__GPIO_4_2, 1);
 236         gpio_direction_output(MX28_PAD_ENET0_RXD0__GPIO_4_3, 1);
 237         gpio_direction_output(MX28_PAD_ENET0_RXD1__GPIO_4_4, 1);
 238         gpio_direction_input(MX28_PAD_ENET0_TX_CLK__GPIO_4_5);
 239
 240         udelay(25000);
 241         gpio_set_value(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 1);
 242         udelay(100);
 243
 244         mxs_iomux_setup_multiple_pads(tx28_fec_pads, ARRAY_SIZE(tx28_fec_pads));
 245
 246         ret = cpu_eth_init(bis);
 247         if (ret) {
 248                 printf("cpu_eth_init() failed: %d\n", ret);
 249                 return ret;
 250         }
 251
 252         ret = fec_get_mac_addr(0);
 253         if (ret < 0) {
 254                 printf("Failed to read FEC0 MAC address from OCOTP\n");
 255                 return ret;
 256         }
 257 #ifdef CONFIG_FEC_MXC_MULTI
 258         if (getenv("ethaddr")) {
 259                 ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE);
 260                 if (ret) {
 261                         printf("FEC MXS: Unable to init FEC0\n");
 262                         return ret;
 263                 }
 264         }
 265
 266         ret = fec_get_mac_addr(1);
 267         if (ret < 0) {
 268                 printf("Failed to read FEC1 MAC address from OCOTP\n");
 269                 return ret;
 270         }
 271         if (getenv("eth1addr")) {
 272                 ret = fecmxc_initialize_multi(bis, 1, 1, MXS_ENET1_BASE);
 273                 if (ret) {
 274                         printf("FEC MXS: Unable to init FEC1\n");
 275                         return ret;
 276                 }
 277         }
 278         return 0;
 279 #else
 280         if (getenv("ethaddr")) {
 281                 ret = fecmxc_initialize(bis);
 282         }
 283         return ret;
 284 #endif
 285 }
 286 #endif /* CONFIG_FEC_MXC */
 287
 288 enum {
 289         LED_STATE_INIT = -1,
 290         LED_STATE_OFF,
 291         LED_STATE_ON,
 292 };
 293
 294 void show_activity(int arg)
 295 {
 296         static int led_state = LED_STATE_INIT;
 297         static ulong last;
 298
 299         if (led_state == LED_STATE_INIT) {
 300                 last = get_timer(0);
 301                 gpio_set_value(TX28_LED_GPIO, 1);
 302                 led_state = LED_STATE_ON;
 303         } else {
 304                 if (get_timer(last) > CONFIG_SYS_HZ) {
 305                         last = get_timer(0);
 306                         if (led_state == LED_STATE_ON) {
 307                                 gpio_set_value(TX28_LED_GPIO, 0);
 308                         } else {
 309                                 gpio_set_value(TX28_LED_GPIO, 1);
 310                         }
 311                         led_state = 1 - led_state;
 312                 }
 313         }
 314 }
 315
 316 static const iomux_cfg_t stk5_pads[] = {
 317         /* SW controlled LED on STK5 baseboard */
 318         MX28_PAD_ENET0_RXD3__GPIO_4_10,
 319 };
 320
 321 static const struct gpio stk5_gpios[] = {
 322 };
 323
 324 #ifdef CONFIG_LCD
 325 static struct fb_videomode tx28_fb_modes[] = {
 326         {
 327                 /* Standard VGA timing */
 328                 .name           = "VGA",
 329                 .refresh        = 60,
 330                 .xres           = 640,
 331                 .yres           = 480,
 332                 .pixclock       = KHZ2PICOS(25175),
 333                 .left_margin    = 48,
 334                 .hsync_len      = 96,
 335                 .right_margin   = 16,
 336                 .upper_margin   = 31,
 337                 .vsync_len      = 2,
 338                 .lower_margin   = 12,
 339                 .sync           = FB_SYNC_DATA_ENABLE_HIGH_ACT,
 340                 .vmode          = FB_VMODE_NONINTERLACED,
 341         },
 342         {
 343                 /* Emerging ETV570 640 x 480 display. Syncs low active,
 344                  * DE high active, 115.2 mm x 86.4 mm display area
 345                  * VGA compatible timing
 346                  */
 347                 .name           = "ETV570",
 348                 .refresh        = 60,
 349                 .xres           = 640,
 350                 .yres           = 480,
 351                 .pixclock       = KHZ2PICOS(25175),
 352                 .left_margin    = 114,
 353                 .hsync_len      = 30,
 354                 .right_margin   = 16,
 355                 .upper_margin   = 32,
 356                 .vsync_len      = 3,
 357                 .lower_margin   = 10,
 358                 .sync           = FB_SYNC_DATA_ENABLE_HIGH_ACT,
 359                 .vmode          = FB_VMODE_NONINTERLACED,
 360         },
 361         {
 362                 /* Emerging ET0350G0DH6 320 x 240 display.
 363                  * 70.08 mm x 52.56 mm display area.
 364                  */
 365                 .name           = "ET0350",
 366                 .refresh        = 60,
 367                 .xres           = 320,
 368                 .yres           = 240,
 369                 .pixclock       = KHZ2PICOS(6500),
 370                 .left_margin    = 68 - 34,
 371                 .hsync_len      = 34,
 372                 .right_margin   = 20,
 373                 .upper_margin   = 18 - 3,
 374                 .vsync_len      = 3,
 375                 .lower_margin   = 4,
 376                 .sync           = FB_SYNC_DATA_ENABLE_HIGH_ACT,
 377                 .vmode          = FB_VMODE_NONINTERLACED,
 378         },
 379         {
 380                 /* Emerging ET0430G0DH6 480 x 272 display.
 381                  * 95.04 mm x 53.856 mm display area.
 382                  */
 383                 .name           = "ET0430",
 384                 .refresh        = 60,
 385                 .xres           = 480,
 386                 .yres           = 272,
 387                 .pixclock       = KHZ2PICOS(9000),
 388                 .left_margin    = 2,
 389                 .hsync_len      = 41,
 390                 .right_margin   = 2,
 391                 .upper_margin   = 2,
 392                 .vsync_len      = 10,
 393                 .lower_margin   = 2,
 394                 .sync           = FB_SYNC_DATA_ENABLE_HIGH_ACT,
 395                 .vmode          = FB_VMODE_NONINTERLACED,
 396         },
 397         {
 398                 /* Emerging ET0500G0DH6 800 x 480 display.
 399                  * 109.6 mm x 66.4 mm display area.
 400                  */
 401                 .name           = "ET0500",
 402                 .refresh        = 60,
 403                 .xres           = 800,
 404                 .yres           = 480,
 405                 .pixclock       = KHZ2PICOS(33260),
 406                 .left_margin    = 216 - 128,
 407                 .hsync_len      = 128,
 408                 .right_margin   = 1056 - 800 - 216,
 409                 .upper_margin   = 35 - 2,
 410                 .vsync_len      = 2,
 411                 .lower_margin   = 525 - 480 - 35,
 412                 .sync           = FB_SYNC_DATA_ENABLE_HIGH_ACT,
 413                 .vmode          = FB_VMODE_NONINTERLACED,
 414         },
 415         {
 416                 /* Emerging ETQ570G0DH6 320 x 240 display.
 417                  * 115.2 mm x 86.4 mm display area.
 418                  */
 419                 .name           = "ETQ570",
 420                 .refresh        = 60,
 421                 .xres           = 320,
 422                 .yres           = 240,
 423                 .pixclock       = KHZ2PICOS(6400),
 424                 .left_margin    = 38,
 425                 .hsync_len      = 30,
 426                 .right_margin   = 30,
 427                 .upper_margin   = 16, /* 15 according to datasheet */
 428                 .vsync_len      = 3, /* TVP -> 1>x>5 */
 429                 .lower_margin   = 4, /* 4.5 according to datasheet */
 430                 .sync           = FB_SYNC_DATA_ENABLE_HIGH_ACT,
 431                 .vmode          = FB_VMODE_NONINTERLACED,
 432         },
 433         {
 434                 /* Emerging ET0700G0DH6 800 x 480 display.
 435                  * 152.4 mm x 91.44 mm display area.
 436                  */
 437                 .name           = "ET0700",
 438                 .refresh        = 60,
 439                 .xres           = 800,
 440                 .yres           = 480,
 441                 .pixclock       = KHZ2PICOS(33260),
 442                 .left_margin    = 216 - 128,
 443                 .hsync_len      = 128,
 444                 .right_margin   = 1056 - 800 - 216,
 445                 .upper_margin   = 35 - 2,
 446                 .vsync_len      = 2,
 447                 .lower_margin   = 525 - 480 - 35,
 448                 .sync           = FB_SYNC_DATA_ENABLE_HIGH_ACT,
 449                 .vmode          = FB_VMODE_NONINTERLACED,
 450         },
 451         {
 452                 /* unnamed entry for assigning parameters parsed from 'video_mode' string */
 453                 .sync           = FB_SYNC_DATA_ENABLE_HIGH_ACT,
 454                 .vmode          = FB_VMODE_NONINTERLACED,
 455         },
 456 };
 457
 458 static int lcd_enabled = 1;
 459
 460 void lcd_enable(void)
 461 {
 462         /* HACK ALERT:
 463          * global variable from common/lcd.c
 464          * Set to 0 here to prevent messages from going to LCD
 465          * rather than serial console
 466          */
 467         lcd_is_enabled = 0;
 468
 469         karo_load_splashimage(1);
 470         if (lcd_enabled) {
 471                 debug("Switching LCD on\n");
 472                 gpio_set_value(TX28_LCD_PWR_GPIO, 1);
 473                 udelay(100);
 474                 gpio_set_value(TX28_LCD_RST_GPIO, 1);
 475                 udelay(300000);
 476                 gpio_set_value(TX28_LCD_BACKLIGHT_GPIO, 0);
 477         }
 478 }
 479
 480 void lcd_disable(void)
 481 {
 482         mxsfb_disable();
 483 }
 484
 485 void lcd_panel_disable(void)
 486 {
 487         if (lcd_enabled) {
 488                 debug("Switching LCD off\n");
 489                 gpio_set_value(TX28_LCD_BACKLIGHT_GPIO, 1);
 490                 gpio_set_value(TX28_LCD_RST_GPIO, 0);
 491                 gpio_set_value(TX28_LCD_PWR_GPIO, 0);
 492         }
 493 }
 494
 495 static const iomux_cfg_t stk5_lcd_pads[] = {
 496         /* LCD RESET */
 497         MX28_PAD_LCD_RESET__GPIO_3_30 | MXS_PAD_CTRL,
 498         /* LCD POWER_ENABLE */
 499         MX28_PAD_LCD_ENABLE__GPIO_1_31 | MXS_PAD_CTRL,
 500         /* LCD Backlight (PWM) */
 501         MX28_PAD_PWM0__GPIO_3_16 | MXS_PAD_CTRL,
 502
 503         /* Display */
 504         MX28_PAD_LCD_D00__LCD_D0 | MXS_PAD_CTRL,
 505         MX28_PAD_LCD_D01__LCD_D1 | MXS_PAD_CTRL,
 506         MX28_PAD_LCD_D02__LCD_D2 | MXS_PAD_CTRL,
 507         MX28_PAD_LCD_D03__LCD_D3 | MXS_PAD_CTRL,
 508         MX28_PAD_LCD_D04__LCD_D4 | MXS_PAD_CTRL,
 509         MX28_PAD_LCD_D05__LCD_D5 | MXS_PAD_CTRL,
 510         MX28_PAD_LCD_D06__LCD_D6 | MXS_PAD_CTRL,
 511         MX28_PAD_LCD_D07__LCD_D7 | MXS_PAD_CTRL,
 512         MX28_PAD_LCD_D08__LCD_D8 | MXS_PAD_CTRL,
 513         MX28_PAD_LCD_D09__LCD_D9 | MXS_PAD_CTRL,
 514         MX28_PAD_LCD_D10__LCD_D10 | MXS_PAD_CTRL,
 515         MX28_PAD_LCD_D11__LCD_D11 | MXS_PAD_CTRL,
 516         MX28_PAD_LCD_D12__LCD_D12 | MXS_PAD_CTRL,
 517         MX28_PAD_LCD_D13__LCD_D13 | MXS_PAD_CTRL,
 518         MX28_PAD_LCD_D14__LCD_D14 | MXS_PAD_CTRL,
 519         MX28_PAD_LCD_D15__LCD_D15 | MXS_PAD_CTRL,
 520         MX28_PAD_LCD_D16__LCD_D16 | MXS_PAD_CTRL,
 521         MX28_PAD_LCD_D17__LCD_D17 | MXS_PAD_CTRL,
 522         MX28_PAD_LCD_D18__LCD_D18 | MXS_PAD_CTRL,
 523         MX28_PAD_LCD_D19__LCD_D19 | MXS_PAD_CTRL,
 524         MX28_PAD_LCD_D20__LCD_D20 | MXS_PAD_CTRL,
 525         MX28_PAD_LCD_D21__LCD_D21 | MXS_PAD_CTRL,
 526         MX28_PAD_LCD_D22__LCD_D22 | MXS_PAD_CTRL,
 527         MX28_PAD_LCD_D23__LCD_D23 | MXS_PAD_CTRL,
 528         MX28_PAD_LCD_RD_E__LCD_VSYNC | MXS_PAD_CTRL,
 529         MX28_PAD_LCD_WR_RWN__LCD_HSYNC | MXS_PAD_CTRL,
 530         MX28_PAD_LCD_RS__LCD_DOTCLK | MXS_PAD_CTRL,
 531         MX28_PAD_LCD_CS__LCD_CS | MXS_PAD_CTRL,
 532         MX28_PAD_LCD_VSYNC__LCD_VSYNC | MXS_PAD_CTRL,
 533         MX28_PAD_LCD_HSYNC__LCD_HSYNC | MXS_PAD_CTRL,
 534         MX28_PAD_LCD_DOTCLK__LCD_DOTCLK | MXS_PAD_CTRL,
 535 };
 536
 537 static const struct gpio stk5_lcd_gpios[] = {
 538         { TX28_LCD_RST_GPIO, GPIOF_OUTPUT_INIT_LOW, "LCD RESET", },
 539         { TX28_LCD_PWR_GPIO, GPIOF_OUTPUT_INIT_LOW, "LCD POWER", },
 540         { TX28_LCD_BACKLIGHT_GPIO, GPIOF_OUTPUT_INIT_HIGH, "LCD BACKLIGHT", },
 541 };
 542
 543 extern void video_hw_init(void *lcdbase);
 544
 545 void lcd_ctrl_init(void *lcdbase)
 546 {
 547         int color_depth = 24;
 548         char *vm;
 549         unsigned long val;
 550         int refresh = 60;
 551         struct fb_videomode *p = &tx28_fb_modes[0];
 552         int xres_set = 0, yres_set = 0, bpp_set = 0, refresh_set = 0;
 553
 554         if (!lcd_enabled) {
 555                 debug("LCD disabled\n");
 556                 return;
 557         }
 558
 559         if (tstc()) {
 560                 debug("Disabling LCD\n");
 561                 lcd_enabled = 0;
 562                 return;
 563         }
 564
 565         vm = getenv("video_mode");
 566         if (vm == NULL) {
 567                 debug("Disabling LCD\n");
 568                 lcd_enabled = 0;
 569                 return;
 570         }
 571         while (p->name != NULL) {
 572                 if (strcmp(p->name, vm) == 0) {
 573                         printf("Using video mode: '%s'\n", p->name);
 574                         vm += strlen(vm);
 575                         break;
 576                 }
 577                 p++;
 578         }
 579
 580         while (*vm != '\0') {
 581                 if (*vm >= '0' && *vm <= '9') {
 582                         char *end;
 583
 584                         val = simple_strtoul(vm, &end, 0);
 585                         if (end > vm) {
 586                                 if (!xres_set) {
 587                                         if (val > panel_info.vl_col)
 588                                                 val = panel_info.vl_col;
 589                                         p->xres = val;
 590                                         xres_set = 1;
 591                                 } else if (!yres_set) {
 592                                         if (val > panel_info.vl_row)
 593                                                 val = panel_info.vl_row;
 594                                         p->yres = val;
 595                                         yres_set = 1;
 596                                 } else if (!bpp_set) {
 597                                         switch (val) {
 598                                         case 8:
 599                                         case 16:
 600                                         case 18:
 601                                         case 24:
 602                                                 color_depth = val;
 603                                                 break;
 604
 605                                         default:
 606                                                 printf("Invalid color depth: '%.*s' in video_mode; using default: '%u'\n",
 607                                                         end - vm, vm, color_depth);
 608                                         }
 609                                         bpp_set = 1;
 610                                 } else if (!refresh_set) {
 611                                         refresh = val;
 612                                         refresh_set = 1;
 613                                 }
 614                         }
 615                         vm = end;
 616                 }
 617                 switch (*vm) {
 618                 case '@':
 619                         bpp_set = 1;
 620                         /* fallthru */
 621                 case '-':
 622                         yres_set = 1;
 623                         /* fallthru */
 624                 case 'x':
 625                         xres_set = 1;
 626                         /* fallthru */
 627                 case 'M':
 628                 case 'R':
 629                         vm++;
 630                         break;
 631
 632                 default:
 633                         if (*vm != '\0')
 634                                 vm++;
 635                 }
 636         }
 637         if (p->xres == 0 || p->yres == 0) {
 638                 printf("Invalid video mode: %s\n", getenv("video_mode"));
 639                 lcd_enabled = 0;
 640                 printf("Supported video modes are:");
 641                 for (p = &tx28_fb_modes[0]; p->name != NULL; p++) {
 642                         printf(" %s", p->name);
 643                 }
 644                 printf("\n");
 645                 return;
 646         }
 647         p->pixclock = KHZ2PICOS(refresh *
 648                 (p->xres + p->left_margin + p->right_margin + p->hsync_len) *
 649                 (p->yres + p->upper_margin + p->lower_margin + p->vsync_len) /
 650                                 1000);
 651         debug("Pixel clock set to %lu.%03lu MHz\n",
 652                 PICOS2KHZ(p->pixclock) / 1000, PICOS2KHZ(p->pixclock) % 1000);
 653
 654         gpio_request_array(stk5_lcd_gpios, ARRAY_SIZE(stk5_lcd_gpios));
 655         mxs_iomux_setup_multiple_pads(stk5_lcd_pads,
 656                                 ARRAY_SIZE(stk5_lcd_pads));
 657
 658         debug("video format: %ux%u-%u@%u\n", p->xres, p->yres,
 659                 color_depth, refresh);
 660
 661         if (karo_load_splashimage(0) == 0) {
 662                 debug("Initializing LCD controller\n");
 663                 mxsfb_init(p, PIX_FMT_RGB24, color_depth);
 664                 video_hw_init(lcdbase);
 665         } else {
 666                 debug("Skipping initialization of LCD controller\n");
 667         }
 668 }
 669 #else
 670 #define lcd_enabled 0
 671 #endif /* CONFIG_LCD */
 672
 673 static void stk5_board_init(void)
 674 {
 675         gpio_request_array(stk5_gpios, ARRAY_SIZE(stk5_gpios));
 676         mxs_iomux_setup_multiple_pads(stk5_pads, ARRAY_SIZE(stk5_pads));
 677 }
 678
 679 static void stk5v3_board_init(void)
 680 {
 681         stk5_board_init();
 682 }
 683
 684 static void stk5v5_board_init(void)
 685 {
 686         stk5_board_init();
 687
 688         /* init flexcan transceiver enable GPIO */
 689         gpio_request_one(MXS_GPIO_NR(0, 1), GPIOF_OUTPUT_INIT_HIGH,
 690                         "Flexcan Transceiver");
 691         mxs_iomux_setup_pad(MX28_PAD_LCD_D00__GPIO_1_0);
 692 }
 693
 694 int board_late_init(void)
 695 {
 696         const char *baseboard;
 697
 698         karo_fdt_move_fdt();
 699
 700         baseboard = getenv("baseboard");
 701         if (!baseboard)
 702                 return 0;
 703
 704         if (strncmp(baseboard, "stk5", 4) == 0) {
 705                 printf("Baseboard: %s\n", baseboard);
 706                 if ((strlen(baseboard) == 4) ||
 707                         strcmp(baseboard, "stk5-v3") == 0) {
 708                         stk5v3_board_init();
 709                 } else if (strcmp(baseboard, "stk5-v5") == 0) {
 710                         stk5v5_board_init();
 711                 } else {
 712                         printf("WARNING: Unsupported STK5 board rev.: %s\n",
 713                                 baseboard + 4);
 714                 }
 715         } else {
 716                 printf("WARNING: Unsupported baseboard: '%s'\n",
 717                         baseboard);
 718                 return -EINVAL;
 719         }
 720
 721         return 0;
 722 }
 723
 724 int checkboard(void)
 725 {
 726         printf("Board: Ka-Ro TX28-4%sxx\n", TX28_MOD_SUFFIX);
 727         return 0;
 728 }
 729
 730 #if defined(CONFIG_OF_BOARD_SETUP)
 731 #ifdef CONFIG_FDT_FIXUP_PARTITIONS
 732 #include <jffs2/jffs2.h>
 733 #include <mtd_node.h>
 734 struct node_info tx28_nand_nodes[] = {
 735         { "gpmi-nand", MTD_DEV_TYPE_NAND, },
 736 };
 737 #else
 738 #define fdt_fixup_mtdparts(b,n,c) do { } while (0)
 739 #endif
 740
 741 static void tx28_fixup_flexcan(void *blob)
 742 {
 743         karo_fdt_del_prop(blob, "fsl,p1010-flexcan", 0x80032000, "transceiver-switch");
 744         karo_fdt_del_prop(blob, "fsl,p1010-flexcan", 0x80034000, "transceiver-switch");
 745 }
 746
 747 static void tx28_fixup_fec(void *blob)
 748 {
 749         karo_fdt_remove_node(blob, "ethernet1");
 750 }
 751
 752 void ft_board_setup(void *blob, bd_t *bd)
 753 {
 754         const char *baseboard = getenv("baseboard");
 755
 756 #ifdef CONFIG_TX28_S
 757         /* TX28-41xx (aka TX28S) has no external RTC
 758          * and no I2C GPIO extender
 759          */
 760         karo_fdt_remove_node(blob, "ds1339");
 761         karo_fdt_remove_node(blob, "pca9554");
 762 #endif
 763         if (baseboard != NULL && strcmp(baseboard, "stk5-v5") == 0) {
 764                 const char *otg_mode = getenv("otg_mode");
 765
 766                 if (otg_mode && strcmp(otg_mode, "host") == 0) {
 767                         printf("otg_mode=%s incompatible with baseboard %s\n",
 768                                 otg_mode, baseboard);
 769                         setenv(otg_mode, "none");
 770                 }
 771                 karo_fdt_remove_node(blob, "stk5led");
 772         } else {
 773                 tx28_fixup_flexcan(blob);
 774                 tx28_fixup_fec(blob);
 775         }
 776
 777         if (baseboard != NULL && strcmp(baseboard, "stk5-v3") == 0) {
 778                 const char *otg_mode = getenv("otg_mode");
 779
 780                 if (otg_mode && strcmp(otg_mode, "device") == 0)
 781                         karo_fdt_remove_node(blob, "can1");
 782         }
 783
 784         fdt_fixup_mtdparts(blob, tx28_nand_nodes, ARRAY_SIZE(tx28_nand_nodes));
 785         fdt_fixup_ethernet(blob);
 786
 787         karo_fdt_fixup_touchpanel(blob);
 788         karo_fdt_fixup_usb_otg(blob, "fsl,imx28-usbphy", 0x8007c000);
 789 }
 790 #endif